From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18151C433DF for ; Mon, 18 May 2020 14:40:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E642520787 for ; Mon, 18 May 2020 14:40:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728061AbgEROkw (ORCPT ); Mon, 18 May 2020 10:40:52 -0400 Received: from mail.baikalelectronics.com ([87.245.175.226]:48318 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727020AbgEROkv (ORCPT ); Mon, 18 May 2020 10:40:51 -0400 Received: from localhost (unknown [127.0.0.1]) by mail.baikalelectronics.ru (Postfix) with ESMTP id BAC7F8030875; Mon, 18 May 2020 14:40:47 +0000 (UTC) X-Virus-Scanned: amavisd-new at baikalelectronics.ru Received: from mail.baikalelectronics.ru ([127.0.0.1]) by localhost (mail.baikalelectronics.ru [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rEoajLcuEEvu; Mon, 18 May 2020 17:40:46 +0300 (MSK) Date: Mon, 18 May 2020 17:40:45 +0300 From: Serge Semin To: Daniel Lezcano CC: Serge Semin , Thomas Bogendoerfer , Thomas Gleixner , Alexey Malahov , Paul Burton , Ralf Baechle , Alessandro Zummo , Alexandre Belloni , Arnd Bergmann , Rob Herring , , , , Vincenzo Frascino , Subject: Re: [PATCH v3 7/7] clocksource: mips-gic-timer: Set limitations on clocksource/sched-clocks usage Message-ID: <20200518144045.v56fajrhbnnrzbpf@mobilestation> References: <20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru> <20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru> <20200506214107.25956-8-Sergey.Semin@baikalelectronics.ru> <20200515171004.GA760381@linaro.org> <20200516121647.g6jua35kkihmw5r6@mobilestation> <4c723219-62f8-be6a-47ea-a586859d832d@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <4c723219-62f8-be6a-47ea-a586859d832d@linaro.org> X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Daniel, On Mon, May 18, 2020 at 03:59:16PM +0200, Daniel Lezcano wrote: > On 16/05/2020 14:16, Serge Semin wrote: > > Hello Daniel, > > > > Thanks for your comment. My response is below. > > > > On Fri, May 15, 2020 at 07:10:04PM +0200, Daniel Lezcano wrote: > >> On Thu, May 07, 2020 at 12:41:07AM +0300, Serge Semin wrote: > >>> Currently neither clocksource nor scheduler clock kernel framework > >>> support the clocks with variable frequency. Needless to say how many > >>> problems may cause the sudden base clocks frequency change. In a > >>> simplest case the system time will either slow down or speed up. > >>> Since on CM2.5 and earlier MIPS GIC timer is synchronously clocked > >>> with CPU we must set some limitations on using it for these frameworks > >>> if CPU frequency may change. First of all it's not safe to have the > >>> MIPS GIC used for scheduler timings. So we shouldn't proceed with > >>> the clocks registration in the sched-subsystem. Secondly we must > >>> significantly decrease the MIPS GIC clocksource rating. This will let > >>> the system to use it only as a last resort. > >>> > >>> Note CM3.x-based systems may also experience the problems with MIPS GIC > >>> if the CPU-frequency change is activated for the whole CPU cluster > >>> instead of using the individual CPC core clocks divider. > >> > >> May be there is no alternative but the code looks a bit hacksih. Isn't possible > >> to do something with the sched_mark_unstable? > >> > >> Or just not use the timer at all ? > > > > Not using the timer might be better, but not that good alternative either > > especially in our case due to very slow external timer. Me and Thomas > > Bogendoerfer discussed the similar commit I've provided to the csrc-r4k driver > > available on MIPS: > > https://lkml.org/lkml/2020/5/11/576 > > > > To cut it short, you are right. The solution with using clocksource_mark_unstable() > > is better alternative spied up in x86 tsc implementation. I'll use a similar > > approach here and submit the updated patch in v3. > > > > Could you please proceed with the rest of the series review? I'd like to send > > the next version with as many comments taken into account as possible. The > > patchset has been submitted a while ago, but except Rob noone have had any > > comments.( > > For me other patches are ok. > > I can apply patches 1, 2, 4, 5, 6 > > Will remain patches 3 et 7 That's be great! Thanks. Is patch 3 supposed to be merged in by Rob or by you? I don't see one being in the Rob's repo. He might be waiting for you acknowledgment or something. I'll send the updated patch 3 shortly today. -Sergey > > > -- > Linaro.org │ Open source software for ARM SoCs > > Follow Linaro: Facebook | > Twitter | > Blog