From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD833C433DF for ; Wed, 20 May 2020 06:20:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AEA9A2075F for ; Wed, 20 May 2020 06:20:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726576AbgETGU5 (ORCPT ); Wed, 20 May 2020 02:20:57 -0400 Received: from mga03.intel.com ([134.134.136.65]:46235 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726369AbgETGU4 (ORCPT ); Wed, 20 May 2020 02:20:56 -0400 IronPort-SDR: 3WGr83E05yR+PXCRzPI4nvXNPZba6LsfkqgUG2vOWpFpeCmpS3l7mmm5Iv8N3iR04E+mbQVKxB 1YS9f5qvDWRw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2020 23:20:56 -0700 IronPort-SDR: x2Fdt2xSOHw7YfPmhCxnMFRGeCK3edMifCh80yTjNtpGNXLXkte9VzyvKxcs266zgc0cA436t1 U8J5oTH25sTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,413,1583222400"; d="scan'208";a="373977914" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.152]) by fmsmga001.fm.intel.com with ESMTP; 19 May 2020 23:20:55 -0700 Date: Tue, 19 May 2020 23:20:55 -0700 From: Sean Christopherson To: Joerg Roedel Cc: x86@kernel.org, hpa@zytor.com, Andy Lutomirski , Dave Hansen , Peter Zijlstra , Thomas Hellstrom , Jiri Slaby , Dan Williams , Tom Lendacky , Juergen Gross , Kees Cook , David Rientjes , Cfir Cohen , Erdem Aktas , Masami Hiramatsu , Mike Stunes , Joerg Roedel , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: Re: [PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions Message-ID: <20200520062055.GA17090@linux.intel.com> References: <20200428151725.31091-1-joro@8bytes.org> <20200428151725.31091-26-joro@8bytes.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200428151725.31091-26-joro@8bytes.org> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 28, 2020 at 05:16:35PM +0200, Joerg Roedel wrote: > From: Tom Lendacky > > Add support for decoding and handling #VC exceptions for IOIO events. > > Signed-off-by: Tom Lendacky > [ jroedel@suse.de: Adapted code to #VC handling framework ] > Co-developed-by: Joerg Roedel > Signed-off-by: Joerg Roedel > --- > arch/x86/boot/compressed/sev-es.c | 32 +++++ > arch/x86/kernel/sev-es-shared.c | 202 ++++++++++++++++++++++++++++++ > 2 files changed, 234 insertions(+) > > diff --git a/arch/x86/boot/compressed/sev-es.c b/arch/x86/boot/compressed/sev-es.c > index 1241697dd156..17765e471e28 100644 > --- a/arch/x86/boot/compressed/sev-es.c > +++ b/arch/x86/boot/compressed/sev-es.c > @@ -23,6 +23,35 @@ ... > +static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) > +{ > + struct pt_regs *regs = ctxt->regs; > + u64 exit_info_1, exit_info_2; > + enum es_result ret; > + > + ret = vc_ioio_exitinfo(ctxt, &exit_info_1); > + if (ret != ES_OK) > + return ret; > + > + if (exit_info_1 & IOIO_TYPE_STR) { > + int df = (regs->flags & X86_EFLAGS_DF) ? -1 : 1; > + unsigned int io_bytes, exit_bytes; > + unsigned int ghcb_count, op_count; > + unsigned long es_base; > + u64 sw_scratch; > + > + /* > + * For the string variants with rep prefix the amount of in/out > + * operations per #VC exception is limited so that the kernel > + * has a chance to take interrupts an re-schedule while the > + * instruction is emulated. Doesn't this also suppress single-step #DBs? > + */ > + io_bytes = (exit_info_1 >> 4) & 0x7; > + ghcb_count = sizeof(ghcb->shared_buffer) / io_bytes; > + > + op_count = (exit_info_1 & IOIO_REP) ? regs->cx : 1; > + exit_info_2 = min(op_count, ghcb_count); > + exit_bytes = exit_info_2 * io_bytes; > + > + es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES); > + > + if (!(exit_info_1 & IOIO_TYPE_IN)) { > + ret = vc_insn_string_read(ctxt, > + (void *)(es_base + regs->si), SEV(-ES) is 64-bit only, why bother with the es_base charade? > + ghcb->shared_buffer, io_bytes, > + exit_info_2, df); df handling is busted, it's aways non-zero. Same goes for the SI/DI adjustments below. > + if (ret) > + return ret; > + } > + > + sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer); > + ghcb_set_sw_scratch(ghcb, sw_scratch); > + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, > + exit_info_1, exit_info_2); > + if (ret != ES_OK) > + return ret; Batching the memory accesses and I/O accesses separately is technically wrong, e.g. a #DB on a memory access will result in bogus data being shown in the debugger. In practice it seems unlikely to matter, but I'm curious as to why string I/O is supported in the first place. I didn't think there was that much string I/O in the kernel? > + > + /* Everything went well, write back results */ > + if (exit_info_1 & IOIO_TYPE_IN) { > + ret = vc_insn_string_write(ctxt, > + (void *)(es_base + regs->di), > + ghcb->shared_buffer, io_bytes, > + exit_info_2, df); > + if (ret) > + return ret; > + > + if (df) > + regs->di -= exit_bytes; > + else > + regs->di += exit_bytes; > + } else { > + if (df) > + regs->si -= exit_bytes; > + else > + regs->si += exit_bytes; > + } > + > + if (exit_info_1 & IOIO_REP) > + regs->cx -= exit_info_2; > + > + ret = regs->cx ? ES_RETRY : ES_OK; > + > + } else { > + int bits = (exit_info_1 & 0x70) >> 1; > + u64 rax = 0; > + > + if (!(exit_info_1 & IOIO_TYPE_IN)) > + rax = lower_bits(regs->ax, bits); > + > + ghcb_set_rax(ghcb, rax); > + > + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0); > + if (ret != ES_OK) > + return ret; > + > + if (exit_info_1 & IOIO_TYPE_IN) { > + if (!ghcb_is_valid_rax(ghcb)) > + return ES_VMM_ERROR; > + regs->ax = lower_bits(ghcb->save.rax, bits); > + } > + } > + > + return ret; > +} > -- > 2.17.1 >