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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Operating-System: Linux phenom 5.6.0-1-amd64 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org On Wed, May 20, 2020 at 08:54:36AM +0200, Christian König wrote: > Am 19.05.20 um 15:27 schrieb Daniel Vetter: > > Do it uncontionally, there's a separate peek function with > > dma_fence_is_signalled() which can be called from atomic context. > > > > v2: Consensus calls for an unconditional might_sleep (Chris, > > Christian) > > > > Full audit: > > - dma-fence.h: Uses MAX_SCHEDULE_TIMOUT, good chance this sleeps > > - dma-resv.c: Timeout always at least 1 > > - st-dma-fence.c: Save to sleep in testcases > > - amdgpu_cs.c: Both callers are for variants of the wait ioctl > > - amdgpu_device.c: Two callers in vram recover code, both right next > > to mutex_lock. > > - amdgpu_vm.c: Use in the vm_wait ioctl, next to _reserve/unreserve > > - remaining functions in amdgpu: All for test_ib implementations for > > various engines, caller for that looks all safe (debugfs, driver > > load, reset) > > - etnaviv: another wait ioctl > > - habanalabs: another wait ioctl > > - nouveau_fence.c: hardcoded 15*HZ ... glorious > > - nouveau_gem.c: hardcoded 2*HZ ... so not even super consistent, but > > this one does have a WARN_ON :-/ At least this one is only a > > fallback path for when kmalloc fails. Maybe this should be put onto > > some worker list instead, instead of a work per unamp ... > > - i915/selftests: Hardecoded HZ / 4 or HZ / 8 > > - i915/gt/selftests: Going up the callchain looks safe looking at > > nearby callers > > - i915/gt/intel_gt_requests.c. Wrapped in a mutex_lock > > - i915/gem_i915_gem_wait.c: The i915-version which is called instead > > for i915 fences already has a might_sleep() annotation, so all good > > > > Cc: Alex Deucher > > Cc: Lucas Stach > > Cc: Jani Nikula > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Ben Skeggs > > Cc: "VMware Graphics" > > Cc: Oded Gabbay > > Cc: linux-media@vger.kernel.org > > Cc: linaro-mm-sig@lists.linaro.org > > Cc: linux-rdma@vger.kernel.org > > Cc: amd-gfx@lists.freedesktop.org > > Cc: intel-gfx@lists.freedesktop.org > > Cc: Chris Wilson > > Cc: Maarten Lankhorst > > Cc: Christian König > > Signed-off-by: Daniel Vetter > > Reviewed-by: Christian König intel-gfx-ci approves too, thanks to both of you for reviews, patch merged to drm-misc-next. -Daniel > > > --- > > drivers/dma-buf/dma-fence.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > index 90edf2b281b0..656e9ac2d028 100644 > > --- a/drivers/dma-buf/dma-fence.c > > +++ b/drivers/dma-buf/dma-fence.c > > @@ -208,6 +208,8 @@ dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) > > if (WARN_ON(timeout < 0)) > > return -EINVAL; > > + might_sleep(); > > + > > trace_dma_fence_wait_start(fence); > > if (fence->ops->wait) > > ret = fence->ops->wait(fence, intr, timeout); > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4673AC433DF for ; Wed, 20 May 2020 11:03:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 025D3206F1 for ; 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Wed, 20 May 2020 04:03:24 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id u65sm2743050wmg.8.2020.05.20.04.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2020 04:03:23 -0700 (PDT) Date: Wed, 20 May 2020 13:03:20 +0200 From: Daniel Vetter To: Christian =?iso-8859-1?Q?K=F6nig?= Subject: Re: [PATCH] dma-fence: add might_sleep annotation to _wait() Message-ID: <20200520110320.GT206103@phenom.ffwll.local> Mail-Followup-To: Christian =?iso-8859-1?Q?K=F6nig?= , DRI Development , LKML , Alex Deucher , Lucas Stach , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Ben Skeggs , VMware Graphics , Oded Gabbay , linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-rdma@vger.kernel.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Maarten Lankhorst , Daniel Vetter References: <20200519132756.682888-1-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.6.0-1-amd64 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: amd-gfx@lists.freedesktop.org, linux-rdma@vger.kernel.org, Daniel Vetter , intel-gfx@lists.freedesktop.org, LKML , Chris Wilson , linaro-mm-sig@lists.linaro.org, Ben Skeggs , VMware Graphics , DRI Development , Rodrigo Vivi , Alex Deucher , Daniel Vetter , linux-media@vger.kernel.org Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Wed, May 20, 2020 at 08:54:36AM +0200, Christian K=F6nig wrote: > Am 19.05.20 um 15:27 schrieb Daniel Vetter: > > Do it uncontionally, there's a separate peek function with > > dma_fence_is_signalled() which can be called from atomic context. > > = > > v2: Consensus calls for an unconditional might_sleep (Chris, > > Christian) > > = > > Full audit: > > - dma-fence.h: Uses MAX_SCHEDULE_TIMOUT, good chance this sleeps > > - dma-resv.c: Timeout always at least 1 > > - st-dma-fence.c: Save to sleep in testcases > > - amdgpu_cs.c: Both callers are for variants of the wait ioctl > > - amdgpu_device.c: Two callers in vram recover code, both right next > > to mutex_lock. > > - amdgpu_vm.c: Use in the vm_wait ioctl, next to _reserve/unreserve > > - remaining functions in amdgpu: All for test_ib implementations for > > various engines, caller for that looks all safe (debugfs, driver > > load, reset) > > - etnaviv: another wait ioctl > > - habanalabs: another wait ioctl > > - nouveau_fence.c: hardcoded 15*HZ ... glorious > > - nouveau_gem.c: hardcoded 2*HZ ... so not even super consistent, but > > this one does have a WARN_ON :-/ At least this one is only a > > fallback path for when kmalloc fails. Maybe this should be put onto > > some worker list instead, instead of a work per unamp ... > > - i915/selftests: Hardecoded HZ / 4 or HZ / 8 > > - i915/gt/selftests: Going up the callchain looks safe looking at > > nearby callers > > - i915/gt/intel_gt_requests.c. Wrapped in a mutex_lock > > - i915/gem_i915_gem_wait.c: The i915-version which is called instead > > for i915 fences already has a might_sleep() annotation, so all good > > = > > Cc: Alex Deucher > > Cc: Lucas Stach > > Cc: Jani Nikula > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Ben Skeggs > > Cc: "VMware Graphics" > > Cc: Oded Gabbay > > Cc: linux-media@vger.kernel.org > > Cc: linaro-mm-sig@lists.linaro.org > > Cc: linux-rdma@vger.kernel.org > > Cc: amd-gfx@lists.freedesktop.org > > Cc: intel-gfx@lists.freedesktop.org > > Cc: Chris Wilson > > Cc: Maarten Lankhorst > > Cc: Christian K=F6nig > > Signed-off-by: Daniel Vetter > = > Reviewed-by: Christian K=F6nig intel-gfx-ci approves too, thanks to both of you for reviews, patch merged to drm-misc-next. -Daniel > = > > --- > > drivers/dma-buf/dma-fence.c | 2 ++ > > 1 file changed, 2 insertions(+) > > = > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > index 90edf2b281b0..656e9ac2d028 100644 > > --- a/drivers/dma-buf/dma-fence.c > > +++ b/drivers/dma-buf/dma-fence.c > > @@ -208,6 +208,8 @@ dma_fence_wait_timeout(struct dma_fence *fence, boo= l intr, signed long timeout) > > if (WARN_ON(timeout < 0)) > > return -EINVAL; > > + might_sleep(); > > + > > trace_dma_fence_wait_start(fence); > > if (fence->ops->wait) > > ret =3D fence->ops->wait(fence, intr, timeout); > = -- = Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A8A0C433E0 for ; Wed, 20 May 2020 11:03:28 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BB085206F1 for ; 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Wed, 20 May 2020 04:03:24 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id u65sm2743050wmg.8.2020.05.20.04.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2020 04:03:23 -0700 (PDT) Date: Wed, 20 May 2020 13:03:20 +0200 From: Daniel Vetter To: Christian =?iso-8859-1?Q?K=F6nig?= Message-ID: <20200520110320.GT206103@phenom.ffwll.local> Mail-Followup-To: Christian =?iso-8859-1?Q?K=F6nig?= , DRI Development , LKML , Alex Deucher , Lucas Stach , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Ben Skeggs , VMware Graphics , Oded Gabbay , linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-rdma@vger.kernel.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Maarten Lankhorst , Daniel Vetter References: <20200519132756.682888-1-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.6.0-1-amd64 Subject: Re: [Intel-gfx] [PATCH] dma-fence: add might_sleep annotation to _wait() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Oded Gabbay , amd-gfx@lists.freedesktop.org, linux-rdma@vger.kernel.org, Daniel Vetter , intel-gfx@lists.freedesktop.org, LKML , Chris Wilson , linaro-mm-sig@lists.linaro.org, Ben Skeggs , VMware Graphics , DRI Development , Alex Deucher , Daniel Vetter , linux-media@vger.kernel.org, Lucas Stach Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, May 20, 2020 at 08:54:36AM +0200, Christian K=F6nig wrote: > Am 19.05.20 um 15:27 schrieb Daniel Vetter: > > Do it uncontionally, there's a separate peek function with > > dma_fence_is_signalled() which can be called from atomic context. > > = > > v2: Consensus calls for an unconditional might_sleep (Chris, > > Christian) > > = > > Full audit: > > - dma-fence.h: Uses MAX_SCHEDULE_TIMOUT, good chance this sleeps > > - dma-resv.c: Timeout always at least 1 > > - st-dma-fence.c: Save to sleep in testcases > > - amdgpu_cs.c: Both callers are for variants of the wait ioctl > > - amdgpu_device.c: Two callers in vram recover code, both right next > > to mutex_lock. > > - amdgpu_vm.c: Use in the vm_wait ioctl, next to _reserve/unreserve > > - remaining functions in amdgpu: All for test_ib implementations for > > various engines, caller for that looks all safe (debugfs, driver > > load, reset) > > - etnaviv: another wait ioctl > > - habanalabs: another wait ioctl > > - nouveau_fence.c: hardcoded 15*HZ ... glorious > > - nouveau_gem.c: hardcoded 2*HZ ... so not even super consistent, but > > this one does have a WARN_ON :-/ At least this one is only a > > fallback path for when kmalloc fails. Maybe this should be put onto > > some worker list instead, instead of a work per unamp ... > > - i915/selftests: Hardecoded HZ / 4 or HZ / 8 > > - i915/gt/selftests: Going up the callchain looks safe looking at > > nearby callers > > - i915/gt/intel_gt_requests.c. Wrapped in a mutex_lock > > - i915/gem_i915_gem_wait.c: The i915-version which is called instead > > for i915 fences already has a might_sleep() annotation, so all good > > = > > Cc: Alex Deucher > > Cc: Lucas Stach > > Cc: Jani Nikula > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Ben Skeggs > > Cc: "VMware Graphics" > > Cc: Oded Gabbay > > Cc: linux-media@vger.kernel.org > > Cc: linaro-mm-sig@lists.linaro.org > > Cc: linux-rdma@vger.kernel.org > > Cc: amd-gfx@lists.freedesktop.org > > Cc: intel-gfx@lists.freedesktop.org > > Cc: Chris Wilson > > Cc: Maarten Lankhorst > > Cc: Christian K=F6nig > > Signed-off-by: Daniel Vetter > = > Reviewed-by: Christian K=F6nig intel-gfx-ci approves too, thanks to both of you for reviews, patch merged to drm-misc-next. -Daniel > = > > --- > > drivers/dma-buf/dma-fence.c | 2 ++ > > 1 file changed, 2 insertions(+) > > = > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > index 90edf2b281b0..656e9ac2d028 100644 > > --- a/drivers/dma-buf/dma-fence.c > > +++ b/drivers/dma-buf/dma-fence.c > > @@ -208,6 +208,8 @@ dma_fence_wait_timeout(struct dma_fence *fence, boo= l intr, signed long timeout) > > if (WARN_ON(timeout < 0)) > > return -EINVAL; > > + might_sleep(); > > + > > trace_dma_fence_wait_start(fence); > > if (fence->ops->wait) > > ret =3D fence->ops->wait(fence, intr, timeout); > = -- = Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 792ECC433E3 for ; Wed, 20 May 2020 11:03:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4F2CA206F1 for ; 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Wed, 20 May 2020 04:03:24 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id u65sm2743050wmg.8.2020.05.20.04.03.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 May 2020 04:03:23 -0700 (PDT) Date: Wed, 20 May 2020 13:03:20 +0200 From: Daniel Vetter To: Christian =?iso-8859-1?Q?K=F6nig?= Subject: Re: [PATCH] dma-fence: add might_sleep annotation to _wait() Message-ID: <20200520110320.GT206103@phenom.ffwll.local> Mail-Followup-To: Christian =?iso-8859-1?Q?K=F6nig?= , DRI Development , LKML , Alex Deucher , Lucas Stach , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Ben Skeggs , VMware Graphics , Oded Gabbay , linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, linux-rdma@vger.kernel.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Chris Wilson , Maarten Lankhorst , Daniel Vetter References: <20200519132756.682888-1-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Operating-System: Linux phenom 5.6.0-1-amd64 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Oded Gabbay , amd-gfx@lists.freedesktop.org, linux-rdma@vger.kernel.org, Daniel Vetter , intel-gfx@lists.freedesktop.org, Joonas Lahtinen , Maarten Lankhorst , LKML , Jani Nikula , Chris Wilson , linaro-mm-sig@lists.linaro.org, Ben Skeggs , VMware Graphics , DRI Development , Rodrigo Vivi , Alex Deucher , Daniel Vetter , linux-media@vger.kernel.org, Lucas Stach Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Wed, May 20, 2020 at 08:54:36AM +0200, Christian K=F6nig wrote: > Am 19.05.20 um 15:27 schrieb Daniel Vetter: > > Do it uncontionally, there's a separate peek function with > > dma_fence_is_signalled() which can be called from atomic context. > > = > > v2: Consensus calls for an unconditional might_sleep (Chris, > > Christian) > > = > > Full audit: > > - dma-fence.h: Uses MAX_SCHEDULE_TIMOUT, good chance this sleeps > > - dma-resv.c: Timeout always at least 1 > > - st-dma-fence.c: Save to sleep in testcases > > - amdgpu_cs.c: Both callers are for variants of the wait ioctl > > - amdgpu_device.c: Two callers in vram recover code, both right next > > to mutex_lock. > > - amdgpu_vm.c: Use in the vm_wait ioctl, next to _reserve/unreserve > > - remaining functions in amdgpu: All for test_ib implementations for > > various engines, caller for that looks all safe (debugfs, driver > > load, reset) > > - etnaviv: another wait ioctl > > - habanalabs: another wait ioctl > > - nouveau_fence.c: hardcoded 15*HZ ... glorious > > - nouveau_gem.c: hardcoded 2*HZ ... so not even super consistent, but > > this one does have a WARN_ON :-/ At least this one is only a > > fallback path for when kmalloc fails. Maybe this should be put onto > > some worker list instead, instead of a work per unamp ... > > - i915/selftests: Hardecoded HZ / 4 or HZ / 8 > > - i915/gt/selftests: Going up the callchain looks safe looking at > > nearby callers > > - i915/gt/intel_gt_requests.c. Wrapped in a mutex_lock > > - i915/gem_i915_gem_wait.c: The i915-version which is called instead > > for i915 fences already has a might_sleep() annotation, so all good > > = > > Cc: Alex Deucher > > Cc: Lucas Stach > > Cc: Jani Nikula > > Cc: Joonas Lahtinen > > Cc: Rodrigo Vivi > > Cc: Ben Skeggs > > Cc: "VMware Graphics" > > Cc: Oded Gabbay > > Cc: linux-media@vger.kernel.org > > Cc: linaro-mm-sig@lists.linaro.org > > Cc: linux-rdma@vger.kernel.org > > Cc: amd-gfx@lists.freedesktop.org > > Cc: intel-gfx@lists.freedesktop.org > > Cc: Chris Wilson > > Cc: Maarten Lankhorst > > Cc: Christian K=F6nig > > Signed-off-by: Daniel Vetter > = > Reviewed-by: Christian K=F6nig intel-gfx-ci approves too, thanks to both of you for reviews, patch merged to drm-misc-next. -Daniel > = > > --- > > drivers/dma-buf/dma-fence.c | 2 ++ > > 1 file changed, 2 insertions(+) > > = > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > index 90edf2b281b0..656e9ac2d028 100644 > > --- a/drivers/dma-buf/dma-fence.c > > +++ b/drivers/dma-buf/dma-fence.c > > @@ -208,6 +208,8 @@ dma_fence_wait_timeout(struct dma_fence *fence, boo= l intr, signed long timeout) > > if (WARN_ON(timeout < 0)) > > return -EINVAL; > > + might_sleep(); > > + > > trace_dma_fence_wait_start(fence); > > if (fence->ops->wait) > > ret =3D fence->ops->wait(fence, intr, timeout); > = -- = Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx