From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 60953C433E0 for ; Tue, 26 May 2020 14:46:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 25C692075F for ; Tue, 26 May 2020 14:46:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="xCOfbghw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 25C692075F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:37408 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jdaqA-0003el-Co for qemu-devel@archiver.kernel.org; Tue, 26 May 2020 10:46:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41780) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jdapS-00030c-2f; Tue, 26 May 2020 10:45:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:42132) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jdapQ-0003eV-4l; Tue, 26 May 2020 10:45:17 -0400 Received: from C02WT3WMHTD6 (unknown [199.255.45.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EF8A020723; Tue, 26 May 2020 14:45:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590504313; bh=cqFvR4GIJ2BQ8bCOc+ERQaf3fKKRUiw8HRuB4AqxcT8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=xCOfbghwJceh5aAqWFcxSyJu5y3C/9Yra3rC3Wp6nayEeZYCFznqc5D9MtB7DE//v TKtkstGNirxk01Ysay53fnxtrjjWoqabnc43mm+E+xdF5l3zrvwXToaEGgm0SIcRKo wgk1lyoQIToOpc8fGwP/oPW+x8kNi81uhbL/AJGo= Date: Tue, 26 May 2020 08:45:09 -0600 From: Keith Busch To: Klaus Jensen Subject: Re: [PATCH v6 07/20] hw/block/nvme: fix pin-based interrupt behavior Message-ID: <20200526144509.GA7809@C02WT3WMHTD6> References: <20200514044611.734782-1-its@irrelevant.dk> <20200514044611.734782-8-its@irrelevant.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200514044611.734782-8-its@irrelevant.dk> User-Agent: Mutt/1.12.1 (2019-06-15) Received-SPF: pass client-ip=198.145.29.99; envelope-from=kbusch@kernel.org; helo=mail.kernel.org X-detected-operating-system: by eggs.gnu.org: First seen = 2020/05/26 10:45:13 X-ACL-Warn: Detected OS = Linux 3.11 and newer X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, "Michael S. Tsirkin" , Klaus Jensen , qemu-devel@nongnu.org, Max Reitz , Javier Gonzalez , Maxim Levitsky , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, May 14, 2020 at 06:45:58AM +0200, Klaus Jensen wrote: > From: Klaus Jensen > > First, since the device only supports MSI-X or pin-based interrupt, if > MSI-X is not enabled, it should not accept interrupt vectors different > from 0 when creating completion queues. > > Secondly, the irq_status NvmeCtrl member is meant to be compared to the > INTMS register, so it should only be 32 bits wide. And it is really only > useful when used with multi-message MSI. > > Third, since we do not force a 1-to-1 correspondence between cqid and > interrupt vector, the irq_status register should not have bits set > according to cqid, but according to the associated interrupt vector. > > Fix these issues, but keep irq_status available so we can easily support > multi-message MSI down the line. Looks good. Reviewed-by: Keith Busch