[PATCH 1/1] dt-bindings: rng: Convert OMAP RNG to schema

* [PATCH 1/1] dt-bindings: rng: Convert OMAP RNG to schema
@ 2020-05-14 13:19 Tero Kristo
  2020-05-28 15:27 ` Rob Herring
  0 siblings, 1 reply; 4+ messages in thread
From: Tero Kristo @ 2020-05-14 13:19 UTC (permalink / raw)
  To: robh+dt, devicetree; +Cc: linux-crypto, herbert, mpm

Convert TI OMAP Random number generator bindings to DT schema.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 .../devicetree/bindings/rng/omap_rng.txt      | 38 ---------
 .../devicetree/bindings/rng/ti,omap-rng.yaml  | 77 +++++++++++++++++++
 2 files changed, 77 insertions(+), 38 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/rng/omap_rng.txt
 create mode 100644 Documentation/devicetree/bindings/rng/ti,omap-rng.yaml

diff --git a/Documentation/devicetree/bindings/rng/omap_rng.txt b/Documentation/devicetree/bindings/rng/omap_rng.txt
deleted file mode 100644
index ea434ce50f36..000000000000
--- a/Documentation/devicetree/bindings/rng/omap_rng.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-OMAP SoC and Inside-Secure HWRNG Module
-
-Required properties:
-
-- compatible : Should contain entries for this and backward compatible
-  RNG versions:
-  - "ti,omap2-rng" for OMAP2.
-  - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX.
-  - "inside-secure,safexcel-eip76" for SoCs with EIP76 IP block
-  Note that these two versions are incompatible.
-- ti,hwmods: Name of the hwmod associated with the RNG module
-- reg : Offset and length of the register set for the module
-- interrupts : the interrupt number for the RNG module.
-		Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76"
-- clocks: the trng clock source. Only mandatory for the
-  "inside-secure,safexcel-eip76" compatible, the second clock is
-  needed for the Armada 7K/8K SoCs
-- clock-names: mandatory if there is a second clock, in this case the
-  name must be "core" for the first clock and "reg" for the second
-  one
-
-
-Example:
-/* AM335x */
-rng: rng@48310000 {
-	compatible = "ti,omap4-rng";
-	ti,hwmods = "rng";
-	reg = <0x48310000 0x2000>;
-	interrupts = <111>;
-};
-
-/* SafeXcel IP-76 */
-trng: rng@f2760000 {
-	compatible = "inside-secure,safexcel-eip76";
-	reg = <0xf2760000 0x7d>;
-	interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-	clocks = <&cpm_syscon0 1 25>;
-};
diff --git a/Documentation/devicetree/bindings/rng/ti,omap-rng.yaml b/Documentation/devicetree/bindings/rng/ti,omap-rng.yaml
new file mode 100644
index 000000000000..b37d73295e9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/ti,omap-rng.yaml
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rng/ti,omap-rng.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: OMAP SoC and Inside-Secure HWRNG Module
+
+maintainers:
+  - Tero Kristo <t-kristo@ti.com>
+
+properties:
+  compatible:
+    enum:
+      - ti,omap2-rng
+      - ti,omap4-rng
+      - inside-secure,safexcel-eip76
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    description:
+      The TRNG clock source. Only mandatory for the
+      "inside-secure,safexcel-eip76" compatible, the second clock is needed
+      for the Armada 7K/8K SoCs
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: core
+      - const: reg
+
+  ti,hwmods:
+    description: TI hwmod name
+    deprecated: true
+    $ref: /schemas/types.yaml#/definitions/string-array
+    items:
+      const: rng
+
+required:
+  - compatible
+  - reg
+
+if:
+  properties:
+    compatible:
+      enum:
+        - inside-secure,safexcel-eip76
+then:
+  required:
+    - clocks
+
+examples:
+  - |
+    /* AM335x */
+    rng: rng@48310000 {
+      compatible = "ti,omap4-rng";
+      ti,hwmods = "rng";
+      reg = <0x48310000 0x2000>;
+      interrupts = <111>;
+    };
+
+  - |+
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    /* SafeXcel IP-76 */
+    trng: rng@f2760000 {
+      compatible = "inside-secure,safexcel-eip76";
+      reg = <0xf2760000 0x7d>;
+      interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&cpm_syscon0 1 25>;
+    };
+...
-- 
2.17.1

--
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