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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id t2sm5551524pgh.89.2020.05.28.19.53.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2020 19:53:51 -0700 (PDT) Date: Thu, 28 May 2020 19:52:46 -0700 From: Bjorn Andersson To: Jonathan Marek Cc: linux-arm-msm@vger.kernel.org, Andy Gross , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list Subject: Re: [PATCH 1/6] arm64: dts: qcom: sm8150: add apps_smmu node Message-ID: <20200529025246.GV279327@builder.lan> References: <20200524023815.21789-1-jonathan@marek.ca> <20200524023815.21789-2-jonathan@marek.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200524023815.21789-2-jonathan@marek.ca> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Sat 23 May 19:38 PDT 2020, Jonathan Marek wrote: > Add the apps_smmu node for sm8150. Note that adding the iommus field for > UFS is required because initializing the iommu removes the bypass mapping > that created by the bootloader. > Unrelated to the patch itself; how do you disable the splash screen on 8150? "fastboot oem select-display-panel none" doesn't seem to work for me on the MTP - and hence this would prevent my device from booting. Thanks, Bjorn > Signed-off-by: Jonathan Marek > --- > arch/arm64/boot/dts/qcom/sm8150.dtsi | 91 ++++++++++++++++++++++++++++ > 1 file changed, 91 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index a36512d1f6a1..acb839427b12 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -442,6 +442,8 @@ ufs_mem_hc: ufshc@1d84000 { > resets = <&gcc GCC_UFS_PHY_BCR>; > reset-names = "rst"; > > + iommus = <&apps_smmu 0x300 0>; > + > clock-names = > "core_clk", > "bus_aggr_clk", > @@ -706,6 +708,7 @@ usb_1_dwc3: dwc3@a600000 { > compatible = "snps,dwc3"; > reg = <0 0x0a600000 0 0xcd00>; > interrupts = ; > + iommus = <&apps_smmu 0x140 0>; > snps,dis_u2_susphy_quirk; > snps,dis_enblslpm_quirk; > phys = <&usb_1_hsphy>, <&usb_1_ssphy>; > @@ -742,6 +745,94 @@ spmi_bus: spmi@c440000 { > cell-index = <0>; > }; > > + apps_smmu: iommu@15000000 { > + compatible = "qcom,sdm845-smmu-500", "arm,mmu-500"; > + reg = <0 0x15000000 0 0x100000>; > + #iommu-cells = <2>; > + #global-interrupts = <1>; > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + }; > + > remoteproc_adsp: remoteproc@17300000 { > compatible = "qcom,sm8150-adsp-pas"; > reg = <0x0 0x17300000 0x0 0x4040>; > -- > 2.26.1 >