From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D91F9C433DF for ; Sat, 30 May 2020 13:26:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B7BC820810 for ; Sat, 30 May 2020 13:26:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728966AbgE3N0k (ORCPT ); Sat, 30 May 2020 09:26:40 -0400 Received: from honk.sigxcpu.org ([24.134.29.49]:42442 "EHLO honk.sigxcpu.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728797AbgE3N0j (ORCPT ); Sat, 30 May 2020 09:26:39 -0400 Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id B933EFB03; Sat, 30 May 2020 15:26:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jH8te9rYstS2; Sat, 30 May 2020 15:26:35 +0200 (CEST) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id A29C944AF9; Sat, 30 May 2020 15:26:34 +0200 (CEST) Date: Sat, 30 May 2020 15:26:34 +0200 From: Guido =?iso-8859-1?Q?G=FCnther?= To: Rob Herring Cc: Laurent Pinchart , David Airlie , Daniel Vetter , Shawn Guo , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Andrzej Hajda , Sam Ravnborg , Anson Huang , Leonard Crestez , Lucas Stach , Peng Fan , Robert Chiras , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH 1/6] dt-bindings: display/bridge: Add binding for input mux bridge Message-ID: <20200530132634.GA3337@bogon.m.sigxcpu.org> References: <14a44a664f40584ffa25c1764aab5ebf97809c71.1589548223.git.agx@sigxcpu.org> <20200528194804.GA541078@bogus> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20200528194804.GA541078@bogus> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On Thu, May 28, 2020 at 01:48:04PM -0600, Rob Herring wrote: > On Fri, May 15, 2020 at 03:12:10PM +0200, Guido Günther wrote: > > The bridge allows to select the input source via a mux controller. > > > > Signed-off-by: Guido Günther > > --- > > .../display/bridge/mux-input-bridge.yaml | 123 ++++++++++++++++++ > > 1 file changed, 123 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/mux-input-bridge.yaml > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/mux-input-bridge.yaml b/Documentation/devicetree/bindings/display/bridge/mux-input-bridge.yaml > > new file mode 100644 > > index 000000000000..4029cf63ee5c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/mux-input-bridge.yaml > > @@ -0,0 +1,123 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/bridge/mux-input-bridge.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: DRM input source selection via multiplexer > > DRM is not a hardware thing. I thought about naming the mux pixel-input-mux (input-mux sounding too generic) but then i hit rockchip-drm and went for that name. The binding itself is not a drm thing in itself it really aims to model how the mux is placed in the 'display pipeline' of the SoC (as Laurent explained). Should I go with pixel-input-mux? > The graph binding is already designed to support muxing. Generally, > multiple endpoints on an input node is a mux. So either the device with > the input ports knows how to select the input, or you just need a > mux-control property for the port to have some other device implement > the control. A mux control property is how it's modeled at the moment but that is very SoC specific. > You could do it like you have below. That would be appropriate if > there's a separate h/w device controlling the muxing. Say for example > some board level device controlled by i2c. It's a different part of the SoC that lives in a register range very separate (iomuxc_gpr) from MIPI/DSI (nwl). Does that qualify? Cheers, -- Guido > > Rob > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8C26C433E0 for ; Sat, 30 May 2020 13:27:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 998B420723 for ; Sat, 30 May 2020 13:27:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="U2+NY5ya" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 998B420723 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sigxcpu.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E33TqR7Nny1ctkxU46lpFXphRMQfYJtVJ5at5/80dYA=; b=U2+NY5yaOXswiL kauVIDO1KA/lLqSTSHB1EG3wbMeZ7hAMz8Bl3pk4AHyCH03QwuMdIYmfRLrDVIPTrcQPJwQ0NvtE9 mCGeTsEaSLqHZ1YRj6Ce95kl7KQJNv2k6bIxr5ZlzBAoKadcO+Br5IpahTu+Z7aQBakOlnW48uA3N LBMyTAeZTVo1us/4TcU+He8JSdwGNGBU+ZgAakrjB41qkcejyvS3YlHEtbcyksvb2Vv4XtE9+Opuo gqcau3Y/lbI7+SJ1soraueq2/JZHNDVgPqTzhT3p/s31cJK0ESJ+7pWXm03fTLOVcynnsTZMMYdOw 2BIdQ9M5d9yUna08vUUw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jf1Vl-0003FB-FR; Sat, 30 May 2020 13:26:53 +0000 Received: from honk.sigxcpu.org ([24.134.29.49]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jf1Vg-0003E1-NB for linux-arm-kernel@lists.infradead.org; Sat, 30 May 2020 13:26:50 +0000 Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id B933EFB03; Sat, 30 May 2020 15:26:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jH8te9rYstS2; Sat, 30 May 2020 15:26:35 +0200 (CEST) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id A29C944AF9; Sat, 30 May 2020 15:26:34 +0200 (CEST) Date: Sat, 30 May 2020 15:26:34 +0200 From: Guido =?iso-8859-1?Q?G=FCnther?= To: Rob Herring Subject: Re: [RFC PATCH 1/6] dt-bindings: display/bridge: Add binding for input mux bridge Message-ID: <20200530132634.GA3337@bogon.m.sigxcpu.org> References: <14a44a664f40584ffa25c1764aab5ebf97809c71.1589548223.git.agx@sigxcpu.org> <20200528194804.GA541078@bogus> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200528194804.GA541078@bogus> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200530_062648_914281_0FBD7572 X-CRM114-Status: GOOD ( 18.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Peng Fan , Pengutronix Kernel Team , Sam Ravnborg , Anson Huang , David Airlie , Shawn Guo , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Andrzej Hajda , Laurent Pinchart , Daniel Vetter , Lucas Stach , Robert Chiras , Leonard Crestez , Fabio Estevam , linux-arm-kernel@lists.infradead.org, NXP Linux Team Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Rob, On Thu, May 28, 2020 at 01:48:04PM -0600, Rob Herring wrote: > On Fri, May 15, 2020 at 03:12:10PM +0200, Guido G=FCnther wrote: > > The bridge allows to select the input source via a mux controller. > > = > > Signed-off-by: Guido G=FCnther > > --- > > .../display/bridge/mux-input-bridge.yaml | 123 ++++++++++++++++++ > > 1 file changed, 123 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/mu= x-input-bridge.yaml > > = > > diff --git a/Documentation/devicetree/bindings/display/bridge/mux-input= -bridge.yaml b/Documentation/devicetree/bindings/display/bridge/mux-input-b= ridge.yaml > > new file mode 100644 > > index 000000000000..4029cf63ee5c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/mux-input-bridge= .yaml > > @@ -0,0 +1,123 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/bridge/mux-input-bridge.yam= l# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: DRM input source selection via multiplexer > = > DRM is not a hardware thing. I thought about naming the mux pixel-input-mux (input-mux sounding too generic) but then i hit rockchip-drm and went for that name. The binding itself is not a drm thing in itself it really aims to model how the mux is placed in the 'display pipeline' of the SoC (as Laurent explained). Should I go with pixel-input-mux? > The graph binding is already designed to support muxing. Generally, = > multiple endpoints on an input node is a mux. So either the device with = > the input ports knows how to select the input, or you just need a = > mux-control property for the port to have some other device implement = > the control. A mux control property is how it's modeled at the moment but that is very SoC specific. > You could do it like you have below. That would be appropriate if = > there's a separate h/w device controlling the muxing. Say for example = > some board level device controlled by i2c. It's a different part of the SoC that lives in a register range very separate (iomuxc_gpr) from MIPI/DSI (nwl). Does that qualify? Cheers, -- Guido > = > Rob > = _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C81CC433DF for ; Sat, 30 May 2020 13:26:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD77420723 for ; Sat, 30 May 2020 13:26:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DD77420723 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sigxcpu.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 54FA16E069; Sat, 30 May 2020 13:26:40 +0000 (UTC) Received: from honk.sigxcpu.org (honk.sigxcpu.org [24.134.29.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 63BF46E069 for ; Sat, 30 May 2020 13:26:39 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id B933EFB03; Sat, 30 May 2020 15:26:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jH8te9rYstS2; Sat, 30 May 2020 15:26:35 +0200 (CEST) Received: by bogon.sigxcpu.org (Postfix, from userid 1000) id A29C944AF9; Sat, 30 May 2020 15:26:34 +0200 (CEST) Date: Sat, 30 May 2020 15:26:34 +0200 From: Guido =?iso-8859-1?Q?G=FCnther?= To: Rob Herring Subject: Re: [RFC PATCH 1/6] dt-bindings: display/bridge: Add binding for input mux bridge Message-ID: <20200530132634.GA3337@bogon.m.sigxcpu.org> References: <14a44a664f40584ffa25c1764aab5ebf97809c71.1589548223.git.agx@sigxcpu.org> <20200528194804.GA541078@bogus> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200528194804.GA541078@bogus> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Peng Fan , Sam Ravnborg , Anson Huang , David Airlie , Shawn Guo , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Andrzej Hajda , Laurent Pinchart , Pengutronix Kernel Team , Robert Chiras , Leonard Crestez , linux-arm-kernel@lists.infradead.org, NXP Linux Team Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Rob, On Thu, May 28, 2020 at 01:48:04PM -0600, Rob Herring wrote: > On Fri, May 15, 2020 at 03:12:10PM +0200, Guido G=FCnther wrote: > > The bridge allows to select the input source via a mux controller. > > = > > Signed-off-by: Guido G=FCnther > > --- > > .../display/bridge/mux-input-bridge.yaml | 123 ++++++++++++++++++ > > 1 file changed, 123 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/display/bridge/mu= x-input-bridge.yaml > > = > > diff --git a/Documentation/devicetree/bindings/display/bridge/mux-input= -bridge.yaml b/Documentation/devicetree/bindings/display/bridge/mux-input-b= ridge.yaml > > new file mode 100644 > > index 000000000000..4029cf63ee5c > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/bridge/mux-input-bridge= .yaml > > @@ -0,0 +1,123 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/bridge/mux-input-bridge.yam= l# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: DRM input source selection via multiplexer > = > DRM is not a hardware thing. I thought about naming the mux pixel-input-mux (input-mux sounding too generic) but then i hit rockchip-drm and went for that name. The binding itself is not a drm thing in itself it really aims to model how the mux is placed in the 'display pipeline' of the SoC (as Laurent explained). Should I go with pixel-input-mux? > The graph binding is already designed to support muxing. Generally, = > multiple endpoints on an input node is a mux. So either the device with = > the input ports knows how to select the input, or you just need a = > mux-control property for the port to have some other device implement = > the control. A mux control property is how it's modeled at the moment but that is very SoC specific. > You could do it like you have below. That would be appropriate if = > there's a separate h/w device controlling the muxing. Say for example = > some board level device controlled by i2c. It's a different part of the SoC that lives in a register range very separate (iomuxc_gpr) from MIPI/DSI (nwl). Does that qualify? Cheers, -- Guido > = > Rob > = _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel