From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E97F5C433E0 for ; Sun, 31 May 2020 10:49:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C6FD0207F9 for ; Sun, 31 May 2020 10:49:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590922155; bh=HQBjc0HN0JGQjbIvdSLMnyVxmEFb8nZnCa4Dgg0s05Y=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=CdHKGuinUUNEPIzpFZ3AD9gNidgGpna1Jhcc7MXs/z54Vy+Fi5vIHKKVdOorXA3nJ hHI+L8kKmEDKTEOnfZJyTLx4j5SdElqCO1ikTUfmjSq1fAXM42MwD/Tg/eMSQ0vPR6 nYfd5eQjmx4n2pzhUCCOcyIxB6QiFm/b+tOIrt4Y= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728165AbgEaKtP (ORCPT ); Sun, 31 May 2020 06:49:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:54466 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725813AbgEaKtO (ORCPT ); Sun, 31 May 2020 06:49:14 -0400 Received: from archlinux (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2C3DE2074A; Sun, 31 May 2020 10:49:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590922154; bh=HQBjc0HN0JGQjbIvdSLMnyVxmEFb8nZnCa4Dgg0s05Y=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Ak+zy/gRNNoAq2/87WGmX7H7upM9nu/Qx5Tpfyh2PXn0DFq2Hv88Hg/OOK+nsiYV+ 4+HPb/EeiRF+hjCs+JGWzkRAL6x5dLnmJcW0qDmO8BXIObFNiBMm5WYBiLszdyTZBe h5BZZyF6Lmdvnf1TdcceeVUUaRuRoXMh9gRKj5jQ= Date: Sun, 31 May 2020 11:49:08 +0100 From: Jonathan Cameron To: Jishnu Prakash Cc: agross@kernel.org, bjorn.andersson@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mka@chromium.org, linus.walleij@linaro.org, Jonathan.Cameron@huawei.com, andy.shevchenko@gmail.com, amit.kucheria@verdurent.com, smohanad@codeaurora.org, kgunda@codeaurora.org, aghayal@codeaurora.org, Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org, linux-arm-msm-owner@vger.kernel.org Subject: Re: [PATCH V6 5/7] iio: adc: Update return value checks Message-ID: <20200531114908.004ad79a@archlinux> In-Reply-To: <1590684869-15400-6-git-send-email-jprakash@codeaurora.org> References: <1590684869-15400-1-git-send-email-jprakash@codeaurora.org> <1590684869-15400-6-git-send-email-jprakash@codeaurora.org> X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, 28 May 2020 22:24:27 +0530 Jishnu Prakash wrote: > Clean up some return value checks to make code more compact. > > Signed-off-by: Jishnu Prakash Applied. Thanks, J > --- > drivers/iio/adc/qcom-spmi-adc5.c | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c > index dcc7599..3022313 100644 > --- a/drivers/iio/adc/qcom-spmi-adc5.c > +++ b/drivers/iio/adc/qcom-spmi-adc5.c > @@ -301,7 +301,7 @@ static int adc5_configure(struct adc5_chip *adc, > > /* Read registers 0x42 through 0x46 */ > ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); > - if (ret < 0) > + if (ret) > return ret; > > /* Digital param selection */ > @@ -388,7 +388,7 @@ static int adc5_do_conversion(struct adc5_chip *adc, > > if (adc->poll_eoc) { > ret = adc5_poll_wait_eoc(adc); > - if (ret < 0) { > + if (ret) { > pr_err("EOC bit not set\n"); > goto unlock; > } > @@ -398,7 +398,7 @@ static int adc5_do_conversion(struct adc5_chip *adc, > if (!ret) { > pr_debug("Did not get completion timeout.\n"); > ret = adc5_poll_wait_eoc(adc); > - if (ret < 0) { > + if (ret) { > pr_err("EOC bit not set\n"); > goto unlock; > } > @@ -516,8 +516,6 @@ static int adc5_read_raw(struct iio_dev *indio_dev, > default: > return -EINVAL; > } > - > - return 0; > } > > static int adc7_read_raw(struct iio_dev *indio_dev, > @@ -761,7 +759,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc, > > ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version, > sizeof(dig_version)); > - if (ret < 0) { > + if (ret) { > dev_err(dev, "Invalid dig version read %d\n", ret); > return ret; > }