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From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Subject: [PATCH 09/10] hw/sh4: Convert to renesas_timer.c
Date: Mon,  1 Jun 2020 01:24:26 +0900	[thread overview]
Message-ID: <20200531162427.57410-10-ysato@users.sourceforge.jp> (raw)
In-Reply-To: <20200531162427.57410-1-ysato@users.sourceforge.jp>

Using unified TMU/CMT module.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 include/hw/sh4/sh.h    | 10 ---------
 hw/sh4/sh7750.c        | 47 +++++++++++++++++++++++++++++++++---------
 hw/sh4/Kconfig         |  2 +-
 hw/timer/Makefile.objs |  1 -
 4 files changed, 38 insertions(+), 22 deletions(-)

diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index e184b4b300..248cc052e1 100644
--- a/include/hw/sh4/sh.h
+++ b/include/hw/sh4/sh.h
@@ -28,16 +28,6 @@ typedef struct {
 
 int sh7750_register_io_device(struct SH7750State *s,
 			      sh7750_io_device * device);
-/* sh_timer.c */
-#define TMU012_FEAT_TOCR   (1 << 0)
-#define TMU012_FEAT_3CHAN  (1 << 1)
-#define TMU012_FEAT_EXTCLK (1 << 2)
-void tmu012_init(struct MemoryRegion *sysmem, hwaddr base,
-                 int feat, uint32_t freq,
-		 qemu_irq ch0_irq, qemu_irq ch1_irq,
-		 qemu_irq ch2_irq0, qemu_irq ch2_irq1);
-
-
 /* sh7750.c */
 qemu_irq sh7750_irl(struct SH7750State *s);
 
diff --git a/hw/sh4/sh7750.c b/hw/sh4/sh7750.c
index 150d3029f7..733c4009e1 100644
--- a/hw/sh4/sh7750.c
+++ b/hw/sh4/sh7750.c
@@ -32,6 +32,7 @@
 #include "sh7750_regnames.h"
 #include "hw/sh4/sh_intc.h"
 #include "hw/char/renesas_sci.h"
+#include "hw/timer/renesas_timer.h"
 #include "hw/qdev-properties.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
@@ -756,13 +757,13 @@ static const MemoryRegionOps sh7750_mmct_ops = {
 };
 
 static void sh_serial_init(SH7750State *s, MemoryRegion *sysmem,
-                    hwaddr base, int feat,
-                    uint32_t freq, Chardev *chr,
-                    qemu_irq eri_source,
-                    qemu_irq rxi_source,
-                    qemu_irq txi_source,
-                    qemu_irq tei_source,
-                    qemu_irq bri_source)
+                           hwaddr base, int feat,
+                           uint32_t freq, Chardev *chr,
+                           qemu_irq eri_source,
+                           qemu_irq rxi_source,
+                           qemu_irq txi_source,
+                           qemu_irq tei_source,
+                           qemu_irq bri_source)
 {
     DeviceState *dev;
     SysBusDevice *sci;
@@ -789,6 +790,31 @@ static void sh_serial_init(SH7750State *s, MemoryRegion *sysmem,
     }
 }
 
+static void tmu012_init(SH7750State *s, MemoryRegion *sysmem, hwaddr base,
+                        int feat, uint32_t freq,
+                        qemu_irq ch0_irq, qemu_irq ch1_irq,
+                        qemu_irq ch2_irq0, qemu_irq ch2_irq1)
+{
+    DeviceState *dev;
+    SysBusDevice *tmu;
+
+    dev = qdev_create(NULL, TYPE_RENESAS_TIMER);
+
+    tmu = SYS_BUS_DEVICE(dev);
+
+    qdev_prop_set_uint64(dev, "input-freq", freq);
+    qdev_prop_set_int32(dev, "feature", feat);
+    qdev_init_nofail(dev);
+    sysbus_mmio_map(tmu, 0, base);
+    sysbus_mmio_map(tmu, 1, P4ADDR(base));
+    sysbus_mmio_map(tmu, 2, A7ADDR(base));
+    sysbus_connect_irq(tmu, 0, ch0_irq);
+    sysbus_connect_irq(tmu, 1, ch1_irq);
+    if (ch2_irq0) {
+        sysbus_connect_irq(tmu, 2, ch2_irq0);
+    }
+}
+
 SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
 {
     SH7750State *s;
@@ -853,8 +879,8 @@ SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
                    NULL,
                    s->intc.irqs[SCIF_BRI]);
 
-    tmu012_init(sysmem, 0x1fd80000,
-		TMU012_FEAT_TOCR | TMU012_FEAT_3CHAN | TMU012_FEAT_EXTCLK,
+    tmu012_init(s, sysmem, 0x1fd80000,
+                RTIMER_FEAT_TMU_LOW,
 		s->periph_freq,
 		s->intc.irqs[TMU0],
 		s->intc.irqs[TMU1],
@@ -877,7 +903,8 @@ SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem)
         sh_intc_register_sources(&s->intc,
 				 _INTC_ARRAY(vectors_tmu34),
 				 NULL, 0);
-        tmu012_init(sysmem, 0x1e100000, 0, s->periph_freq,
+        tmu012_init(s, sysmem, 0x1e100000,
+                    RTIMER_FEAT_TMU_HIGH, s->periph_freq,
 		    s->intc.irqs[TMU3],
 		    s->intc.irqs[TMU4],
 		    NULL, NULL);
diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig
index 38509b7e65..ac21830bb5 100644
--- a/hw/sh4/Kconfig
+++ b/hw/sh4/Kconfig
@@ -21,5 +21,5 @@ config SH7750
 
 config SH4
     bool
-    select PTIMER
+    select RENESAS_TIMER
     select RENESAS_SCI
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 289b6b03ab..f3918836e4 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -22,7 +22,6 @@ common-obj-$(CONFIG_EXYNOS4) += exynos4210_pwm.o
 common-obj-$(CONFIG_OMAP) += omap_gptimer.o
 common-obj-$(CONFIG_OMAP) += omap_synctimer.o
 common-obj-$(CONFIG_PXA2XX) += pxa2xx_timer.o
-common-obj-$(CONFIG_SH4) += sh_timer.o
 common-obj-$(CONFIG_DIGIC) += digic-timer.o
 common-obj-$(CONFIG_MIPS_CPS) += mips_gictimer.o
 
-- 
2.20.1



  parent reply	other threads:[~2020-05-31 16:25 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-31 16:24 [PATCH 00/10] Add RX hardware emulation Yoshinori Sato
2020-05-31 16:24 ` [PATCH 01/10] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2020-06-05 15:45   ` Philippe Mathieu-Daudé
2020-05-31 16:24 ` [PATCH 02/10] hw/timer: Renesas 8bit timer module Yoshinori Sato
2020-05-31 16:24 ` [PATCH 03/10] hw/timer: Renesas TMU/CMT module Yoshinori Sato
2020-05-31 16:24 ` [PATCH 04/10] hw/char: Renesas SCI module Yoshinori Sato
2020-06-05 16:05   ` Philippe Mathieu-Daudé
2020-05-31 16:24 ` [PATCH 05/10] hw/rx: RX MCU and target Yoshinori Sato
2020-06-05 16:09   ` Philippe Mathieu-Daudé
2020-05-31 16:24 ` [PATCH 06/10] Add rx-softmmu Yoshinori Sato
2020-05-31 16:24 ` [PATCH 07/10] hw/sh4: Convert renesas_sci Yoshinori Sato
2020-05-31 16:24 ` [PATCH 08/10] hw/char: remove sh_serial.c Yoshinori Sato
2020-05-31 16:24 ` Yoshinori Sato [this message]
2020-05-31 16:24 ` [PATCH 10/10] hw/timer: remove sh_timer.c Yoshinori Sato
2020-05-31 16:45 ` [PATCH 00/10] Add RX hardware emulation Philippe Mathieu-Daudé
2020-06-01 14:32   ` Yoshinori Sato
2020-06-02 17:04     ` Philippe Mathieu-Daudé

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