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[165.204.84.11]) by smtp.gmail.com with ESMTPSA id w10sm106849qtc.15.2020.06.01.11.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Jun 2020 11:21:18 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: amd-gfx@lists.freedesktop.org Subject: [PATCH 101/207] drm/amdgpu: switch to query reserved fb size from vbios (v3) Date: Mon, 1 Jun 2020 14:19:08 -0400 Message-Id: <20200601182054.1267858-12-alexander.deucher@amd.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200601182054.1267858-1-alexander.deucher@amd.com> References: <20200601182054.1267858-1-alexander.deucher@amd.com> MIME-Version: 1.0 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher , Hawking Zhang Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Hawking Zhang For Sienna_Cichlid, query fw_reserved_fb_size from vbios directly. For navi1x, fall back to default 64K TMR size. For pre-navi, no need to reserve tmr region in top LFB. v2: fix TMR define (Alex) v3: partially revert size change Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 93d057f92dcd..b5e050b82172 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -58,6 +58,7 @@ #include "amdgpu_amdkfd.h" #include "amdgpu_sdma.h" #include "amdgpu_ras.h" +#include "amdgpu_atomfirmware.h" #include "bif/bif_4_1_d.h" #define AMDGPU_TTM_VRAM_MAX_DW_READ (size_t)128 @@ -1961,13 +1962,23 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) * reserve TMR memory at the top of VRAM which holds * IP Discovery data and is protected by PSP. */ + adev->discovery_tmr_size = + amdgpu_atomfirmware_get_fw_reserved_fb_size(adev); + if (!adev->discovery_tmr_size && + adev->asic_type >= CHIP_NAVI10 && + amdgpu_discovery) { + /* if fw_reserved_fb_size is 0 from vbios, + * then fallback to the default tmr_size */ + adev->discovery_tmr_size = DISCOVERY_TMR_SIZE; + } + if (adev->discovery_tmr_size > 0) { r = amdgpu_bo_create_kernel_at(adev, - adev->gmc.real_vram_size - adev->discovery_tmr_size, - adev->discovery_tmr_size, - AMDGPU_GEM_DOMAIN_VRAM, - &adev->discovery_memory, - NULL); + adev->gmc.real_vram_size - adev->discovery_tmr_size, + adev->discovery_tmr_size, + AMDGPU_GEM_DOMAIN_VRAM, + &adev->discovery_memory, + NULL); if (r) return r; } -- 2.25.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx