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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 13/29] docs/system: Document Aspeed boards
Date: Fri,  5 Jun 2020 17:49:51 +0100	[thread overview]
Message-ID: <20200605165007.12095-14-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200605165007.12095-1-peter.maydell@linaro.org>

From: Cédric Le Goater <clg@kaod.org>

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200602135050.593692-1-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/aspeed.rst | 85 ++++++++++++++++++++++++++++++++++++++
 docs/system/target-arm.rst |  1 +
 2 files changed, 86 insertions(+)
 create mode 100644 docs/system/arm/aspeed.rst

diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
new file mode 100644
index 00000000000..45f891eb3ca
--- /dev/null
+++ b/docs/system/arm/aspeed.rst
@@ -0,0 +1,85 @@
+Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
+==================================================================
+
+The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
+Aspeed evaluation boards. They are based on different releases of the
+Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
+AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
+with dual cores ARM Cortex A7 CPUs (1.2GHz).
+
+The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
+etc.
+
+AST2400 SoC based machines :
+
+- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
+
+AST2500 SoC based machines :
+
+- ``ast2500-evb``          Aspeed AST2500 Evaluation board
+- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
+- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
+- ``sonorapass-bmc``       OCP SonoraPass BMC
+- ``swift-bmc``            OpenPOWER Swift BMC POWER9
+
+AST2600 SoC based machines :
+
+- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex A7)
+- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
+
+Supported devices
+-----------------
+
+ * SMP (for the AST2600 Cortex-A7)
+ * Interrupt Controller (VIC)
+ * Timer Controller
+ * RTC Controller
+ * I2C Controller
+ * System Control Unit (SCU)
+ * SRAM mapping
+ * X-DMA Controller (basic interface)
+ * Static Memory Controller (SMC or FMC) - Only SPI Flash support
+ * SPI Memory Controller
+ * USB 2.0 Controller
+ * SD/MMC storage controllers
+ * SDRAM controller (dummy interface for basic settings and training)
+ * Watchdog Controller
+ * GPIO Controller (Master only)
+ * UART
+ * Ethernet controllers
+
+
+Missing devices
+---------------
+
+ * Coprocessor support
+ * ADC (out of tree implementation)
+ * PWM and Fan Controller
+ * LPC Bus Controller
+ * Slave GPIO Controller
+ * Super I/O Controller
+ * Hash/Crypto Engine
+ * PCI-Express 1 Controller
+ * Graphic Display Controller
+ * PECI Controller
+ * MCTP Controller
+ * Mailbox Controller
+ * Virtual UART
+ * eSPI Controller
+ * I3C Controller
+
+Boot options
+------------
+
+The Aspeed machines can be started using the -kernel option to load a
+Linux kernel or from a firmare image which can be downloaded from the
+OpenPOWER jenkins :
+
+   https://openpower.xyz/
+
+The image should be attached as an MTD drive. Run :
+
+.. code-block:: bash
+
+  $ qemu-system-arm -M romulus-bmc -nic user \
+	-drive file=flash-romulus,format=raw,if=mtd -nographic
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index dce384cb0e3..1bd477a2936 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -81,6 +81,7 @@ undocumented; you can get a complete list by running
    arm/realview
    arm/versatile
    arm/vexpress
+   arm/aspeed
    arm/musicpal
    arm/nseries
    arm/orangepi
-- 
2.20.1



  parent reply	other threads:[~2020-06-05 16:54 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-05 16:49 [PULL 00/29] target-arm queue Peter Maydell
2020-06-05 16:49 ` [PULL 01/29] hw/ssi/imx_spi: changed while statement to prevent underflow Peter Maydell
2020-06-05 16:49 ` [PULL 02/29] hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave Peter Maydell
2020-06-05 16:49 ` [PULL 03/29] hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask() Peter Maydell
2020-06-05 16:49 ` [PULL 04/29] hw/arm/pxa2xx: Replace printf() call " Peter Maydell
2020-06-05 16:49 ` [PULL 05/29] target/arm: Convert aes and sm4 to gvec helpers Peter Maydell
2020-06-05 16:49 ` [PULL 06/29] target/arm: Convert rax1 " Peter Maydell
2020-06-05 16:49 ` [PULL 07/29] target/arm: Convert sha512 and sm3 " Peter Maydell
2020-06-05 16:49 ` [PULL 08/29] target/arm: Convert sha1 and sha256 " Peter Maydell
2020-06-05 16:49 ` [PULL 09/29] target/arm: Split helper_crypto_sha1_3reg Peter Maydell
2020-06-05 16:49 ` [PULL 10/29] target/arm: Split helper_crypto_sm3tt Peter Maydell
2020-06-05 16:49 ` [PULL 11/29] hw/adc/stm32f2xx_adc: Correct memory region size and access size Peter Maydell
2020-06-05 16:49 ` [PULL 12/29] tests/acceptance: Add a boot test for the xlnx-versal-virt machine Peter Maydell
2020-06-05 16:49 ` Peter Maydell [this message]
2020-06-05 16:49 ` [PULL 14/29] raspi: add BCM2835 SOC MPHI emulation Peter Maydell
2020-06-05 16:49 ` [PULL 15/29] dwc-hsotg (dwc2) USB host controller register definitions Peter Maydell
2020-07-04  9:17   ` Philippe Mathieu-Daudé
2020-07-04 10:35     ` Philippe Mathieu-Daudé
2020-06-05 16:49 ` [PULL 16/29] dwc-hsotg (dwc2) USB host controller state definitions Peter Maydell
2020-06-05 16:49 ` [PULL 17/29] dwc-hsotg (dwc2) USB host controller emulation Peter Maydell
2020-06-05 16:49 ` [PULL 18/29] usb: add short-packet handling to usb-storage driver Peter Maydell
2020-06-05 16:49 ` [PULL 19/29] wire in the dwc-hsotg (dwc2) USB host controller emulation Peter Maydell
2020-06-05 16:49 ` [PULL 20/29] raspi2 acceptance test: add test for dwc-hsotg (dwc2) USB host Peter Maydell
2020-06-05 16:49 ` [PULL 21/29] target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree Peter Maydell
2020-06-05 16:50 ` [PULL 22/29] target/arm: Convert Neon VSHR 2-reg-shift insns " Peter Maydell
2020-06-05 16:50 ` [PULL 23/29] target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA " Peter Maydell
2020-06-05 16:50 ` [PULL 24/29] target/arm: Convert VQSHLU, VQSHL " Peter Maydell
2020-06-05 16:50 ` [PULL 25/29] target/arm: Convert Neon narrowing shifts with op==8 " Peter Maydell
2020-06-05 16:50 ` [PULL 26/29] target/arm: Convert Neon narrowing shifts with op==9 " Peter Maydell
2020-06-05 16:50 ` [PULL 27/29] target/arm: Convert Neon VSHLL, VMOVL " Peter Maydell
2020-06-05 16:50 ` [PULL 28/29] target/arm: Convert VCVT fixed-point ops " Peter Maydell
2020-06-05 16:50 ` [PULL 29/29] target/arm: Convert Neon one-register-and-immediate insns " Peter Maydell
2020-06-05 20:10 ` [PULL 00/29] target-arm queue no-reply
2020-06-08 10:04 ` Peter Maydell

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