From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A3D6C433E0 for ; Tue, 9 Jun 2020 11:58:48 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id E46DA2078D for ; Tue, 9 Jun 2020 11:58:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E46DA2078D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 903811BEB1; Tue, 9 Jun 2020 13:56:54 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id BE55F1B6B4 for ; Tue, 9 Jun 2020 13:56:44 +0200 (CEST) IronPort-SDR: PPMtl33NJn2R1zWRNyHrmoF4Y/VfEm0Rh5+RM+a9dzgEL6Y7lN9Jo2BX0k5Tg0BQbrsCfnRIAi zzYPUBBWe9fQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2020 04:56:41 -0700 IronPort-SDR: WVPy3edH8WNcjU0th/5DSo0NopD0NbOvpE5Sk/c5VYhxrhEelZup5dJFTb4+c9k5wKAtgRoxw/ h6NIwK7YviJA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,492,1583222400"; d="scan'208";a="473044093" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:56:39 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , Paul Greenwalt , "Paul M . Stillwell Jr" Date: Tue, 9 Jun 2020 19:59:28 +0800 Message-Id: <20200609120001.35110-20-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200609120001.35110-1-qi.z.zhang@intel.com> References: <20200603024016.30636-1-qi.z.zhang@intel.com> <20200609120001.35110-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 19/52] net/ice/base: initialize Set PHY Configuration FEC fields X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently the caller needs to initialize the ice_cfg_phy_fec() parameter ice_aqc_set_phy_cfg_data FEC fields before calling. However, this is not necessary since ice_cfg_phy_fec() calls Get PHY Capabilities. Initialize ice_aqc_set_phy_cfg_data FEC capabilities and FEC option fields from Get PHY Capabilities with media/topology in ice_cfg_phy_fec(). Signed-off-by: Paul Greenwalt Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 908ef9085..8ba603242 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2762,6 +2762,9 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, if (status) goto out; + cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC); + cfg->link_fec_opt = pcaps->link_fec_options; + switch (fec) { case ICE_FEC_BASER: /* Clear RS bits, and AND BASE-R ability -- 2.13.6