[Intel-gfx] [v3 0/8] Enable HDR on MCA LSPCON based Gen9 devices

[Intel-gfx] [v3 0/8] Enable HDR on MCA LSPCON based Gen9 devices

[Uma Shankar]

Gen9 hardware supports HDMI2.0 through LSPCON chips. Extending HDR
support for MCA and Parade LSPCON based GEN9 devices.

SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic Range and
Mastering Infoframe (DRM packets) and send it to HDR capable
HDMI sink devices.

v2: Fixed Ville's review comments. Suppressed some warnings.
Patch 8 of the series is marked "Not for Merge" and is just for
reference to userspace people to incorporate in order to support
10bit content with 4K@60 resolutions.

v3: Added Infoframe readout support for DRM infoframes.
Addressed Jani Nikula's review comments.

Note: Patch 8 of the series is for reference to userspace, not to be
merged to driver.

Uma Shankar (8):
  drm/i915/display: Add HDR Capability detection for LSPCON
  drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
  drm/i915/display: Attach HDR property for capable Gen9 devices
  drm/i915/display: Enable BT2020 for HDR on LSPCON devices
  drm/i915/display: Enable HDR for Parade based lspcon
  drm/i915/display: Implement infoframes readback for LSPCON
  drm/i915/display: Implement DRM infoframe read for LSPCON
  drm/i915/display: [NOT FOR MERGE] Reduce blanking to support
    4k60@10bpp for LSPCON

 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  17 ++
 drivers/gpu/drm/i915/display/intel_hdmi.c     |  20 +++
 drivers/gpu/drm/i915/display/intel_lspcon.c   | 158 ++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_lspcon.h   |   9 +-
 5 files changed, 189 insertions(+), 16 deletions(-)

-- 
2.22.0

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[Intel-gfx] [v3 1/8] drm/i915/display: Add HDR Capability detection for LSPCON

[Uma Shankar]

LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES
DPCD register. LSPCON implementations capable of supporting
HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch
reads the same, detects the HDR capability and adds this to
intel_lspcon struct.

v2: Addressed Jani Nikula's review comment and fixed the HDR
    capability detection logic

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_lspcon.c   | 30 +++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 4b0aaa3081c9..ca99a05f52da 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1386,6 +1386,7 @@ struct intel_lspcon {
 	bool active;
 	enum drm_lspcon_mode mode;
 	enum lspcon_vendor vendor;
+	bool hdr_supported;
 };
 
 struct intel_digital_port {
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 6ff7b226f0a1..70bd564cae46 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -35,6 +35,8 @@
 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
 
+#define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
+
 /* AUX addresses to write MCA AVI IF */
 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
@@ -104,6 +106,32 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
 	return true;
 }
 
+static void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
+{
+	struct intel_digital_port *intel_dig_port =
+		container_of(lspcon, struct intel_digital_port, lspcon);
+	struct drm_device *dev = intel_dig_port->base.base.dev;
+	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
+	u8 hdr_caps;
+	int ret;
+
+	/* Enable HDR for MCA based LSPCON devices */
+	if (lspcon->vendor == LSPCON_VENDOR_MCA)
+		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
+				       &hdr_caps, 1);
+	else
+		return;
+
+	if (ret < 0) {
+		drm_dbg_kms(dev, "hdr capability detection failed\n");
+		lspcon->hdr_supported = false;
+		return;
+	} else if (hdr_caps & 0x1) {
+		drm_dbg_kms(dev, "lspcon capable of HDR\n");
+		lspcon->hdr_supported = true;
+	}
+}
+
 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
 {
 	enum drm_lspcon_mode current_mode;
@@ -581,6 +609,8 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port)
 		return false;
 	}
 
+	lspcon_detect_hdr_capability(lspcon);
+
 	connector->ycbcr_420_allowed = true;
 	lspcon->active = true;
 	DRM_DEBUG_KMS("Success: LSPCON init\n");
-- 
2.22.0

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[Intel-gfx] [v3 2/8] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon

[Uma Shankar]

Gen9 hardware supports HDMI2.0 through LSPCON chips.
Extending HDR support for MCA LSPCON based GEN9 devices.

SOC will drive LSPCON as DP and send HDR metadata as standard
DP SDP packets. LSPCON will be set to operate in PCON mode,
will receive the metadata and create Dynamic Range and
Mastering Infoframe (DRM packets) and send it to HDR capable
HDMI sink devices.

v2: Re-used hsw infoframe write implementation for HDR metadata
for LSPCON as per Ville's suggestion.

v3: Addressed Jani Nikula's review comments.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 10 ++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c | 37 +++++++++++++++------
 drivers/gpu/drm/i915/display/intel_lspcon.h |  5 ++-
 3 files changed, 40 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index a31a98d26882..53103ef72a58 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -590,6 +590,16 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
 	return val & mask;
 }
 
+void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
+				const struct intel_crtc_state *crtc_state,
+				unsigned int type,
+				const void *frame, ssize_t len)
+{
+	drm_dbg_kms(encoder->base.dev, "Update HDR metadata for lspcon\n");
+	/* It uses the legacy hsw implementation for the same */
+	hsw_write_infoframe(encoder, crtc_state, type, frame, len);
+}
+
 static const u8 infoframe_type_to_idx[] = {
 	HDMI_PACKET_TYPE_GENERAL_CONTROL,
 	HDMI_PACKET_TYPE_GAMUT_METADATA,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 70bd564cae46..95d29c379076 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -461,27 +461,42 @@ void lspcon_write_infoframe(struct intel_encoder *encoder,
 			    unsigned int type,
 			    const void *frame, ssize_t len)
 {
-	bool ret;
+	bool ret = true;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
 
-	/* LSPCON only needs AVI IF */
-	if (type != HDMI_INFOFRAME_TYPE_AVI)
+	/*
+	 * Supporting HDR on MCA LSPCON
+	 * Todo: Add support for Parade later
+	 */
+	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA &&
+	    lspcon->vendor != LSPCON_VENDOR_MCA)
 		return;
 
-	if (lspcon->vendor == LSPCON_VENDOR_MCA)
-		ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
-						      frame, len);
-	else
-		ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
-							 frame, len);
+	switch (type) {
+	case HDMI_INFOFRAME_TYPE_AVI:
+		if (lspcon->vendor == LSPCON_VENDOR_MCA)
+			ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
+							      frame, len);
+		else
+			ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
+								 frame, len);
+		break;
+	case HDMI_PACKET_TYPE_GAMUT_METADATA:
+		lspcon_drm_write_infoframe(encoder, crtc_state,
+					   HDMI_PACKET_TYPE_GAMUT_METADATA,
+					   frame, VIDEO_DIP_DATA_SIZE);
+		break;
+	default:
+		return;
+	}
 
 	if (!ret) {
-		DRM_ERROR("Failed to write AVI infoframes\n");
+		DRM_ERROR("Failed to write infoframes\n");
 		return;
 	}
 
-	DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
+	DRM_DEBUG_DRIVER("Infoframes updated successfully\n");
 }
 
 void lspcon_read_infoframe(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 37cfddf8a9c5..b2051f236223 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -34,5 +34,8 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *pipe_config);
 void lspcon_ycbcr420_config(struct drm_connector *connector,
 			    struct intel_crtc_state *crtc_state);
-
+void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
+				const struct intel_crtc_state *crtc_state,
+				unsigned int type,
+				const void *frame, ssize_t len);
 #endif /* __INTEL_LSPCON_H__ */
-- 
2.22.0

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[Intel-gfx] [v3 3/8] drm/i915/display: Attach HDR property for capable Gen9 devices

[Uma Shankar]

Attach HDR property for Gen9 devices with MCA LSPCON
chips.

v2: Cleaned HDR property attachment logic based on capability
as per Jani Nikula's suggestion.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 95d29c379076..7113c2efdab4 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -626,6 +626,11 @@ bool lspcon_init(struct intel_digital_port *intel_dig_port)
 
 	lspcon_detect_hdr_capability(lspcon);
 
+	if (lspcon->hdr_supported)
+		drm_object_attach_property(&connector->base,
+					   connector->dev->mode_config.hdr_output_metadata_property,
+					   0);
+
 	connector->ycbcr_420_allowed = true;
 	lspcon->active = true;
 	DRM_DEBUG_KMS("Success: LSPCON init\n");
-- 
2.22.0

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[Intel-gfx] [v3 4/8] drm/i915/display: Enable BT2020 for HDR on LSPCON devices

[Uma Shankar]

Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry
data for HDR using AVI infoframe. LSPCON firmware expects this and though
SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device
which transfers the same to HDMI sink.

v2: Dropped state managed in drm core as per Jani Nikula's suggestion.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 7113c2efdab4..10e2823bf1ae 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -507,6 +507,11 @@ void lspcon_read_infoframe(struct intel_encoder *encoder,
 	/* FIXME implement this */
 }
 
+/* HDMI HDR Colorspace Spec Definitions */
+#define NORMAL_COLORIMETRY_MASK		0x3
+#define EXTENDED_COLORIMETRY_MASK	0x7
+#define HDMI_COLORIMETRY_BT2020_YCC	((3 << 0) | (6 << 2) | (0 << 5))
+
 void lspcon_set_infoframes(struct intel_encoder *encoder,
 			   bool enable,
 			   const struct intel_crtc_state *crtc_state,
@@ -551,6 +556,19 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
 					   HDMI_QUANTIZATION_RANGE_LIMITED :
 					   HDMI_QUANTIZATION_RANGE_FULL);
 
+	/*
+	 * Set BT2020 colorspace if driving HDR data
+	 * ToDo: Make this generic and expose all colorspaces for lspcon
+	 */
+	if (lspcon->active && lspcon->hdr_supported) {
+		frame.avi.colorimetry =
+				HDMI_COLORIMETRY_BT2020_YCC &
+				NORMAL_COLORIMETRY_MASK;
+		frame.avi.extended_colorimetry =
+				(HDMI_COLORIMETRY_BT2020_YCC >> 2) &
+				 EXTENDED_COLORIMETRY_MASK;
+	}
+
 	ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
 	if (ret < 0) {
 		DRM_ERROR("Failed to pack AVI IF\n");
-- 
2.22.0

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[Intel-gfx] [v3 5/8] drm/i915/display: Enable HDR for Parade based lspcon

[Uma Shankar]

Enable HDR for LSPCON based on Parade along with MCA.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vipin Anand <vipin.anand@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 10e2823bf1ae..9034ce6f20b9 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -36,6 +36,7 @@
 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
 
 #define DPCD_MCA_LSPCON_HDR_STATUS	0x70003
+#define DPCD_PARADE_LSPCON_HDR_STATUS	0x00511
 
 /* AUX addresses to write MCA AVI IF */
 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
@@ -112,16 +113,20 @@ static void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon)
 		container_of(lspcon, struct intel_digital_port, lspcon);
 	struct drm_device *dev = intel_dig_port->base.base.dev;
 	struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
+	u32 lspcon_hdr_status_reg;
 	u8 hdr_caps;
 	int ret;
 
-	/* Enable HDR for MCA based LSPCON devices */
 	if (lspcon->vendor == LSPCON_VENDOR_MCA)
-		ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS,
-				       &hdr_caps, 1);
+		lspcon_hdr_status_reg = DPCD_MCA_LSPCON_HDR_STATUS;
+	else if (lspcon->vendor == LSPCON_VENDOR_PARADE)
+		lspcon_hdr_status_reg = DPCD_PARADE_LSPCON_HDR_STATUS;
 	else
 		return;
 
+	ret = drm_dp_dpcd_read(&dp->aux, lspcon_hdr_status_reg,
+			       &hdr_caps, 1);
+
 	if (ret < 0) {
 		drm_dbg_kms(dev, "hdr capability detection failed\n");
 		lspcon->hdr_supported = false;
@@ -465,14 +470,6 @@ void lspcon_write_infoframe(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
 
-	/*
-	 * Supporting HDR on MCA LSPCON
-	 * Todo: Add support for Parade later
-	 */
-	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA &&
-	    lspcon->vendor != LSPCON_VENDOR_MCA)
-		return;
-
 	switch (type) {
 	case HDMI_INFOFRAME_TYPE_AVI:
 		if (lspcon->vendor == LSPCON_VENDOR_MCA)
-- 
2.22.0

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[Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Uma Shankar]

Implemented Infoframes enabled readback for LSPCON devices.
This will help align the implementation with state readback
infrastructure.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 63 ++++++++++++++++++++-
 1 file changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 9034ce6f20b9..0ebe9a700291 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
 				  buf, ret);
 }
 
+static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
+{
+	int ret;
+	u32 val = 0;
+	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
+
+	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	if (ret < 0) {
+		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+		return false;
+	}
+
+	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
+		return true;
+
+	return false;
+}
+
+static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
+{
+	int ret;
+	u32 val = 0;
+	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
+
+	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+	if (ret < 0) {
+		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+		return false;
+	}
+
+	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
+		return true;
+
+	return false;
+}
+
 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *pipe_config)
 {
-	/* FIXME actually read this from the hw */
-	return 0;
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	bool infoframes_enabled;
+	u32 mask = 0;
+	u32 val;
+
+	if (lspcon->vendor == LSPCON_VENDOR_MCA)
+		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
+	else
+		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
+
+	if (infoframes_enabled)
+		return true;
+
+	if (lspcon->hdr_supported) {
+		val = intel_de_read(dev_priv,
+				    HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
+		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
+
+		if (val & mask)
+			return val & mask;
+	}
+
+	return false;
 }
 
 void lspcon_resume(struct intel_lspcon *lspcon)
-- 
2.22.0

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[Intel-gfx] [v3 7/8] drm/i915/display: Implement DRM infoframe read for LSPCON

[Uma Shankar]

Implement Read back of HDR metadata infoframes i.e Dynamic Range
and Mastering Infoframe for LSPCON devices.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c |  6 +++++-
 drivers/gpu/drm/i915/display/intel_lspcon.h |  4 ++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 53103ef72a58..786378442dd2 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -600,6 +600,16 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
 	hsw_write_infoframe(encoder, crtc_state, type, frame, len);
 }
 
+void lspcon_drm_read_infoframe(struct intel_encoder *encoder,
+			       const struct intel_crtc_state *crtc_state,
+			       unsigned int type,
+			       void *frame, ssize_t len)
+{
+	drm_dbg_kms(encoder->base.dev, "Read HDR metadata for lspcon\n");
+	/* It uses the legacy hsw implementation for the same */
+	hsw_read_infoframe(encoder, crtc_state, type, frame, len);
+}
+
 static const u8 infoframe_type_to_idx[] = {
 	HDMI_PACKET_TYPE_GENERAL_CONTROL,
 	HDMI_PACKET_TYPE_GAMUT_METADATA,
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 0ebe9a700291..8d1bd2da1e73 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -501,7 +501,11 @@ void lspcon_read_infoframe(struct intel_encoder *encoder,
 			   unsigned int type,
 			   void *frame, ssize_t len)
 {
-	/* FIXME implement this */
+	/* FIXME implement for AVI Infoframe as well */
+	if (type == HDMI_PACKET_TYPE_GAMUT_METADATA)
+		lspcon_drm_read_infoframe(encoder, crtc_state,
+					  HDMI_PACKET_TYPE_GAMUT_METADATA,
+					  frame, VIDEO_DIP_DATA_SIZE);
 }
 
 /* HDMI HDR Colorspace Spec Definitions */
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index b2051f236223..68d2d835bd86 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -38,4 +38,8 @@ void lspcon_drm_write_infoframe(struct intel_encoder *encoder,
 				const struct intel_crtc_state *crtc_state,
 				unsigned int type,
 				const void *frame, ssize_t len);
+void lspcon_drm_read_infoframe(struct intel_encoder *encoder,
+			       const struct intel_crtc_state *crtc_state,
+			       unsigned int type,
+			       void *frame, ssize_t len);
 #endif /* __INTEL_LSPCON_H__ */
-- 
2.22.0

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[Intel-gfx] [v3 8/8] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

[Uma Shankar]

Blanking needs to be reduced to incorporate DP and HDMI timing/link
bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive
17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps.
This will cause mode to blank out. Reduced Htotal by shortening the
back porch and front porch within permissible limits.

Note: This is for reference for userspace, not to be merged in kernel.

v2: This is marked as Not for merge and the responsibilty to program
these custom timings will be on userspace. This patch is just for
reference purposes. This is based on Ville's recommendation.

v3: updated commit message.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 55fda074c0ad..45dbe4388742 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -632,8 +632,10 @@ intel_dp_mode_valid(struct drm_connector *connector,
 {
 	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
 	struct intel_connector *intel_connector = to_intel_connector(connector);
+	struct intel_encoder *intel_encoder = intel_attached_encoder(intel_connector);
 	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
+	struct intel_lspcon *lspcon = enc_to_intel_lspcon(intel_encoder);
 	int target_clock = mode->clock;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 	int max_dotclk;
@@ -655,6 +657,21 @@ intel_dp_mode_valid(struct drm_connector *connector,
 		target_clock = fixed_mode->clock;
 	}
 
+	/*
+	 * Reducing Blanking to incorporate DP and HDMI timing/link bandwidth
+	 * limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs
+	 * while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will
+	 * cause mode to blank out. Reduced Htotal by shortening the back porch
+	 * and front porch within permissible limits.
+	 */
+	if (lspcon->active && lspcon->hdr_supported &&
+	    mode->clock > 570000) {
+		mode->clock = 570000;
+		mode->htotal -= 180;
+		mode->hsync_start -= 72;
+		mode->hsync_end -= 72;
+	}
+
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
-- 
2.22.0

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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Patchwork]

== Series Details ==

Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
URL   : https://patchwork.freedesktop.org/series/68081/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display.c:1222:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1225:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1228:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/display/intel_display.c:1231:22: error: Expected constant expression in case statement
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2274:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2275:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2276:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2277:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2278:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2279:17: error: bad integer constant expression
+drivers/gpu/drm/i915/gt/intel_reset.c:1310:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:408:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block

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[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Patchwork]

== Series Details ==

Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
URL   : https://patchwork.freedesktop.org/series/68081/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8611 -> Patchwork_17922
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_17922 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_17922, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_17922:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-u2:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html

  
Known issues
------------

  Here are the changes found in Patchwork_17922 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - fi-byt-j1900:       [PASS][2] -> [DMESG-WARN][3] ([i915#1982])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-cml-s:           [DMESG-WARN][4] ([i915#1982]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-cml-s/igt@i915_pm_rpm@module-reload.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-cml-s/igt@i915_pm_rpm@module-reload.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-n3050:       [DMESG-WARN][6] ([i915#1982]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - fi-bsw-kefka:       [DMESG-WARN][8] ([i915#1982]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-kbl-x1275:       [DMESG-WARN][10] ([i915#62] / [i915#92]) -> [DMESG-WARN][11] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html

  * igt@kms_flip@basic-flip-vs-modeset@a-dp1:
    - fi-kbl-x1275:       [DMESG-WARN][12] ([i915#62] / [i915#92]) -> [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html

  * igt@kms_force_connector_basic@force-edid:
    - fi-kbl-x1275:       [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][15] ([i915#62] / [i915#92]) +8 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (48 -> 43)
------------------------------

  Additional (2): fi-kbl-7560u fi-tgl-u2 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_8611 -> Patchwork_17922

  CI-20190529: 20190529
  CI_DRM_8611: b87354483fa40fef86da19ade9bfe9349f0cf6d5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5702: d16ad07e7f2a028e14d61f570931c87fa5ce404c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17922: 0903ebe28a8fb9c912916613977b2e77d83eac8c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0903ebe28a8f drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON
e67c4219c55f drm/i915/display: Implement DRM infoframe read for LSPCON
90fe2351734a drm/i915/display: Implement infoframes readback for LSPCON
7aab4641b28f drm/i915/display: Enable HDR for Parade based lspcon
e71a13eb3147 drm/i915/display: Enable BT2020 for HDR on LSPCON devices
5940d801abf4 drm/i915/display: Attach HDR property for capable Gen9 devices
ae1436b72a1c drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
292e80f577e6 drm/i915/display: Add HDR Capability detection for LSPCON

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/index.html
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Shankar, Uma]

> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Thursday, June 11, 2020 1:22 AM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices
> (rev3)
> 
> == Series Details ==
> 
> Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
> URL   : https://patchwork.freedesktop.org/series/68081/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_8611 -> Patchwork_17922
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_17922 absolutely need to be
>   verified manually.
> 
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_17922, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17922/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in
> Patchwork_17922:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_exec_suspend@basic-s3:
>     - fi-tgl-u2:          NOTRUN -> [FAIL][1]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-tgl-
> u2/igt@gem_exec_suspend@basic-s3.html

Hi Lakshmi,
This failure doesn't seem to be related to my changes. Can you please check and help report.

Regards,
Uma Shankar

> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_17922 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-byt-j1900:       [PASS][2] -> [DMESG-WARN][3] ([i915#1982])
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-byt-
> j1900/igt@i915_pm_rpm@module-reload.html
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-byt-
> j1900/igt@i915_pm_rpm@module-reload.html
> 
> 
> #### Possible fixes ####
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-cml-s:           [DMESG-WARN][4] ([i915#1982]) -> [PASS][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-cml-
> s/igt@i915_pm_rpm@module-reload.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-cml-
> s/igt@i915_pm_rpm@module-reload.html
> 
>   * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
>     - fi-bsw-n3050:       [DMESG-WARN][6] ([i915#1982]) -> [PASS][7]
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-
> n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-
> n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>     - fi-bsw-kefka:       [DMESG-WARN][8] ([i915#1982]) -> [PASS][9]
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-
> kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-
> kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
> 
> 
> #### Warnings ####
> 
>   * igt@gem_exec_suspend@basic-s0:
>     - fi-kbl-x1275:       [DMESG-WARN][10] ([i915#62] / [i915#92]) -> [DMESG-
> WARN][11] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@gem_exec_suspend@basic-s0.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@gem_exec_suspend@basic-s0.html
> 
>   * igt@kms_flip@basic-flip-vs-modeset@a-dp1:
>     - fi-kbl-x1275:       [DMESG-WARN][12] ([i915#62] / [i915#92]) -> [DMESG-
> WARN][13] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
> 
>   * igt@kms_force_connector_basic@force-edid:
>     - fi-kbl-x1275:       [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) ->
> [DMESG-WARN][15] ([i915#62] / [i915#92]) +8 similar issues
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@kms_force_connector_basic@force-edid.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@kms_force_connector_basic@force-edid.html
> 
> 
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
>   [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
>   [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
> 
> 
> Participating hosts (48 -> 43)
> ------------------------------
> 
>   Additional (2): fi-kbl-7560u fi-tgl-u2
>   Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-
> byt-clapper fi-bdw-samus
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_8611 -> Patchwork_17922
> 
>   CI-20190529: 20190529
>   CI_DRM_8611: b87354483fa40fef86da19ade9bfe9349f0cf6d5 @
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_5702: d16ad07e7f2a028e14d61f570931c87fa5ce404c @
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_17922: 0903ebe28a8fb9c912916613977b2e77d83eac8c @
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 0903ebe28a8f drm/i915/display: [NOT FOR MERGE] Reduce blanking to support
> 4k60@10bpp for LSPCON e67c4219c55f drm/i915/display: Implement DRM
> infoframe read for LSPCON 90fe2351734a drm/i915/display: Implement
> infoframes readback for LSPCON 7aab4641b28f drm/i915/display: Enable HDR for
> Parade based lspcon
> e71a13eb3147 drm/i915/display: Enable BT2020 for HDR on LSPCON devices
> 5940d801abf4 drm/i915/display: Attach HDR property for capable Gen9 devices
> ae1436b72a1c drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
> 292e80f577e6 drm/i915/display: Add HDR Capability detection for LSPCON
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17922/index.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✓ Fi.CI.BAT: success for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Patchwork]

== Series Details ==

Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
URL   : https://patchwork.freedesktop.org/series/68081/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8611 -> Patchwork_17922
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/index.html

Known issues
------------

  Here are the changes found in Patchwork_17922 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - fi-byt-j1900:       [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-byt-j1900/igt@i915_pm_rpm@module-reload.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-cml-s:           [DMESG-WARN][3] ([i915#1982]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-cml-s/igt@i915_pm_rpm@module-reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-cml-s/igt@i915_pm_rpm@module-reload.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-n3050:       [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - fi-bsw-kefka:       [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-kbl-x1275:       [DMESG-WARN][9] ([i915#62] / [i915#92]) -> [DMESG-WARN][10] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html

  * igt@kms_flip@basic-flip-vs-modeset@a-dp1:
    - fi-kbl-x1275:       [DMESG-WARN][11] ([i915#62] / [i915#92]) -> [DMESG-WARN][12] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html

  * igt@kms_force_connector_basic@force-edid:
    - fi-kbl-x1275:       [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][14] ([i915#62] / [i915#92]) +8 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-x1275/igt@kms_force_connector_basic@force-edid.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (48 -> 43)
------------------------------

  Additional (2): fi-kbl-7560u fi-tgl-u2 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_8611 -> Patchwork_17922

  CI-20190529: 20190529
  CI_DRM_8611: b87354483fa40fef86da19ade9bfe9349f0cf6d5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5702: d16ad07e7f2a028e14d61f570931c87fa5ce404c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17922: 0903ebe28a8fb9c912916613977b2e77d83eac8c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0903ebe28a8f drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON
e67c4219c55f drm/i915/display: Implement DRM infoframe read for LSPCON
90fe2351734a drm/i915/display: Implement infoframes readback for LSPCON
7aab4641b28f drm/i915/display: Enable HDR for Parade based lspcon
e71a13eb3147 drm/i915/display: Enable BT2020 for HDR on LSPCON devices
5940d801abf4 drm/i915/display: Attach HDR property for capable Gen9 devices
ae1436b72a1c drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon
292e80f577e6 drm/i915/display: Add HDR Capability detection for LSPCON

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/index.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Vudum, Lakshminarayana]

Results are re-reported.

-----Original Message-----
From: Shankar, Uma <uma.shankar@intel.com> 
Sent: Thursday, June 11, 2020 8:08 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: RE: ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev3)



> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Thursday, June 11, 2020 1:22 AM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 
> devices
> (rev3)
> 
> == Series Details ==
> 
> Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
> URL   : https://patchwork.freedesktop.org/series/68081/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_8611 -> Patchwork_17922 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_17922 absolutely need to be
>   verified manually.
> 
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_17922, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17922/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in
> Patchwork_17922:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_exec_suspend@basic-s3:
>     - fi-tgl-u2:          NOTRUN -> [FAIL][1]
>    [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-tgl-
> u2/igt@gem_exec_suspend@basic-s3.html

Hi Lakshmi,
This failure doesn't seem to be related to my changes. Can you please check and help report.

Regards,
Uma Shankar

> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_17922 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-byt-j1900:       [PASS][2] -> [DMESG-WARN][3] ([i915#1982])
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-byt-
> j1900/igt@i915_pm_rpm@module-reload.html
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-byt-
> j1900/igt@i915_pm_rpm@module-reload.html
> 
> 
> #### Possible fixes ####
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-cml-s:           [DMESG-WARN][4] ([i915#1982]) -> [PASS][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-cml-
> s/igt@i915_pm_rpm@module-reload.html
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-cml-
> s/igt@i915_pm_rpm@module-reload.html
> 
>   * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
>     - fi-bsw-n3050:       [DMESG-WARN][6] ([i915#1982]) -> [PASS][7]
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-
> n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-
> n3050/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>     - fi-bsw-kefka:       [DMESG-WARN][8] ([i915#1982]) -> [PASS][9]
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-bsw-
> kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-bsw-
> kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
> 
> 
> #### Warnings ####
> 
>   * igt@gem_exec_suspend@basic-s0:
>     - fi-kbl-x1275:       [DMESG-WARN][10] ([i915#62] / [i915#92]) -> [DMESG-
> WARN][11] ([i915#1982] / [i915#62] / [i915#92] / [i915#95])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@gem_exec_suspend@basic-s0.html
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@gem_exec_suspend@basic-s0.html
> 
>   * igt@kms_flip@basic-flip-vs-modeset@a-dp1:
>     - fi-kbl-x1275:       [DMESG-WARN][12] ([i915#62] / [i915#92]) -> [DMESG-
> WARN][13] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@kms_flip@basic-flip-vs-modeset@a-dp1.html
> 
>   * igt@kms_force_connector_basic@force-edid:
>     - fi-kbl-x1275:       [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) ->
> [DMESG-WARN][15] ([i915#62] / [i915#92]) +8 similar issues
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/fi-kbl-
> x1275/igt@kms_force_connector_basic@force-edid.html
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/fi-kbl-
> x1275/igt@kms_force_connector_basic@force-edid.html
> 
> 
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
>   [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
>   [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
> 
> 
> Participating hosts (48 -> 43)
> ------------------------------
> 
>   Additional (2): fi-kbl-7560u fi-tgl-u2
>   Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-
> byt-clapper fi-bdw-samus
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_8611 -> Patchwork_17922
> 
>   CI-20190529: 20190529
>   CI_DRM_8611: b87354483fa40fef86da19ade9bfe9349f0cf6d5 @ 
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_5702: d16ad07e7f2a028e14d61f570931c87fa5ce404c @ 
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_17922: 0903ebe28a8fb9c912916613977b2e77d83eac8c @ 
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 0903ebe28a8f drm/i915/display: [NOT FOR MERGE] Reduce blanking to 
> support 4k60@10bpp for LSPCON e67c4219c55f drm/i915/display: Implement 
> DRM infoframe read for LSPCON 90fe2351734a drm/i915/display: Implement 
> infoframes readback for LSPCON 7aab4641b28f drm/i915/display: Enable 
> HDR for Parade based lspcon
> e71a13eb3147 drm/i915/display: Enable BT2020 for HDR on LSPCON devices
> 5940d801abf4 drm/i915/display: Attach HDR property for capable Gen9 
> devices ae1436b72a1c drm/i915/display: Enable HDR on gen9 devices with 
> MCA Lspcon
> 292e80f577e6 drm/i915/display: Add HDR Capability detection for LSPCON
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_17922/index.html
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[Intel-gfx] ✗ Fi.CI.IGT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev3)

[Patchwork]

== Series Details ==

Series: Enable HDR on MCA LSPCON based Gen9 devices (rev3)
URL   : https://patchwork.freedesktop.org/series/68081/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8611_full -> Patchwork_17922_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_17922_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_17922_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_17922_full:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - shard-kbl:          NOTRUN -> ([FAIL][1], [FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5]) ([i915#1569] / [i915#1611] / [i915#1687] / [i915#192] / [i915#193] / [i915#194])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@runner@aborted.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@runner@aborted.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@runner@aborted.html
    - shard-apl:          NOTRUN -> ([FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10]) ([fdo#109271] / [i915#1610] / [i915#1611])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@runner@aborted.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl4/igt@runner@aborted.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@runner@aborted.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl4/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_17922_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd:
    - shard-skl:          [PASS][11] -> [FAIL][12] ([i915#1528])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl7/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl10/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html

  * igt@gem_workarounds@suspend-resume:
    - shard-kbl:          [PASS][13] -> [INCOMPLETE][14] ([i915#155] / [i915#180]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl3/igt@gem_workarounds@suspend-resume.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@gem_workarounds@suspend-resume.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [PASS][15] -> [DMESG-WARN][16] ([i915#1436] / [i915#716])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-glk9/igt@gen9_exec_parse@allowed-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-glk7/igt@gen9_exec_parse@allowed-all.html

  * igt@i915_module_load@reload:
    - shard-tglb:         [PASS][17] -> [DMESG-WARN][18] ([i915#402]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb3/igt@i915_module_load@reload.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb1/igt@i915_module_load@reload.html

  * igt@i915_pm_rc6_residency@rc6-fence:
    - shard-hsw:          [PASS][19] -> [WARN][20] ([i915#1519])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-hsw1/igt@i915_pm_rc6_residency@rc6-fence.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-hsw6/igt@i915_pm_rc6_residency@rc6-fence.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [PASS][21] -> [INCOMPLETE][22] ([i915#180]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl1/igt@i915_suspend@sysfs-reader.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl4/igt@i915_suspend@sysfs-reader.html

  * igt@kms_atomic@atomic-invalid-params:
    - shard-apl:          [PASS][23] -> [DMESG-WARN][24] ([i915#95]) +11 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl8/igt@kms_atomic@atomic-invalid-params.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl7/igt@kms_atomic@atomic-invalid-params.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-180:
    - shard-apl:          [PASS][25] -> [DMESG-WARN][26] ([i915#1982])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl7/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html

  * igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge:
    - shard-kbl:          [PASS][27] -> [DMESG-WARN][28] ([i915#93] / [i915#95])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl3/igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][29] -> [FAIL][30] ([i915#96])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
    - shard-skl:          [PASS][31] -> [DMESG-WARN][32] ([i915#1982]) +10 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl1/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl3/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@pipe-c-single-bo:
    - shard-hsw:          [PASS][33] -> [INCOMPLETE][34] ([i915#61])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-hsw6/igt@kms_cursor_legacy@pipe-c-single-bo.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-hsw4/igt@kms_cursor_legacy@pipe-c-single-bo.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([i915#79])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-tglb:         [PASS][37] -> [SKIP][38] ([i915#668]) +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_plane_scaling@pipe-c-scaler-with-clipping-clamping:
    - shard-iclb:         [PASS][39] -> [DMESG-WARN][40] ([i915#1982])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb2/igt@kms_plane_scaling@pipe-c-scaler-with-clipping-clamping.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb3/igt@kms_plane_scaling@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][41] -> [SKIP][42] ([fdo#109441]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb3/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
    - shard-skl:          [PASS][43] -> [INCOMPLETE][44] ([i915#69])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend.html

  * igt@perf@blocking-parameterized:
    - shard-hsw:          [PASS][45] -> [FAIL][46] ([i915#1542])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-hsw2/igt@perf@blocking-parameterized.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-hsw6/igt@perf@blocking-parameterized.html

  * igt@sysfs_heartbeat_interval@mixed@vecs0:
    - shard-skl:          [PASS][47] -> [FAIL][48] ([i915#1731])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl3/igt@sysfs_heartbeat_interval@mixed@vecs0.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl1/igt@sysfs_heartbeat_interval@mixed@vecs0.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-kbl:          [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@vecs0.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@gem_ctx_param@root-set:
    - shard-apl:          [DMESG-WARN][51] ([i915#95]) -> [PASS][52] +6 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl7/igt@gem_ctx_param@root-set.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl8/igt@gem_ctx_param@root-set.html

  * igt@gem_exec_balancer@sliced:
    - shard-tglb:         [TIMEOUT][53] ([i915#1936]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb5/igt@gem_exec_balancer@sliced.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb7/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_schedule@implicit-read-write@rcs0:
    - shard-snb:          [INCOMPLETE][55] ([i915#82]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-snb2/igt@gem_exec_schedule@implicit-read-write@rcs0.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-snb6/igt@gem_exec_schedule@implicit-read-write@rcs0.html

  * igt@i915_suspend@debugfs-reader:
    - shard-kbl:          [FAIL][57] ([fdo#103375]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl7/igt@i915_suspend@debugfs-reader.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl3/igt@i915_suspend@debugfs-reader.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-180:
    - shard-glk:          [DMESG-FAIL][59] ([i915#118] / [i915#95]) -> [PASS][60] +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-glk8/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-glk1/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen:
    - shard-skl:          [FAIL][61] ([i915#54]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html

  * igt@kms_cursor_legacy@pipe-b-torture-move:
    - shard-tglb:         [DMESG-WARN][63] ([i915#128]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb2/igt@kms_cursor_legacy@pipe-b-torture-move.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb5/igt@kms_cursor_legacy@pipe-b-torture-move.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled:
    - shard-skl:          [DMESG-WARN][65] ([i915#1982]) -> [PASS][66] +14 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl8/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl5/igt@kms_draw_crc@draw-method-xrgb2101010-render-xtiled.html

  * igt@kms_flip@busy-flip@b-edp1:
    - shard-skl:          [FAIL][67] ([i915#275]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl5/igt@kms_flip@busy-flip@b-edp1.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl8/igt@kms_flip@busy-flip@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-iclb:         [FAIL][69] ([i915#79]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@plain-flip-ts-check@a-dp1:
    - shard-kbl:          [DMESG-WARN][71] ([i915#1982]) -> [PASS][72] +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl4/igt@kms_flip@plain-flip-ts-check@a-dp1.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl7/igt@kms_flip@plain-flip-ts-check@a-dp1.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [INCOMPLETE][73] ([i915#155]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
    - shard-glk:          [DMESG-WARN][75] ([i915#1982]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-glk8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-glk1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][77] ([fdo#108145] / [i915#265]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [FAIL][79] ([i915#173]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb1/igt@kms_psr@no_drrs.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb2/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][81] ([fdo#109441]) -> [PASS][82] +3 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb1/igt@kms_psr@psr2_sprite_plane_move.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_setmode@basic:
    - shard-skl:          [FAIL][83] ([i915#31]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-skl1/igt@kms_setmode@basic.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-skl3/igt@kms_setmode@basic.html

  * igt@perf@polling-parameterized:
    - shard-hsw:          [FAIL][85] ([i915#1542]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-hsw6/igt@perf@polling-parameterized.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-hsw4/igt@perf@polling-parameterized.html

  * igt@perf_pmu@module-unload:
    - shard-iclb:         [DMESG-WARN][87] ([i915#1982]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb5/igt@perf_pmu@module-unload.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb7/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@other-init-3:
    - shard-tglb:         [DMESG-WARN][89] ([i915#402]) -> [PASS][90] +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb6/igt@perf_pmu@other-init-3.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb1/igt@perf_pmu@other-init-3.html

  * igt@syncobj_wait@single-wait-all-for-submit-signaled:
    - shard-tglb:         [TIMEOUT][91] -> [PASS][92] +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb5/igt@syncobj_wait@single-wait-all-for-submit-signaled.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb7/igt@syncobj_wait@single-wait-all-for-submit-signaled.html

  
#### Warnings ####

  * igt@gem_exec_reloc@basic-concurrent16:
    - shard-glk:          [TIMEOUT][93] ([i915#1958]) -> [INCOMPLETE][94] ([i915#1958] / [i915#58] / [k.org#198133])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-glk5/igt@gem_exec_reloc@basic-concurrent16.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-glk8/igt@gem_exec_reloc@basic-concurrent16.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-tglb:         [FAIL][95] ([i915#454]) -> [SKIP][96] ([i915#468])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-tglb7/igt@i915_pm_dc@dc6-dpms.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-iclb:         [FAIL][97] ([i915#1515]) -> [WARN][98] ([i915#1515])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@kms_content_protection@atomic:
    - shard-apl:          [TIMEOUT][99] ([i915#1319] / [i915#1635]) -> [TIMEOUT][100] ([i915#1319])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl7/igt@kms_content_protection@atomic.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-apl:          [TIMEOUT][101] ([i915#1319]) -> [FAIL][102] ([fdo#110321] / [fdo#110336])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl1/igt@kms_content_protection@atomic-dpms.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl6/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@legacy:
    - shard-apl:          [FAIL][103] ([fdo#110321] / [fdo#110336]) -> [TIMEOUT][104] ([i915#1319] / [i915#1635])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl6/igt@kms_content_protection@legacy.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl4/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic:
    - shard-kbl:          [TIMEOUT][105] ([i915#1319] / [i915#1958]) -> [TIMEOUT][106] ([i915#1319])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl4/igt@kms_content_protection@lic.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl7/igt@kms_content_protection@lic.html

  * igt@kms_content_protection@srm:
    - shard-kbl:          [TIMEOUT][107] ([i915#1319] / [i915#1958]) -> [DMESG-FAIL][108] ([fdo#110321] / [i915#95])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl4/igt@kms_content_protection@srm.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl2/igt@kms_content_protection@srm.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [DMESG-WARN][109] ([i915#180]) -> [INCOMPLETE][110] ([i915#155] / [i915#180])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [DMESG-WARN][111] ([i915#95]) -> [INCOMPLETE][112] ([i915#180])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8611/shard-apl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html

  
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
  [fdo#110336]: https://bugs.freedesktop.org/show_bug.cgi?id=110336
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#128]: https://gitlab.freedesktop.org/drm/intel/issues/128
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1515]: https://gitlab.freedesktop.org/drm/intel/issues/1515
  [i915#1519]: https://gitlab.freedesktop.org/drm/intel/issues/1519
  [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#1569]: https://gitlab.freedesktop.org/drm/intel/issues/1569
  [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
  [i915#1611]: https://gitlab.freedesktop.org/drm/intel/issues/1611
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1687]: https://gitlab.freedesktop.org/drm/intel/issues/1687
  [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#192]: https://gitlab.freedesktop.org/drm/intel/issues/192
  [i915#193]: https://gitlab.freedesktop.org/drm/intel/issues/193
  [i915#1936]: https://gitlab.freedesktop.org/drm/intel/issues/1936
  [i915#194]: https://gitlab.freedesktop.org/drm/intel/issues/194
  [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#275]: https://gitlab.freedesktop.org/drm/intel/issues/275
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
  [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_8611 -> Patchwork_17922

  CI-20190529: 20190529
  CI_DRM_8611: b87354483fa40fef86da19ade9bfe9349f0cf6d5 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5702: d16ad07e7f2a028e14d61f570931c87fa5ce404c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17922: 0903ebe28a8fb9c912916613977b2e77d83eac8c @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17922/index.html
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> Implemented Infoframes enabled readback for LSPCON devices.
> This will help align the implementation with state readback
> infrastructure.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_lspcon.c | 63 ++++++++++++++++++++-
>  1 file changed, 61 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index 9034ce6f20b9..0ebe9a700291 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
>  				  buf, ret);
>  }
>  
> +static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
> +{
> +	int ret;
> +	u32 val = 0;
> +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> +
> +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	if (ret < 0) {
> +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> +		return false;
> +	}
> +
> +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> +		return true;
> +
> +	return false;

return val & ...;

> +}
> +
> +static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
> +{
> +	int ret;
> +	u32 val = 0;
> +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> +
> +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> +	if (ret < 0) {
> +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> +		return false;
> +	}
> +
> +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> +		return true;
> +
> +	return false;
> +}
> +
>  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
>  			      const struct intel_crtc_state *pipe_config)
>  {
> -	/* FIXME actually read this from the hw */
> -	return 0;
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	bool infoframes_enabled;
> +	u32 mask = 0;
> +	u32 val;
> +
> +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> +		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> +	else
> +		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> +
> +	if (infoframes_enabled)
> +		return true;

This is supposed to return a bitmask of all enabled infoframes.

Also my question "how do we turn off infoframes once enabled?"
from https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
still remains unanswered...

> +
> +	if (lspcon->hdr_supported) {
> +		val = intel_de_read(dev_priv,
> +				    HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
> +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> +
> +		if (val & mask)
> +			return val & mask;
> +	}
> +
> +	return false;
>  }
>  
>  void lspcon_resume(struct intel_lspcon *lspcon)
> -- 
> 2.22.0

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > Implemented Infoframes enabled readback for LSPCON devices.
> > This will help align the implementation with state readback
> > infrastructure.
> > 
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63 ++++++++++++++++++++-
> >  1 file changed, 61 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > index 9034ce6f20b9..0ebe9a700291 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
> >  				  buf, ret);
> >  }
> >  
> > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct drm_dp_aux *aux)
> > +{
> > +	int ret;
> > +	u32 val = 0;
> > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > +
> > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > +	if (ret < 0) {
> > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > +		return false;
> > +	}
> > +
> > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > +		return true;
> > +
> > +	return false;
> 
> return val & ...;
> 
> > +}
> > +
> > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct drm_dp_aux *aux)
> > +{
> > +	int ret;
> > +	u32 val = 0;
> > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > +
> > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > +	if (ret < 0) {
> > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > +		return false;
> > +	}
> > +
> > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > +		return true;
> > +
> > +	return false;
> > +}
> > +
> >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> >  			      const struct intel_crtc_state *pipe_config)
> >  {
> > -	/* FIXME actually read this from the hw */
> > -	return 0;
> > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > +	bool infoframes_enabled;
> > +	u32 mask = 0;
> > +	u32 val;
> > +
> > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > +		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > +	else
> > +		infoframes_enabled = _lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > +
> > +	if (infoframes_enabled)
> > +		return true;
> 
> This is supposed to return a bitmask of all enabled infoframes.

Actually since we're dealing with both the LSPCON specific stuff and
DIP stuff for the DRM infoframe I think we should stop using using
intel_hdmi_infoframes_enabled(), and instead provide a LSPCON specific
replacement for it. That way we can directly return the abstract
bitmask instead of pretending to return a bitmask of the DIP bits.

> 
> Also my question "how do we turn off infoframes once enabled?"
> from https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
> still remains unanswered...
> 
> > +
> > +	if (lspcon->hdr_supported) {
> > +		val = intel_de_read(dev_priv,
> > +				    HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
> > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > +
> > +		if (val & mask)
> > +			return val & mask;
> > +	}
> > +
> > +	return false;
> >  }
> >  
> >  void lspcon_resume(struct intel_lspcon *lspcon)
> > -- 
> > 2.22.0
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, June 11, 2020 9:31 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com; Mun, Gwan-
> gyeong <gwan-gyeong.mun@intel.com>
> Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes readback for
> LSPCON
> 
> On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > Implemented Infoframes enabled readback for LSPCON devices.
> > > This will help align the implementation with state readback
> > > infrastructure.
> > >
> > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > ++++++++++++++++++++-
> > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > index 9034ce6f20b9..0ebe9a700291 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder
> *encoder,
> > >  				  buf, ret);
> > >  }
> > >
> > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > +drm_dp_aux *aux) {
> > > +	int ret;
> > > +	u32 val = 0;
> > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > +
> > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > +	if (ret < 0) {
> > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > +		return false;
> > > +	}
> > > +
> > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > +		return true;
> > > +
> > > +	return false;
> >
> > return val & ...;
> >
> > > +}
> > > +
> > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > +drm_dp_aux *aux) {
> > > +	int ret;
> > > +	u32 val = 0;
> > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > +
> > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > +	if (ret < 0) {
> > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > +		return false;
> > > +	}
> > > +
> > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > +		return true;
> > > +
> > > +	return false;
> > > +}
> > > +
> > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > >  			      const struct intel_crtc_state *pipe_config)  {
> > > -	/* FIXME actually read this from the hw */
> > > -	return 0;
> > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > +	bool infoframes_enabled;
> > > +	u32 mask = 0;
> > > +	u32 val;
> > > +
> > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > +		infoframes_enabled =
> _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > +	else
> > > +		infoframes_enabled =
> > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > +
> > > +	if (infoframes_enabled)
> > > +		return true;
> >
> > This is supposed to return a bitmask of all enabled infoframes.

> Actually since we're dealing with both the LSPCON specific stuff and DIP stuff for
> the DRM infoframe I think we should stop using using
> intel_hdmi_infoframes_enabled(), and instead provide a LSPCON specific
> replacement for it. That way we can directly return the abstract bitmask instead
> of pretending to return a bitmask of the DIP bits.

Sure,  will fix this and resend the next version.

> >
> > Also my question "how do we turn off infoframes once enabled?"
> > from
> > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
> > still remains unanswered...

For the AVI infoframe we generally compute and change the respective values. If no change is
requested and computed we can let the existing infoframes be transmitted. AFAIK there is no
mechanism called out, to explicitly disable this on Lspcon. Have not seen any issues due to this,
so hoping that it may be safe even if they are enabled.

I am planning to take your patch from the series and float along with this series, adding check for DRM
Infoframes also. Hope that is ok ?

Thanks Ville for your feedback.

Regards,
Uma Shankar

> > > +
> > > +	if (lspcon->hdr_supported) {
> > > +		val = intel_de_read(dev_priv,
> > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> >cpu_transcoder));
> > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > +
> > > +		if (val & mask)
> > > +			return val & mask;
> > > +	}
> > > +
> > > +	return false;
> > >  }
> > >
> > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > --
> > > 2.22.0
> >
> > --
> > Ville Syrjälä
> > Intel
> 
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Mon, Jun 15, 2020 at 08:39:55PM +0000, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Thursday, June 11, 2020 9:31 PM
> > To: Shankar, Uma <uma.shankar@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com; Mun, Gwan-
> > gyeong <gwan-gyeong.mun@intel.com>
> > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes readback for
> > LSPCON
> > 
> > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > This will help align the implementation with state readback
> > > > infrastructure.
> > > >
> > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > ++++++++++++++++++++-
> > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder
> > *encoder,
> > > >  				  buf, ret);
> > > >  }
> > > >
> > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > +drm_dp_aux *aux) {
> > > > +	int ret;
> > > > +	u32 val = 0;
> > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > +
> > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > +	if (ret < 0) {
> > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > +		return false;
> > > > +	}
> > > > +
> > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > +		return true;
> > > > +
> > > > +	return false;
> > >
> > > return val & ...;
> > >
> > > > +}
> > > > +
> > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > > +drm_dp_aux *aux) {
> > > > +	int ret;
> > > > +	u32 val = 0;
> > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > +
> > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > +	if (ret < 0) {
> > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > +		return false;
> > > > +	}
> > > > +
> > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > +		return true;
> > > > +
> > > > +	return false;
> > > > +}
> > > > +
> > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > -	/* FIXME actually read this from the hw */
> > > > -	return 0;
> > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > +	bool infoframes_enabled;
> > > > +	u32 mask = 0;
> > > > +	u32 val;
> > > > +
> > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > +		infoframes_enabled =
> > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > +	else
> > > > +		infoframes_enabled =
> > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > > +
> > > > +	if (infoframes_enabled)
> > > > +		return true;
> > >
> > > This is supposed to return a bitmask of all enabled infoframes.
> 
> > Actually since we're dealing with both the LSPCON specific stuff and DIP stuff for
> > the DRM infoframe I think we should stop using using
> > intel_hdmi_infoframes_enabled(), and instead provide a LSPCON specific
> > replacement for it. That way we can directly return the abstract bitmask instead
> > of pretending to return a bitmask of the DIP bits.
> 
> Sure,  will fix this and resend the next version.
> 
> > >
> > > Also my question "how do we turn off infoframes once enabled?"
> > > from
> > > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
> > > still remains unanswered...
> 
> For the AVI infoframe we generally compute and change the respective values. If no change is
> requested and computed we can let the existing infoframes be transmitted. AFAIK there is no
> mechanism called out, to explicitly disable this on Lspcon. Have not seen any issues due to this,
> so hoping that it may be safe even if they are enabled.

It's not valid to transmit infoframes to DVI sinks.

> 
> I am planning to take your patch from the series and float along with this series, adding check for DRM
> Infoframes also. Hope that is ok ?
> 
> Thanks Ville for your feedback.
> 
> Regards,
> Uma Shankar
> 
> > > > +
> > > > +	if (lspcon->hdr_supported) {
> > > > +		val = intel_de_read(dev_priv,
> > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > >cpu_transcoder));
> > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > +
> > > > +		if (val & mask)
> > > > +			return val & mask;
> > > > +	}
> > > > +
> > > > +	return false;
> > > >  }
> > > >
> > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > --
> > > > 2.22.0
> > >
> > > --
> > > Ville Syrjälä
> > > Intel
> > 
> > --
> > Ville Syrjälä
> > Intel

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> > > -----Original Message-----
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Sent: Thursday, June 11, 2020 9:31 PM
> > > To: Shankar, Uma <uma.shankar@intel.com>
> > > Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com;
> > > Mun, Gwan- gyeong <gwan-gyeong.mun@intel.com>
> > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > readback for LSPCON
> > >
> > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > This will help align the implementation with state readback
> > > > > infrastructure.
> > > > >
> > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > ++++++++++++++++++++-
> > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > intel_encoder
> > > *encoder,
> > > > >  				  buf, ret);
> > > > >  }
> > > > >
> > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > +drm_dp_aux *aux) {
> > > > > +	int ret;
> > > > > +	u32 val = 0;
> > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > +
> > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > +	if (ret < 0) {
> > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > +		return false;
> > > > > +	}
> > > > > +
> > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > +		return true;
> > > > > +
> > > > > +	return false;
> > > >
> > > > return val & ...;
> > > >
> > > > > +}
> > > > > +
> > > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > +drm_dp_aux *aux) {
> > > > > +	int ret;
> > > > > +	u32 val = 0;
> > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > +
> > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > +	if (ret < 0) {
> > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > +		return false;
> > > > > +	}
> > > > > +
> > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > +		return true;
> > > > > +
> > > > > +	return false;
> > > > > +}
> > > > > +
> > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > -	/* FIXME actually read this from the hw */
> > > > > -	return 0;
> > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > +	bool infoframes_enabled;
> > > > > +	u32 mask = 0;
> > > > > +	u32 val;
> > > > > +
> > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > +		infoframes_enabled =
> > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > +	else
> > > > > +		infoframes_enabled =
> > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > > > +
> > > > > +	if (infoframes_enabled)
> > > > > +		return true;
> > > >
> > > > This is supposed to return a bitmask of all enabled infoframes.
> >
> > > Actually since we're dealing with both the LSPCON specific stuff and
> > > DIP stuff for the DRM infoframe I think we should stop using using
> > > intel_hdmi_infoframes_enabled(), and instead provide a LSPCON
> > > specific replacement for it. That way we can directly return the
> > > abstract bitmask instead of pretending to return a bitmask of the DIP bits.
> >
> > Sure,  will fix this and resend the next version.
> >
> > > >
> > > > Also my question "how do we turn off infoframes once enabled?"
> > > > from
> > > > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
> > > > still remains unanswered...
> >
> > For the AVI infoframe we generally compute and change the respective
> > values. If no change is requested and computed we can let the existing
> > infoframes be transmitted. AFAIK there is no mechanism called out, to
> > explicitly disable this on Lspcon. Have not seen any issues due to this, so
> hoping that it may be safe even if they are enabled.
> 
> It's not valid to transmit infoframes to DVI sinks.

With your fix, we won't be enabling or setting the infoframe on DVI sinks.
If I understand correctly, we may have issue if we connect HDMI (where we would have
sent the infoframe) and later unplug and plug a DVI sink. With unplug if Lspcon is not
resetting this internally then this will be a problem. I will try to get this information on Lspcon
behavior.

> >
> > I am planning to take your patch from the series and float along with
> > this series, adding check for DRM Infoframes also. Hope that is ok ?
> >
> > Thanks Ville for your feedback.
> >
> > Regards,
> > Uma Shankar
> >
> > > > > +
> > > > > +	if (lspcon->hdr_supported) {
> > > > > +		val = intel_de_read(dev_priv,
> > > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > > >cpu_transcoder));
> > > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > > +
> > > > > +		if (val & mask)
> > > > > +			return val & mask;
> > > > > +	}
> > > > > +
> > > > > +	return false;
> > > > >  }
> > > > >
> > > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > > --
> > > > > 2.22.0
> > > >
> > > > --
> > > > Ville Syrjälä
> > > > Intel
> > >
> > > --
> > > Ville Syrjälä
> > > Intel
> 
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> > > > -----Original Message-----
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com;
> > > > Mun, Gwan- gyeong <gwan-gyeong.mun@intel.com>
> > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > readback for LSPCON
> > > >
> > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > This will help align the implementation with state readback
> > > > > > infrastructure.
> > > > > >
> > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > ---
> > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > ++++++++++++++++++++-
> > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > intel_encoder
> > > > *encoder,
> > > > > >  				  buf, ret);
> > > > > >  }
> > > > > >
> > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > +drm_dp_aux *aux) {
> > > > > > +	int ret;
> > > > > > +	u32 val = 0;
> > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > +
> > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > +	if (ret < 0) {
> > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > +		return false;
> > > > > > +	}
> > > > > > +
> > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > +		return true;
> > > > > > +
> > > > > > +	return false;
> > > > >
> > > > > return val & ...;
> > > > >
> > > > > > +}
> > > > > > +
> > > > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > +drm_dp_aux *aux) {
> > > > > > +	int ret;
> > > > > > +	u32 val = 0;
> > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > +
> > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > +	if (ret < 0) {
> > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > +		return false;
> > > > > > +	}
> > > > > > +
> > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > +		return true;
> > > > > > +
> > > > > > +	return false;
> > > > > > +}
> > > > > > +
> > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > -	/* FIXME actually read this from the hw */
> > > > > > -	return 0;
> > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > +	bool infoframes_enabled;
> > > > > > +	u32 mask = 0;
> > > > > > +	u32 val;
> > > > > > +
> > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > +		infoframes_enabled =
> > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > +	else
> > > > > > +		infoframes_enabled =
> > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > > > > +
> > > > > > +	if (infoframes_enabled)
> > > > > > +		return true;
> > > > >
> > > > > This is supposed to return a bitmask of all enabled infoframes.
> > >
> > > > Actually since we're dealing with both the LSPCON specific stuff
> > > > and DIP stuff for the DRM infoframe I think we should stop using
> > > > using intel_hdmi_infoframes_enabled(), and instead provide a
> > > > LSPCON specific replacement for it. That way we can directly
> > > > return the abstract bitmask instead of pretending to return a bitmask of
> the DIP bits.

We have DP (VSC etc) packets also managed as HDMI infoframes only. We can keep the
same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW
for DRM (HDR metadata). This will help all the helper align appropriately even in the intel_dump_pipe_config.

Will fix this accordingly and send the next version. Hope this is ok.

> > > Sure,  will fix this and resend the next version.
> > >
> > > > >
> > > > > Also my question "how do we turn off infoframes once enabled?"
> > > > > from
> > > > > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev
> > > > > =1
> > > > > still remains unanswered...
> > >
> > > For the AVI infoframe we generally compute and change the respective
> > > values. If no change is requested and computed we can let the
> > > existing infoframes be transmitted. AFAIK there is no mechanism
> > > called out, to explicitly disable this on Lspcon. Have not seen any
> > > issues due to this, so
> > hoping that it may be safe even if they are enabled.
> >
> > It's not valid to transmit infoframes to DVI sinks.
> 
> With your fix, we won't be enabling or setting the infoframe on DVI sinks.
> If I understand correctly, we may have issue if we connect HDMI (where we
> would have sent the infoframe) and later unplug and plug a DVI sink. With
> unplug if Lspcon is not resetting this internally then this will be a problem. I will
> try to get this information on Lspcon behavior.

Hi Ville,
Searched various docs on LSPCON and couldn't find any mention of disabling infoframe.
Reached out to few folks who were interfacing with Lspcon vendors and got this finally
clarified.  The expectation is that LSPCON will reset stuff on unplug and will not send infoframes to DVI sink,
so from source side we don't need to explicitly disable them. Lspcon will take care of this, this was
tested for compliance as well by them.

I will share the updated series adding your patch stopping infoframes to be sent to DVI sinks.
Please review the same.

Thank & Regards,
Uma Shankar
 
> > >
> > > I am planning to take your patch from the series and float along
> > > with this series, adding check for DRM Infoframes also. Hope that is ok ?
> > >
> > > Thanks Ville for your feedback.
> > >
> > > Regards,
> > > Uma Shankar
> > >
> > > > > > +
> > > > > > +	if (lspcon->hdr_supported) {
> > > > > > +		val = intel_de_read(dev_priv,
> > > > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > > > >cpu_transcoder));
> > > > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > > > +
> > > > > > +		if (val & mask)
> > > > > > +			return val & mask;
> > > > > > +	}
> > > > > > +
> > > > > > +	return false;
> > > > > >  }
> > > > > >
> > > > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > > > --
> > > > > > 2.22.0
> > > > >
> > > > > --
> > > > > Ville Syrjälä
> > > > > Intel
> > > >
> > > > --
> > > > Ville Syrjälä
> > > > Intel
> >
> > --
> > Ville Syrjälä
> > Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Mon, Jun 22, 2020 at 11:44:58AM +0000, Shankar, Uma wrote:
> 
> > > > > -----Original Message-----
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com;
> > > > > Mun, Gwan- gyeong <gwan-gyeong.mun@intel.com>
> > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > > readback for LSPCON
> > > > >
> > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > This will help align the implementation with state readback
> > > > > > > infrastructure.
> > > > > > >
> > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > ---
> > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > ++++++++++++++++++++-
> > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > > intel_encoder
> > > > > *encoder,
> > > > > > >  				  buf, ret);
> > > > > > >  }
> > > > > > >
> > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > +drm_dp_aux *aux) {
> > > > > > > +	int ret;
> > > > > > > +	u32 val = 0;
> > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > +
> > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > +	if (ret < 0) {
> > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > +		return false;
> > > > > > > +	}
> > > > > > > +
> > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > +		return true;
> > > > > > > +
> > > > > > > +	return false;
> > > > > >
> > > > > > return val & ...;
> > > > > >
> > > > > > > +}
> > > > > > > +
> > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > +drm_dp_aux *aux) {
> > > > > > > +	int ret;
> > > > > > > +	u32 val = 0;
> > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > +
> > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > +	if (ret < 0) {
> > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > +		return false;
> > > > > > > +	}
> > > > > > > +
> > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > +		return true;
> > > > > > > +
> > > > > > > +	return false;
> > > > > > > +}
> > > > > > > +
> > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > -	return 0;
> > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > > +	bool infoframes_enabled;
> > > > > > > +	u32 mask = 0;
> > > > > > > +	u32 val;
> > > > > > > +
> > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > +		infoframes_enabled =
> > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > +	else
> > > > > > > +		infoframes_enabled =
> > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > > > > > +
> > > > > > > +	if (infoframes_enabled)
> > > > > > > +		return true;
> > > > > >
> > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > >
> > > > > Actually since we're dealing with both the LSPCON specific stuff
> > > > > and DIP stuff for the DRM infoframe I think we should stop using
> > > > > using intel_hdmi_infoframes_enabled(), and instead provide a
> > > > > LSPCON specific replacement for it. That way we can directly
> > > > > return the abstract bitmask instead of pretending to return a bitmask of
> > the DIP bits.
> 
> We have DP (VSC etc) packets also managed as HDMI infoframes only. We can keep the
> same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW
> for DRM (HDR metadata). This will help all the helper align appropriately even in the intel_dump_pipe_config.

intel_dump_infoframe() does not use any platform specific bitmasks.
So I don't understand what you're talking about here.

> 
> Will fix this accordingly and send the next version. Hope this is ok.
> 
> > > > Sure,  will fix this and resend the next version.
> > > >
> > > > > >
> > > > > > Also my question "how do we turn off infoframes once enabled?"
> > > > > > from
> > > > > > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev
> > > > > > =1
> > > > > > still remains unanswered...
> > > >
> > > > For the AVI infoframe we generally compute and change the respective
> > > > values. If no change is requested and computed we can let the
> > > > existing infoframes be transmitted. AFAIK there is no mechanism
> > > > called out, to explicitly disable this on Lspcon. Have not seen any
> > > > issues due to this, so
> > > hoping that it may be safe even if they are enabled.
> > >
> > > It's not valid to transmit infoframes to DVI sinks.
> > 
> > With your fix, we won't be enabling or setting the infoframe on DVI sinks.
> > If I understand correctly, we may have issue if we connect HDMI (where we
> > would have sent the infoframe) and later unplug and plug a DVI sink. With
> > unplug if Lspcon is not resetting this internally then this will be a problem. I will
> > try to get this information on Lspcon behavior.
> 
> Hi Ville,
> Searched various docs on LSPCON and couldn't find any mention of disabling infoframe.
> Reached out to few folks who were interfacing with Lspcon vendors and got this finally
> clarified.  The expectation is that LSPCON will reset stuff on unplug and will not send infoframes to DVI sink,
> so from source side we don't need to explicitly disable them. Lspcon will take care of this, this was
> tested for compliance as well by them.

Unplug is irrelevant. We also have the property by which the user can
force the inforframes off.

> 
> I will share the updated series adding your patch stopping infoframes to be sent to DVI sinks.
> Please review the same.
> 
> Thank & Regards,
> Uma Shankar
>  
> > > >
> > > > I am planning to take your patch from the series and float along
> > > > with this series, adding check for DRM Infoframes also. Hope that is ok ?
> > > >
> > > > Thanks Ville for your feedback.
> > > >
> > > > Regards,
> > > > Uma Shankar
> > > >
> > > > > > > +
> > > > > > > +	if (lspcon->hdr_supported) {
> > > > > > > +		val = intel_de_read(dev_priv,
> > > > > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > > > > >cpu_transcoder));
> > > > > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > > > > +
> > > > > > > +		if (val & mask)
> > > > > > > +			return val & mask;
> > > > > > > +	}
> > > > > > > +
> > > > > > > +	return false;
> > > > > > >  }
> > > > > > >
> > > > > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > > > > --
> > > > > > > 2.22.0
> > > > > >
> > > > > > --
> > > > > > Ville Syrjälä
> > > > > > Intel
> > > > >
> > > > > --
> > > > > Ville Syrjälä
> > > > > Intel
> > >
> > > --
> > > Ville Syrjälä
> > > Intel

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> > > > > > -----Original Message-----
> > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > > Cc: intel-gfx@lists.freedesktop.org;
> > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong
> > > > > > <gwan-gyeong.mun@intel.com>
> > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > > > readback for LSPCON
> > > > > >
> > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > This will help align the implementation with state
> > > > > > > > readback infrastructure.
> > > > > > > >
> > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > ---
> > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > ++++++++++++++++++++-
> > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > > > intel_encoder
> > > > > > *encoder,
> > > > > > > >  				  buf, ret);
> > > > > > > >  }
> > > > > > > >
> > > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > +	int ret;
> > > > > > > > +	u32 val = 0;
> > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > +
> > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > +	if (ret < 0) {
> > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > +		return false;
> > > > > > > > +	}
> > > > > > > > +
> > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > +		return true;
> > > > > > > > +
> > > > > > > > +	return false;
> > > > > > >
> > > > > > > return val & ...;
> > > > > > >
> > > > > > > > +}
> > > > > > > > +
> > > > > > > > +static bool
> > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > +	int ret;
> > > > > > > > +	u32 val = 0;
> > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > +
> > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > +	if (ret < 0) {
> > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > +		return false;
> > > > > > > > +	}
> > > > > > > > +
> > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > +		return true;
> > > > > > > > +
> > > > > > > > +	return false;
> > > > > > > > +}
> > > > > > > > +
> > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > -	return 0;
> > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > > > +	bool infoframes_enabled;
> > > > > > > > +	u32 mask = 0;
> > > > > > > > +	u32 val;
> > > > > > > > +
> > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > +		infoframes_enabled =
> > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > +	else
> > > > > > > > +		infoframes_enabled =
> > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux)
> > > > > > > > +;
> > > > > > > > +
> > > > > > > > +	if (infoframes_enabled)
> > > > > > > > +		return true;
> > > > > > >
> > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > >
> > > > > > Actually since we're dealing with both the LSPCON specific
> > > > > > stuff and DIP stuff for the DRM infoframe I think we should
> > > > > > stop using using intel_hdmi_infoframes_enabled(), and instead
> > > > > > provide a LSPCON specific replacement for it. That way we can
> > > > > > directly return the abstract bitmask instead of pretending to
> > > > > > return a bitmask of
> > > the DIP bits.
> >
> > We have DP (VSC etc) packets also managed as HDMI infoframes only. We
> > can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for AVI and
> > similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata). This will
> help all the helper align appropriately even in the intel_dump_pipe_config.
> 
> intel_dump_infoframe() does not use any platform specific bitmasks.
> So I don't understand what you're talking about here.

What I meant is that if we continue to use the existing values and bitmask, we can have
lspcon infoframes_enabled return the appropriate type of infoframe which is active (as you suggested) and later
with intel_dump_pipe_config when it checks for intel_hdmi_infoframe_enable, we will get a matching value
in pipe_config->infoframes.enable and be able to dump them as well. Hope I am on same page with you here. 

> >
> > Will fix this accordingly and send the next version. Hope this is ok.
> >
> > > > > Sure,  will fix this and resend the next version.
> > > > >
> > > > > > >
> > > > > > > Also my question "how do we turn off infoframes once enabled?"
> > > > > > > from
> > > > > > > https://patchwork.freedesktop.org/patch/351719/?series=72928
> > > > > > > &rev
> > > > > > > =1
> > > > > > > still remains unanswered...
> > > > >
> > > > > For the AVI infoframe we generally compute and change the
> > > > > respective values. If no change is requested and computed we can
> > > > > let the existing infoframes be transmitted. AFAIK there is no
> > > > > mechanism called out, to explicitly disable this on Lspcon. Have
> > > > > not seen any issues due to this, so
> > > > hoping that it may be safe even if they are enabled.
> > > >
> > > > It's not valid to transmit infoframes to DVI sinks.
> > >
> > > With your fix, we won't be enabling or setting the infoframe on DVI sinks.
> > > If I understand correctly, we may have issue if we connect HDMI
> > > (where we would have sent the infoframe) and later unplug and plug a
> > > DVI sink. With unplug if Lspcon is not resetting this internally
> > > then this will be a problem. I will try to get this information on Lspcon
> behavior.
> >
> > Hi Ville,
> > Searched various docs on LSPCON and couldn't find any mention of disabling
> infoframe.
> > Reached out to few folks who were interfacing with Lspcon vendors and
> > got this finally clarified.  The expectation is that LSPCON will reset
> > stuff on unplug and will not send infoframes to DVI sink, so from
> > source side we don't need to explicitly disable them. Lspcon will take care of
> this, this was tested for compliance as well by them.
> 
> Unplug is irrelevant. We also have the property by which the user can force the
> inforframes off.
> 
> >
> > I will share the updated series adding your patch stopping infoframes to be
> sent to DVI sinks.
> > Please review the same.
> >
> > Thank & Regards,
> > Uma Shankar
> >
> > > > >
> > > > > I am planning to take your patch from the series and float along
> > > > > with this series, adding check for DRM Infoframes also. Hope that is ok ?
> > > > >
> > > > > Thanks Ville for your feedback.
> > > > >
> > > > > Regards,
> > > > > Uma Shankar
> > > > >
> > > > > > > > +
> > > > > > > > +	if (lspcon->hdr_supported) {
> > > > > > > > +		val = intel_de_read(dev_priv,
> > > > > > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > > > > > >cpu_transcoder));
> > > > > > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > > > > > +
> > > > > > > > +		if (val & mask)
> > > > > > > > +			return val & mask;
> > > > > > > > +	}
> > > > > > > > +
> > > > > > > > +	return false;
> > > > > > > >  }
> > > > > > > >
> > > > > > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > > > > > --
> > > > > > > > 2.22.0
> > > > > > >
> > > > > > > --
> > > > > > > Ville Syrjälä
> > > > > > > Intel
> > > > > >
> > > > > > --
> > > > > > Ville Syrjälä
> > > > > > Intel
> > > >
> > > > --
> > > > Ville Syrjälä
> > > > Intel
> 
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> > > > > > > -----Original Message-----
> > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > > > Cc: intel-gfx@lists.freedesktop.org;
> > > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong
> > > > > > > <gwan-gyeong.mun@intel.com>
> > > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > > > > readback for LSPCON
> > > > > > >
> > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > > This will help align the implementation with state
> > > > > > > > > readback infrastructure.
> > > > > > > > >
> > > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > > ---
> > > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > > ++++++++++++++++++++-
> > > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > > >
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > > > > intel_encoder
> > > > > > > *encoder,
> > > > > > > > >  				  buf, ret);
> > > > > > > > >  }
> > > > > > > > >
> > > > > > > > > +static bool
> > > > > > > > > +_lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > +	int ret;
> > > > > > > > > +	u32 val = 0;
> > > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > > +
> > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > +	if (ret < 0) {
> > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > +		return false;
> > > > > > > > > +	}
> > > > > > > > > +
> > > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > > +		return true;
> > > > > > > > > +
> > > > > > > > > +	return false;
> > > > > > > >
> > > > > > > > return val & ...;
> > > > > > > >
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > > +static bool
> > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > +	int ret;
> > > > > > > > > +	u32 val = 0;
> > > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > > +
> > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > +	if (ret < 0) {
> > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > +		return false;
> > > > > > > > > +	}
> > > > > > > > > +
> > > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > > +		return true;
> > > > > > > > > +
> > > > > > > > > +	return false;
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > > -	return 0;
> > > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > > > > +	bool infoframes_enabled;
> > > > > > > > > +	u32 mask = 0;
> > > > > > > > > +	u32 val;
> > > > > > > > > +
> > > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > > +		infoframes_enabled =
> > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > > +	else
> > > > > > > > > +		infoframes_enabled =
> > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->au
> > > > > > > > > +x)
> > > > > > > > > +;
> > > > > > > > > +
> > > > > > > > > +	if (infoframes_enabled)
> > > > > > > > > +		return true;
> > > > > > > >
> > > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > > >
> > > > > > > Actually since we're dealing with both the LSPCON specific
> > > > > > > stuff and DIP stuff for the DRM infoframe I think we should
> > > > > > > stop using using intel_hdmi_infoframes_enabled(), and
> > > > > > > instead provide a LSPCON specific replacement for it. That
> > > > > > > way we can directly return the abstract bitmask instead of
> > > > > > > pretending to return a bitmask of
> > > > the DIP bits.
> > >
> > > We have DP (VSC etc) packets also managed as HDMI infoframes only.
> > > We can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for
> > > AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata).
> > > This will
> > help all the helper align appropriately even in the intel_dump_pipe_config.
> >
> > intel_dump_infoframe() does not use any platform specific bitmasks.
> > So I don't understand what you're talking about here.
> 
> What I meant is that if we continue to use the existing values and bitmask, we
> can have lspcon infoframes_enabled return the appropriate type of infoframe
> which is active (as you suggested) and later with intel_dump_pipe_config when it
> checks for intel_hdmi_infoframe_enable, we will get a matching value in
> pipe_config->infoframes.enable and be able to dump them as well. Hope I am on
> same page with you here.
> 
> > >
> > > Will fix this accordingly and send the next version. Hope this is ok.
> > >
> > > > > > Sure,  will fix this and resend the next version.
> > > > > >
> > > > > > > >
> > > > > > > > Also my question "how do we turn off infoframes once enabled?"
> > > > > > > > from
> > > > > > > > https://patchwork.freedesktop.org/patch/351719/?series=729
> > > > > > > > 28
> > > > > > > > &rev
> > > > > > > > =1
> > > > > > > > still remains unanswered...
> > > > > >
> > > > > > For the AVI infoframe we generally compute and change the
> > > > > > respective values. If no change is requested and computed we
> > > > > > can let the existing infoframes be transmitted. AFAIK there is
> > > > > > no mechanism called out, to explicitly disable this on Lspcon.
> > > > > > Have not seen any issues due to this, so
> > > > > hoping that it may be safe even if they are enabled.
> > > > >
> > > > > It's not valid to transmit infoframes to DVI sinks.
> > > >
> > > > With your fix, we won't be enabling or setting the infoframe on DVI sinks.
> > > > If I understand correctly, we may have issue if we connect HDMI
> > > > (where we would have sent the infoframe) and later unplug and plug
> > > > a DVI sink. With unplug if Lspcon is not resetting this internally
> > > > then this will be a problem. I will try to get this information on
> > > > Lspcon
> > behavior.
> > >
> > > Hi Ville,
> > > Searched various docs on LSPCON and couldn't find any mention of
> > > disabling
> > infoframe.
> > > Reached out to few folks who were interfacing with Lspcon vendors
> > > and got this finally clarified.  The expectation is that LSPCON will
> > > reset stuff on unplug and will not send infoframes to DVI sink, so
> > > from source side we don't need to explicitly disable them. Lspcon
> > > will take care of
> > this, this was tested for compliance as well by them.
> >
> > Unplug is irrelevant. We also have the property by which the user can
> > force the inforframes off.

Oh ok, but it seems we don't have an option to disable them on LSPCON. They have not
added any interface for that unfortunately.

Regards,
Uma Shankar

> > >
> > > I will share the updated series adding your patch stopping
> > > infoframes to be
> > sent to DVI sinks.
> > > Please review the same.
> > >
> > > Thank & Regards,
> > > Uma Shankar
> > >
> > > > > >
> > > > > > I am planning to take your patch from the series and float
> > > > > > along with this series, adding check for DRM Infoframes also. Hope that
> is ok ?
> > > > > >
> > > > > > Thanks Ville for your feedback.
> > > > > >
> > > > > > Regards,
> > > > > > Uma Shankar
> > > > > >
> > > > > > > > > +
> > > > > > > > > +	if (lspcon->hdr_supported) {
> > > > > > > > > +		val = intel_de_read(dev_priv,
> > > > > > > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > > > > > > >cpu_transcoder));
> > > > > > > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > > > > > > +
> > > > > > > > > +		if (val & mask)
> > > > > > > > > +			return val & mask;
> > > > > > > > > +	}
> > > > > > > > > +
> > > > > > > > > +	return false;
> > > > > > > > >  }
> > > > > > > > >
> > > > > > > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > > > > > > --
> > > > > > > > > 2.22.0
> > > > > > > >
> > > > > > > > --
> > > > > > > > Ville Syrjälä
> > > > > > > > Intel
> > > > > > >
> > > > > > > --
> > > > > > > Ville Syrjälä
> > > > > > > Intel
> > > > >
> > > > > --
> > > > > Ville Syrjälä
> > > > > Intel
> >
> > --
> > Ville Syrjälä
> > Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Mon, Jun 22, 2020 at 05:17:50PM +0000, Shankar, Uma wrote:
> 
> > > > > > > -----Original Message-----
> > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > > > Cc: intel-gfx@lists.freedesktop.org;
> > > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong
> > > > > > > <gwan-gyeong.mun@intel.com>
> > > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > > > > readback for LSPCON
> > > > > > >
> > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > > This will help align the implementation with state
> > > > > > > > > readback infrastructure.
> > > > > > > > >
> > > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > > ---
> > > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > > ++++++++++++++++++++-
> > > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > > >
> > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > > > > intel_encoder
> > > > > > > *encoder,
> > > > > > > > >  				  buf, ret);
> > > > > > > > >  }
> > > > > > > > >
> > > > > > > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > +	int ret;
> > > > > > > > > +	u32 val = 0;
> > > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > > +
> > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > +	if (ret < 0) {
> > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > +		return false;
> > > > > > > > > +	}
> > > > > > > > > +
> > > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > > +		return true;
> > > > > > > > > +
> > > > > > > > > +	return false;
> > > > > > > >
> > > > > > > > return val & ...;
> > > > > > > >
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > > +static bool
> > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > +	int ret;
> > > > > > > > > +	u32 val = 0;
> > > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > > +
> > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > +	if (ret < 0) {
> > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > +		return false;
> > > > > > > > > +	}
> > > > > > > > > +
> > > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > > +		return true;
> > > > > > > > > +
> > > > > > > > > +	return false;
> > > > > > > > > +}
> > > > > > > > > +
> > > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > > -	return 0;
> > > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > > > > +	bool infoframes_enabled;
> > > > > > > > > +	u32 mask = 0;
> > > > > > > > > +	u32 val;
> > > > > > > > > +
> > > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > > +		infoframes_enabled =
> > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > > +	else
> > > > > > > > > +		infoframes_enabled =
> > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux)
> > > > > > > > > +;
> > > > > > > > > +
> > > > > > > > > +	if (infoframes_enabled)
> > > > > > > > > +		return true;
> > > > > > > >
> > > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > > >
> > > > > > > Actually since we're dealing with both the LSPCON specific
> > > > > > > stuff and DIP stuff for the DRM infoframe I think we should
> > > > > > > stop using using intel_hdmi_infoframes_enabled(), and instead
> > > > > > > provide a LSPCON specific replacement for it. That way we can
> > > > > > > directly return the abstract bitmask instead of pretending to
> > > > > > > return a bitmask of
> > > > the DIP bits.
> > >
> > > We have DP (VSC etc) packets also managed as HDMI infoframes only. We
> > > can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for AVI and
> > > similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata). This will
> > help all the helper align appropriately even in the intel_dump_pipe_config.
> > 
> > intel_dump_infoframe() does not use any platform specific bitmasks.
> > So I don't understand what you're talking about here.
> 
> What I meant is that if we continue to use the existing values and bitmask, we can have
> lspcon infoframes_enabled return the appropriate type of infoframe which is active (as you suggested) and later
> with intel_dump_pipe_config when it checks for intel_hdmi_infoframe_enable, we will get a matching value
> in pipe_config->infoframes.enable and be able to dump them as well. Hope I am on same page with you here. 

Still don't really get  what you're saying.

What I am saying is we have something like:

intel_lspcon_infoframes_enabled()
{
	u32 enabled = 0;

	if (lspcon_avi_enabled)
		enabled |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);

	if (dip_gmp_enabled)
		enabled |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);

	return enabled;
}

Or I suppose we could even do something like:

intel_lspcon_infoframes_enabled()
{
	u32 enabled = intel_hdmi_infoframes_enabled();

	if (lspcon_avi_enabled)
		enabled |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);

	return enabled;
}

which would be more future proof if we start to use any
other DIP stuff.

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Monday, June 22, 2020 11:10 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com; Mun, Gwan-
> gyeong <gwan-gyeong.mun@intel.com>
> Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes readback for
> LSPCON
> 
> On Mon, Jun 22, 2020 at 05:17:50PM +0000, Shankar, Uma wrote:
> >
> > > > > > > > -----Original Message-----
> > > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > > > > Cc: intel-gfx@lists.freedesktop.org;
> > > > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong
> > > > > > > > <gwan-gyeong.mun@intel.com>
> > > > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement
> > > > > > > > infoframes readback for LSPCON
> > > > > > > >
> > > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > > > This will help align the implementation with state
> > > > > > > > > > readback infrastructure.
> > > > > > > > > >
> > > > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > > > ---
> > > > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > > > ++++++++++++++++++++-
> > > > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > > > >
> > > > > > > > > > diff --git
> > > > > > > > > > a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > @@ -576,11 +576,70 @@ void
> > > > > > > > > > lspcon_set_infoframes(struct intel_encoder
> > > > > > > > *encoder,
> > > > > > > > > >  				  buf, ret);
> > > > > > > > > >  }
> > > > > > > > > >
> > > > > > > > > > +static bool
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > +	int ret;
> > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > > > +
> > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n",
> reg);
> > > > > > > > > > +		return false;
> > > > > > > > > > +	}
> > > > > > > > > > +
> > > > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > > > +		return true;
> > > > > > > > > > +
> > > > > > > > > > +	return false;
> > > > > > > > >
> > > > > > > > > return val & ...;
> > > > > > > > >
> > > > > > > > > > +}
> > > > > > > > > > +
> > > > > > > > > > +static bool
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > +	int ret;
> > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > > > +
> > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n",
> reg);
> > > > > > > > > > +		return false;
> > > > > > > > > > +	}
> > > > > > > > > > +
> > > > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > > > +		return true;
> > > > > > > > > > +
> > > > > > > > > > +	return false;
> > > > > > > > > > +}
> > > > > > > > > > +
> > > > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > > > > >  			      const struct intel_crtc_state
> *pipe_config)  {
> > > > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > > > -	return 0;
> > > > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > > > +	struct intel_lspcon *lspcon =
> enc_to_intel_lspcon(encoder);
> > > > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> >base.dev);
> > > > > > > > > > +	bool infoframes_enabled;
> > > > > > > > > > +	u32 mask = 0;
> > > > > > > > > > +	u32 val;
> > > > > > > > > > +
> > > > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > > > +		infoframes_enabled =
> > > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > > > +	else
> > > > > > > > > > +		infoframes_enabled =
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->
> > > > > > > > > > +aux)
> > > > > > > > > > +;
> > > > > > > > > > +
> > > > > > > > > > +	if (infoframes_enabled)
> > > > > > > > > > +		return true;
> > > > > > > > >
> > > > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > > > >
> > > > > > > > Actually since we're dealing with both the LSPCON specific
> > > > > > > > stuff and DIP stuff for the DRM infoframe I think we
> > > > > > > > should stop using using intel_hdmi_infoframes_enabled(),
> > > > > > > > and instead provide a LSPCON specific replacement for it.
> > > > > > > > That way we can directly return the abstract bitmask
> > > > > > > > instead of pretending to return a bitmask of
> > > > > the DIP bits.
> > > >
> > > > We have DP (VSC etc) packets also managed as HDMI infoframes only.
> > > > We can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for
> > > > AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata).
> > > > This will
> > > help all the helper align appropriately even in the intel_dump_pipe_config.
> > >
> > > intel_dump_infoframe() does not use any platform specific bitmasks.
> > > So I don't understand what you're talking about here.
> >
> > What I meant is that if we continue to use the existing values and
> > bitmask, we can have lspcon infoframes_enabled return the appropriate
> > type of infoframe which is active (as you suggested) and later with
> > intel_dump_pipe_config when it checks for intel_hdmi_infoframe_enable, we
> will get a matching value in pipe_config->infoframes.enable and be able to dump
> them as well. Hope I am on same page with you here.
> 
> Still don't really get  what you're saying.
> 
> What I am saying is we have something like:
> 
> intel_lspcon_infoframes_enabled()
> {
> 	u32 enabled = 0;
> 
> 	if (lspcon_avi_enabled)
> 		enabled |=
> intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
> 
> 	if (dip_gmp_enabled)
> 		enabled |=
> intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> 
> 	return enabled;
> }
> 
> Or I suppose we could even do something like:
> 
> intel_lspcon_infoframes_enabled()
> {
> 	u32 enabled = intel_hdmi_infoframes_enabled();
> 
> 	if (lspcon_avi_enabled)
> 		enabled |=
> intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
> 
> 	return enabled;
> }
> 
> which would be more future proof if we start to use any other DIP stuff.

Got the point now, thanks Ville for patiently clarifying. Will incorporate this and send out
the next version.

Regards,
Uma Shankar

> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Ville Syrjälä]

On Mon, Jun 22, 2020 at 05:21:50PM +0000, Shankar, Uma wrote:
> 
> > > > > > > > -----Original Message-----
> > > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > > Sent: Thursday, June 11, 2020 9:31 PM
> > > > > > > > To: Shankar, Uma <uma.shankar@intel.com>
> > > > > > > > Cc: intel-gfx@lists.freedesktop.org;
> > > > > > > > jani.nikula@linux.intel.com; Mun, Gwan- gyeong
> > > > > > > > <gwan-gyeong.mun@intel.com>
> > > > > > > > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes
> > > > > > > > readback for LSPCON
> > > > > > > >
> > > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > > > This will help align the implementation with state
> > > > > > > > > > readback infrastructure.
> > > > > > > > > >
> > > > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > > > ---
> > > > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > > > ++++++++++++++++++++-
> > > > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > > > >
> > > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct
> > > > > > > > > > intel_encoder
> > > > > > > > *encoder,
> > > > > > > > > >  				  buf, ret);
> > > > > > > > > >  }
> > > > > > > > > >
> > > > > > > > > > +static bool
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > +	int ret;
> > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > > > +
> > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > > +		return false;
> > > > > > > > > > +	}
> > > > > > > > > > +
> > > > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > > > +		return true;
> > > > > > > > > > +
> > > > > > > > > > +	return false;
> > > > > > > > >
> > > > > > > > > return val & ...;
> > > > > > > > >
> > > > > > > > > > +}
> > > > > > > > > > +
> > > > > > > > > > +static bool
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > +	int ret;
> > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > > > +
> > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > > > > > > > +		return false;
> > > > > > > > > > +	}
> > > > > > > > > > +
> > > > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > > > +		return true;
> > > > > > > > > > +
> > > > > > > > > > +	return false;
> > > > > > > > > > +}
> > > > > > > > > > +
> > > > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > > > > > > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > > > -	return 0;
> > > > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > > > > > > > +	bool infoframes_enabled;
> > > > > > > > > > +	u32 mask = 0;
> > > > > > > > > > +	u32 val;
> > > > > > > > > > +
> > > > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > > > +		infoframes_enabled =
> > > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > > > +	else
> > > > > > > > > > +		infoframes_enabled =
> > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->au
> > > > > > > > > > +x)
> > > > > > > > > > +;
> > > > > > > > > > +
> > > > > > > > > > +	if (infoframes_enabled)
> > > > > > > > > > +		return true;
> > > > > > > > >
> > > > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > > > >
> > > > > > > > Actually since we're dealing with both the LSPCON specific
> > > > > > > > stuff and DIP stuff for the DRM infoframe I think we should
> > > > > > > > stop using using intel_hdmi_infoframes_enabled(), and
> > > > > > > > instead provide a LSPCON specific replacement for it. That
> > > > > > > > way we can directly return the abstract bitmask instead of
> > > > > > > > pretending to return a bitmask of
> > > > > the DIP bits.
> > > >
> > > > We have DP (VSC etc) packets also managed as HDMI infoframes only.
> > > > We can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW for
> > > > AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR metadata).
> > > > This will
> > > help all the helper align appropriately even in the intel_dump_pipe_config.
> > >
> > > intel_dump_infoframe() does not use any platform specific bitmasks.
> > > So I don't understand what you're talking about here.
> > 
> > What I meant is that if we continue to use the existing values and bitmask, we
> > can have lspcon infoframes_enabled return the appropriate type of infoframe
> > which is active (as you suggested) and later with intel_dump_pipe_config when it
> > checks for intel_hdmi_infoframe_enable, we will get a matching value in
> > pipe_config->infoframes.enable and be able to dump them as well. Hope I am on
> > same page with you here.
> > 
> > > >
> > > > Will fix this accordingly and send the next version. Hope this is ok.
> > > >
> > > > > > > Sure,  will fix this and resend the next version.
> > > > > > >
> > > > > > > > >
> > > > > > > > > Also my question "how do we turn off infoframes once enabled?"
> > > > > > > > > from
> > > > > > > > > https://patchwork.freedesktop.org/patch/351719/?series=729
> > > > > > > > > 28
> > > > > > > > > &rev
> > > > > > > > > =1
> > > > > > > > > still remains unanswered...
> > > > > > >
> > > > > > > For the AVI infoframe we generally compute and change the
> > > > > > > respective values. If no change is requested and computed we
> > > > > > > can let the existing infoframes be transmitted. AFAIK there is
> > > > > > > no mechanism called out, to explicitly disable this on Lspcon.
> > > > > > > Have not seen any issues due to this, so
> > > > > > hoping that it may be safe even if they are enabled.
> > > > > >
> > > > > > It's not valid to transmit infoframes to DVI sinks.
> > > > >
> > > > > With your fix, we won't be enabling or setting the infoframe on DVI sinks.
> > > > > If I understand correctly, we may have issue if we connect HDMI
> > > > > (where we would have sent the infoframe) and later unplug and plug
> > > > > a DVI sink. With unplug if Lspcon is not resetting this internally
> > > > > then this will be a problem. I will try to get this information on
> > > > > Lspcon
> > > behavior.
> > > >
> > > > Hi Ville,
> > > > Searched various docs on LSPCON and couldn't find any mention of
> > > > disabling
> > > infoframe.
> > > > Reached out to few folks who were interfacing with Lspcon vendors
> > > > and got this finally clarified.  The expectation is that LSPCON will
> > > > reset stuff on unplug and will not send infoframes to DVI sink, so
> > > > from source side we don't need to explicitly disable them. Lspcon
> > > > will take care of
> > > this, this was tested for compliance as well by them.
> > >
> > > Unplug is irrelevant. We also have the property by which the user can
> > > force the inforframes off.
> 
> Oh ok, but it seems we don't have an option to disable them on LSPCON. They have not
> added any interface for that unfortunately.

That seems a bit crazy. What happens if we just zero out the whole
thing? The parade version at least seems to have that "token" byte
which maybe could be used to specify whether the infoframe is
enabled?

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON

[Shankar, Uma]

> > > > > > > > > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > > > > > > > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > > > > > > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > > > > > > > > This will help align the implementation with state
> > > > > > > > > > > readback infrastructure.
> > > > > > > > > > >
> > > > > > > > > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > > > > > > > > ---
> > > > > > > > > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > > > > > > > > ++++++++++++++++++++-
> > > > > > > > > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > > > > > > > > >
> > > > > > > > > > > diff --git
> > > > > > > > > > > a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > > > > > > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > > > > > > > > @@ -576,11 +576,70 @@ void
> > > > > > > > > > > lspcon_set_infoframes(struct intel_encoder
> > > > > > > > > *encoder,
> > > > > > > > > > >  				  buf, ret);
> > > > > > > > > > >  }
> > > > > > > > > > >
> > > > > > > > > > > +static bool
> > > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_mca(struct
> > > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > > +	int ret;
> > > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > > > > > > > > +
> > > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n",
> reg);
> > > > > > > > > > > +		return false;
> > > > > > > > > > > +	}
> > > > > > > > > > > +
> > > > > > > > > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > > > > > > > > +		return true;
> > > > > > > > > > > +
> > > > > > > > > > > +	return false;
> > > > > > > > > >
> > > > > > > > > > return val & ...;
> > > > > > > > > >
> > > > > > > > > > > +}
> > > > > > > > > > > +
> > > > > > > > > > > +static bool
> > > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(struct
> > > > > > > > > > > +drm_dp_aux *aux) {
> > > > > > > > > > > +	int ret;
> > > > > > > > > > > +	u32 val = 0;
> > > > > > > > > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > > > > > > > > +
> > > > > > > > > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > > > > > > > > +	if (ret < 0) {
> > > > > > > > > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n",
> reg);
> > > > > > > > > > > +		return false;
> > > > > > > > > > > +	}
> > > > > > > > > > > +
> > > > > > > > > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > > > > > > > > +		return true;
> > > > > > > > > > > +
> > > > > > > > > > > +	return false;
> > > > > > > > > > > +}
> > > > > > > > > > > +
> > > > > > > > > > >  u32 lspcon_infoframes_enabled(struct intel_encoder
> *encoder,
> > > > > > > > > > >  			      const struct intel_crtc_state
> *pipe_config)  {
> > > > > > > > > > > -	/* FIXME actually read this from the hw */
> > > > > > > > > > > -	return 0;
> > > > > > > > > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > > > > > > > > +	struct intel_lspcon *lspcon =
> enc_to_intel_lspcon(encoder);
> > > > > > > > > > > +	struct drm_i915_private *dev_priv = to_i915(encoder-
> >base.dev);
> > > > > > > > > > > +	bool infoframes_enabled;
> > > > > > > > > > > +	u32 mask = 0;
> > > > > > > > > > > +	u32 val;
> > > > > > > > > > > +
> > > > > > > > > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > > > > > > > > +		infoframes_enabled =
> > > > > > > > > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > > > > > > > > +	else
> > > > > > > > > > > +		infoframes_enabled =
> > > > > > > > > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp
> > > > > > > > > > > +->au
> > > > > > > > > > > +x)
> > > > > > > > > > > +;
> > > > > > > > > > > +
> > > > > > > > > > > +	if (infoframes_enabled)
> > > > > > > > > > > +		return true;
> > > > > > > > > >
> > > > > > > > > > This is supposed to return a bitmask of all enabled infoframes.
> > > > > > > >
> > > > > > > > > Actually since we're dealing with both the LSPCON
> > > > > > > > > specific stuff and DIP stuff for the DRM infoframe I
> > > > > > > > > think we should stop using using
> > > > > > > > > intel_hdmi_infoframes_enabled(), and instead provide a
> > > > > > > > > LSPCON specific replacement for it. That way we can
> > > > > > > > > directly return the abstract bitmask instead of
> > > > > > > > > pretending to return a bitmask of
> > > > > > the DIP bits.
> > > > >
> > > > > We have DP (VSC etc) packets also managed as HDMI infoframes only.
> > > > > We can keep the same with bitmask as VIDEO_DIP_ENABLE_AVI_HSW
> > > > > for AVI and similarly VIDEO_DIP_ENABLE_GMP_HSW for DRM (HDR
> metadata).
> > > > > This will
> > > > help all the helper align appropriately even in the intel_dump_pipe_config.
> > > >
> > > > intel_dump_infoframe() does not use any platform specific bitmasks.
> > > > So I don't understand what you're talking about here.
> > >
> > > What I meant is that if we continue to use the existing values and
> > > bitmask, we can have lspcon infoframes_enabled return the
> > > appropriate type of infoframe which is active (as you suggested) and
> > > later with intel_dump_pipe_config when it checks for
> > > intel_hdmi_infoframe_enable, we will get a matching value in
> > > pipe_config->infoframes.enable and be able to dump them as well. Hope I
> am on same page with you here.
> > >
> > > > >
> > > > > Will fix this accordingly and send the next version. Hope this is ok.
> > > > >
> > > > > > > > Sure,  will fix this and resend the next version.
> > > > > > > >
> > > > > > > > > >
> > > > > > > > > > Also my question "how do we turn off infoframes once
> enabled?"
> > > > > > > > > > from
> > > > > > > > > > https://patchwork.freedesktop.org/patch/351719/?series
> > > > > > > > > > =729
> > > > > > > > > > 28
> > > > > > > > > > &rev
> > > > > > > > > > =1
> > > > > > > > > > still remains unanswered...
> > > > > > > >
> > > > > > > > For the AVI infoframe we generally compute and change the
> > > > > > > > respective values. If no change is requested and computed
> > > > > > > > we can let the existing infoframes be transmitted. AFAIK
> > > > > > > > there is no mechanism called out, to explicitly disable this on
> Lspcon.
> > > > > > > > Have not seen any issues due to this, so
> > > > > > > hoping that it may be safe even if they are enabled.
> > > > > > >
> > > > > > > It's not valid to transmit infoframes to DVI sinks.
> > > > > >
> > > > > > With your fix, we won't be enabling or setting the infoframe on DVI
> sinks.
> > > > > > If I understand correctly, we may have issue if we connect
> > > > > > HDMI (where we would have sent the infoframe) and later unplug
> > > > > > and plug a DVI sink. With unplug if Lspcon is not resetting
> > > > > > this internally then this will be a problem. I will try to get
> > > > > > this information on Lspcon
> > > > behavior.
> > > > >
> > > > > Hi Ville,
> > > > > Searched various docs on LSPCON and couldn't find any mention of
> > > > > disabling
> > > > infoframe.
> > > > > Reached out to few folks who were interfacing with Lspcon
> > > > > vendors and got this finally clarified.  The expectation is that
> > > > > LSPCON will reset stuff on unplug and will not send infoframes
> > > > > to DVI sink, so from source side we don't need to explicitly
> > > > > disable them. Lspcon will take care of
> > > > this, this was tested for compliance as well by them.
> > > >
> > > > Unplug is irrelevant. We also have the property by which the user
> > > > can force the inforframes off.
> >
> > Oh ok, but it seems we don't have an option to disable them on LSPCON.
> > They have not added any interface for that unfortunately.
> 
> That seems a bit crazy. What happens if we just zero out the whole thing? The
> parade version at least seems to have that "token" byte which maybe could be
> used to specify whether the infoframe is enabled?

Hmm, vendor has not defined his action in case we zero out stuff. Most definitely it should
fail and hopefully would be able to recover without crashing himself (as this will be something he
won't be expecting). For parade yeah we have the token byte which it expects to be non-zero,
may be making that to 0 will trigger a failure. But no documentation regarding this is available, so cant
say for sure. 

For the windows design which are productized, they have not disabled the infoframes. Just they try to ensure they
always send appropriate values as infoframes.  But yeah, this is something which was not thought of as part of Lspcon
design.

> --
> Ville Syrjälä
> Intel
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