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From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	Fabio Estevam <festevam@gmail.com>,
	linux-imx@nxp.com, kernel@pengutronix.de
Subject: [PATCH 2/2] ARM: dts: imx6qdl-sabresd: Add an mdio node
Date: Wed, 17 Jun 2020 20:22:49 -0300	[thread overview]
Message-ID: <20200617232249.7201-2-festevam@gmail.com> (raw)
In-Reply-To: <20200617232249.7201-1-festevam@gmail.com>

imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.

The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.

Improve the Ethernet representation by adding an mdio node with such
information.

An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 9697211b7693..fb70ae0811af 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -203,10 +203,21 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii-id";
+	phy-handle = <&phy>;
 	phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy: ethernet-phy@1 {
+			reg = <1>;
+			qca,clk-out-frequency = <125000000>;
+		};
+	};
 };
 
 &hdmi {
-- 
2.17.1


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  reply	other threads:[~2020-06-17 23:23 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-17 23:22 [PATCH 1/2] ARM: dts: imx6qdl-sabresd: Pass phy-reset-duration Fabio Estevam
2020-06-17 23:22 ` Fabio Estevam [this message]
2020-06-25 11:08 [PATCH 1/2] ARM: dts: imx6q-tbs2910: " Fabio Estevam
2020-06-25 11:08 ` [PATCH 2/2] ARM: dts: imx6qdl-sabresd: Add an mdio node Fabio Estevam

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