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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 06/26] drm/i915: Parse command buffer earlier in eb_relocate(slow)
Date: Tue, 23 Jun 2020 16:28:23 +0200	[thread overview]
Message-ID: <20200623142843.423594-6-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20200623142843.423594-1-maarten.lankhorst@linux.intel.com>

We want to introduce backoff logic, but we need to lock the
pool object as well for command parsing. Because of this, we
will need backoff logic for the engine pool obj, move the batch
validation up slightly to eb_lookup_vmas, and the actual command
parsing in a separate function which can get called from execbuf
relocation fast and slowpath.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 66 ++++++++++---------
 1 file changed, 36 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index f896b1a4b38a..7cb44915cfc7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -290,6 +290,8 @@ struct i915_execbuffer {
 	struct eb_vma_array *array;
 };
 
+static int eb_parse(struct i915_execbuffer *eb);
+
 static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
 {
 	return intel_engine_requires_cmd_parser(eb->engine) ||
@@ -873,6 +875,7 @@ static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
 
 static int eb_lookup_vmas(struct i915_execbuffer *eb)
 {
+	struct drm_i915_private *i915 = eb->i915;
 	unsigned int batch = eb_batch_index(eb);
 	unsigned int i;
 	int err = 0;
@@ -886,18 +889,37 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
 		vma = eb_lookup_vma(eb, eb->exec[i].handle);
 		if (IS_ERR(vma)) {
 			err = PTR_ERR(vma);
-			break;
+			goto err;
 		}
 
 		err = eb_validate_vma(eb, &eb->exec[i], vma);
 		if (unlikely(err)) {
 			i915_vma_put(vma);
-			break;
+			goto err;
 		}
 
 		eb_add_vma(eb, i, batch, vma);
 	}
 
+	if (unlikely(eb->batch->flags & EXEC_OBJECT_WRITE)) {
+		drm_dbg(&i915->drm,
+			"Attempting to use self-modifying batch buffer\n");
+		return -EINVAL;
+	}
+
+	if (range_overflows_t(u64,
+			      eb->batch_start_offset, eb->batch_len,
+			      eb->batch->vma->size)) {
+		drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
+		return -EINVAL;
+	}
+
+	if (eb->batch_len == 0)
+		eb->batch_len = eb->batch->vma->size - eb->batch_start_offset;
+
+	return 0;
+
+err:
 	eb->vma[i].vma = NULL;
 	return err;
 }
@@ -1809,7 +1831,7 @@ static int eb_prefault_relocations(const struct i915_execbuffer *eb)
 	return 0;
 }
 
-static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
+static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb)
 {
 	bool have_copy = false;
 	struct eb_vma *ev;
@@ -1872,6 +1894,11 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
 	if (err)
 		goto err;
 
+	/* as last step, parse the command buffer */
+	err = eb_parse(eb);
+	if (err)
+		goto err;
+
 	/*
 	 * Leave the user relocations as are, this is the painfully slow path,
 	 * and we want to avoid the complication of dropping the lock whilst
@@ -1904,7 +1931,7 @@ static noinline int eb_relocate_slow(struct i915_execbuffer *eb)
 	return err;
 }
 
-static int eb_relocate(struct i915_execbuffer *eb)
+static int eb_relocate_parse(struct i915_execbuffer *eb)
 {
 	int err;
 
@@ -1932,7 +1959,7 @@ static int eb_relocate(struct i915_execbuffer *eb)
 			return eb_relocate_slow(eb);
 	}
 
-	return 0;
+	return eb_parse(eb);
 }
 
 static int eb_move_to_gpu(struct i915_execbuffer *eb)
@@ -2870,7 +2897,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	if (unlikely(err))
 		goto err_context;
 
-	err = eb_relocate(&eb);
+	err = eb_relocate_parse(&eb);
 	if (err) {
 		/*
 		 * If the user expects the execobject.offset and
@@ -2883,33 +2910,10 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 		goto err_vma;
 	}
 
-	if (unlikely(eb.batch->flags & EXEC_OBJECT_WRITE)) {
-		drm_dbg(&i915->drm,
-			"Attempting to use self-modifying batch buffer\n");
-		err = -EINVAL;
-		goto err_vma;
-	}
-
-	if (range_overflows_t(u64,
-			      eb.batch_start_offset, eb.batch_len,
-			      eb.batch->vma->size)) {
-		drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
-		err = -EINVAL;
-		goto err_vma;
-	}
-
-	if (eb.batch_len == 0)
-		eb.batch_len = eb.batch->vma->size - eb.batch_start_offset;
-
-	err = eb_parse(&eb);
-	if (err)
-		goto err_vma;
-
 	/*
 	 * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
 	 * batch" bit. Hence we need to pin secure batches into the global gtt.
 	 * hsw should have this fixed, but bdw mucks it up again. */
-	batch = eb.batch->vma;
 	if (eb.batch_flags & I915_DISPATCH_SECURE) {
 		struct i915_vma *vma;
 
@@ -2923,13 +2927,15 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 		 *   fitting due to fragmentation.
 		 * So this is actually safe.
 		 */
-		vma = i915_gem_object_ggtt_pin(batch->obj, NULL, 0, 0, 0);
+		vma = i915_gem_object_ggtt_pin(eb.batch->vma->obj, NULL, 0, 0, 0);
 		if (IS_ERR(vma)) {
 			err = PTR_ERR(vma);
 			goto err_parse;
 		}
 
 		batch = vma;
+	} else {
+		batch = eb.batch->vma;
 	}
 
 	/* All GPU relocation batches must be submitted prior to the user rq */
-- 
2.27.0

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  parent reply	other threads:[~2020-06-23 14:29 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-23 14:28 [Intel-gfx] [PATCH 01/26] Revert "drm/i915/gem: Async GPU relocations only" Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 02/26] drm/i915: Revert relocation chaining commits Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 03/26] Revert "drm/i915/gem: Drop relocation slowpath" Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 04/26] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2 Maarten Lankhorst
2020-06-24  7:10   ` Thomas Hellström (Intel)
2020-06-24  7:43     ` Chris Wilson
2020-06-24  7:49       ` Thomas Hellström (Intel)
2020-06-24  8:27         ` Chris Wilson
2020-06-29 12:07   ` Tvrtko Ursulin
2020-06-29 12:32   ` Tvrtko Ursulin
2020-06-29 13:44     ` Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 05/26] drm/i915: Remove locking from i915_gem_object_prepare_read/write Maarten Lankhorst
2020-06-26 13:32   ` Thomas Hellström (Intel)
2020-06-29 12:56   ` Tvrtko Ursulin
2020-06-23 14:28 ` Maarten Lankhorst [this message]
2020-06-26 14:41   ` [Intel-gfx] [PATCH 06/26] drm/i915: Parse command buffer earlier in eb_relocate(slow) Thomas Hellström (Intel)
2020-06-29 10:40     ` Maarten Lankhorst
2020-06-29 11:15       ` Thomas Hellström (Intel)
2020-06-29 11:18         ` Maarten Lankhorst
2020-06-29 14:42   ` Tvrtko Ursulin
2020-06-23 14:28 ` [Intel-gfx] [PATCH 07/26] Revert "drm/i915/gem: Split eb_vma into its own allocation" Maarten Lankhorst
2020-06-29 15:08   ` Tvrtko Ursulin
2020-06-30 11:52     ` Maarten Lankhorst
2020-06-30 12:31       ` Tvrtko Ursulin
2020-06-30 14:07         ` Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 08/26] drm/i915/gem: Make eb_add_lut interruptible wait on object lock Maarten Lankhorst
2020-06-26 13:52   ` Thomas Hellström (Intel)
2020-06-29 15:14   ` Tvrtko Ursulin
2020-06-30 11:56     ` Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 09/26] drm/i915: Use per object locking in execbuf, v12 Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 10/26] drm/i915: Use ww locking in intel_renderstate Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 11/26] drm/i915: Add ww context handling to context_barrier_task Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 12/26] drm/i915: Nuke arguments to eb_pin_engine Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 13/26] drm/i915: Pin engine before pinning all objects, v4 Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 14/26] drm/i915: Rework intel_context pinning to do everything outside of pin_mutex Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 15/26] drm/i915: Make sure execbuffer always passes ww state to i915_vma_pin Maarten Lankhorst
2020-06-25 14:32   ` Thomas Hellström (Intel)
2020-06-23 14:28 ` [Intel-gfx] [PATCH 16/26] drm/i915: Convert i915_gem_object/client_blt.c to use ww locking as well, v2 Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 17/26] drm/i915: Kill last user of intel_context_create_request outside of selftests Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 18/26] drm/i915: Convert i915_perf to ww locking as well Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 19/26] drm/i915: Dirty hack to fix selftests locking inversion Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 20/26] drm/i915/selftests: Fix locking inversion in lrc selftest Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 21/26] drm/i915: Use ww pinning for intel_context_create_request() Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 22/26] drm/i915: Move i915_vma_lock in the selftests to avoid lock inversion, v2 Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 23/26] drm/i915: Add ww locking to vm_fault_gtt Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 24/26] drm/i915: Add ww locking to pin_to_display_plane Maarten Lankhorst
2020-06-23 14:28 ` [Intel-gfx] [PATCH 25/26] drm/i915: Ensure we hold the pin mutex Maarten Lankhorst
2020-06-24  1:52   ` kernel test robot
2020-06-23 14:28 ` [Intel-gfx] [PATCH 26/26] drm/i915: Kill context before taking ctx->mutex Maarten Lankhorst
2020-06-24 11:05   ` [Intel-gfx] [PATCH] " Maarten Lankhorst
2020-06-30 14:16     ` Tvrtko Ursulin
2020-07-02 13:26       ` Maarten Lankhorst
2020-07-02 14:51         ` Tvrtko Ursulin
2020-07-03 10:35           ` Maarten Lankhorst
2020-06-23 15:23 ` [Intel-gfx] [PATCH 01/26] Revert "drm/i915/gem: Async GPU relocations only" Chris Wilson
2020-06-24 11:19   ` Chris Wilson
2020-06-23 15:39 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [01/26] " Patchwork
2020-06-24 11:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/26] Revert "drm/i915/gem: Async GPU relocations only" (rev2) Patchwork
2020-06-24 11:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-06-24 12:48 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-07-01 13:10 ` [Intel-gfx] ✗ Fi.CI.IGT: " Patchwork

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