* [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
@ 2020-06-24 22:11 Manasi Navare
2020-06-24 22:11 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Manasi Navare @ 2020-06-24 22:11 UTC (permalink / raw)
To: intel-gfx
Modify the helper to add a fixed delay or poll with timeout
based on platform specification to check for either Idle bit
set (DDI_BUF_CTL is idle for disable case)
v2:
* Use 2 separate functions or idle and active (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 884b507c5f55..7d5c8ab88fc4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1184,16 +1184,15 @@ static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
enum port port)
{
- i915_reg_t reg = DDI_BUF_CTL(port);
- int i;
-
- for (i = 0; i < 16; i++) {
- udelay(1);
- if (intel_de_read(dev_priv, reg) & DDI_BUF_IS_IDLE)
- return;
+ if (IS_BROXTON(dev_priv)) {
+ udelay(16);
+ return;
}
- drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c idle bit\n",
- port_name(port));
+
+ if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
+ DDI_BUF_IS_IDLE), 600))
+ drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n",
+ port_name(port));
}
static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-24 22:11 [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
@ 2020-06-24 22:11 ` Manasi Navare
2020-06-25 21:28 ` Ville Syrjälä
2020-06-25 21:26 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Ville Syrjälä
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Manasi Navare @ 2020-06-24 22:11 UTC (permalink / raw)
To: intel-gfx
Based on the platform, Bspec expects us to wait or poll with
timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
after enabling DDI_BUF_CTL.
v3:
* Add a new function _active for DDI BUF CTL to be non idle (Ville)
v2:
* Based on platform, fixed delay or poll (Ville)
* Use a helper to do this (Imre, Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
port_name(port));
}
+static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
+ enum port port)
+{
+ if (INTEL_GEN(dev_priv) <= 9) {
+ usleep_range(600, 1000);
+ return;
+ }
+
+ if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
+ DDI_BUF_IS_IDLE), 600))
+ drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
+ port_name(port));
+}
+
static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
{
switch (pll->info->id) {
@@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
- udelay(600);
+ intel_wait_ddi_buf_active(dev_priv, port);
}
static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
--
2.19.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-06-24 22:11 [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
2020-06-24 22:11 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
@ 2020-06-25 21:26 ` Ville Syrjälä
2020-06-25 21:55 ` Manasi Navare
2020-06-26 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] " Patchwork
2020-06-26 11:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
3 siblings, 1 reply; 11+ messages in thread
From: Ville Syrjälä @ 2020-06-25 21:26 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Jun 24, 2020 at 03:11:07PM -0700, Manasi Navare wrote:
> Modify the helper to add a fixed delay or poll with timeout
> based on platform specification to check for either Idle bit
> set (DDI_BUF_CTL is idle for disable case)
>
> v2:
> * Use 2 separate functions or idle and active (Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++---------
> 1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 884b507c5f55..7d5c8ab88fc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1184,16 +1184,15 @@ static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
> static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> enum port port)
> {
> - i915_reg_t reg = DDI_BUF_CTL(port);
> - int i;
> -
> - for (i = 0; i < 16; i++) {
> - udelay(1);
> - if (intel_de_read(dev_priv, reg) & DDI_BUF_IS_IDLE)
> - return;
> + if (IS_BROXTON(dev_priv)) {
> + udelay(16);
> + return;
> }
> - drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c idle bit\n",
> - port_name(port));
> +
> + if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> + DDI_BUF_IS_IDLE), 600))
Why 600?
> + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n",
> + port_name(port));
> }
>
> static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> --
> 2.19.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-24 22:11 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
@ 2020-06-25 21:28 ` Ville Syrjälä
2020-06-25 21:59 ` Manasi Navare
2020-06-25 22:04 ` Manasi Navare
0 siblings, 2 replies; 11+ messages in thread
From: Ville Syrjälä @ 2020-06-25 21:28 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Jun 24, 2020 at 03:11:08PM -0700, Manasi Navare wrote:
> Based on the platform, Bspec expects us to wait or poll with
> timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> after enabling DDI_BUF_CTL.
>
> v3:
> * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> v2:
> * Based on platform, fixed delay or poll (Ville)
> * Use a helper to do this (Imre, Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> port_name(port));
> }
>
> +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> + enum port port)
> +{
> + if (INTEL_GEN(dev_priv) <= 9) {
Didn't we want the poll approach for glk+?
> + usleep_range(600, 1000);
> + return;
> + }
> +
> + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> + DDI_BUF_IS_IDLE), 600))
> + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> + port_name(port));
> +}
> +
> static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> {
> switch (pll->info->id) {
> @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
>
> - udelay(600);
> + intel_wait_ddi_buf_active(dev_priv, port);
Missed the FDI case.
Also we're still missing this for HDMI, on icl+ I think? Can't quite
remember if that was where the spec started to demand it.
> }
>
> static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> --
> 2.19.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-06-25 21:26 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Ville Syrjälä
@ 2020-06-25 21:55 ` Manasi Navare
0 siblings, 0 replies; 11+ messages in thread
From: Manasi Navare @ 2020-06-25 21:55 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Jun 26, 2020 at 12:26:22AM +0300, Ville Syrjälä wrote:
> On Wed, Jun 24, 2020 at 03:11:07PM -0700, Manasi Navare wrote:
> > Modify the helper to add a fixed delay or poll with timeout
> > based on platform specification to check for either Idle bit
> > set (DDI_BUF_CTL is idle for disable case)
> >
> > v2:
> > * Use 2 separate functions or idle and active (Ville)
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 17 ++++++++---------
> > 1 file changed, 8 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 884b507c5f55..7d5c8ab88fc4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1184,16 +1184,15 @@ static void intel_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder,
> > static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > enum port port)
> > {
> > - i915_reg_t reg = DDI_BUF_CTL(port);
> > - int i;
> > -
> > - for (i = 0; i < 16; i++) {
> > - udelay(1);
> > - if (intel_de_read(dev_priv, reg) & DDI_BUF_IS_IDLE)
> > - return;
> > + if (IS_BROXTON(dev_priv)) {
> > + udelay(16);
> > + return;
> > }
> > - drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c idle bit\n",
> > - port_name(port));
> > +
> > + if (wait_for_us((intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> > + DDI_BUF_IS_IDLE), 600))
>
> Why 600?
Yes thats a mistake, I will change it to 16usecs
Manasi
>
> > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get idle\n",
> > + port_name(port));
> > }
> >
> > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > --
> > 2.19.1
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-25 21:28 ` Ville Syrjälä
@ 2020-06-25 21:59 ` Manasi Navare
2020-06-25 22:04 ` Manasi Navare
1 sibling, 0 replies; 11+ messages in thread
From: Manasi Navare @ 2020-06-25 21:59 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Jun 26, 2020 at 12:28:53AM +0300, Ville Syrjälä wrote:
> On Wed, Jun 24, 2020 at 03:11:08PM -0700, Manasi Navare wrote:
> > Based on the platform, Bspec expects us to wait or poll with
> > timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> > after enabling DDI_BUF_CTL.
> >
> > v3:
> > * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> > v2:
> > * Based on platform, fixed delay or poll (Ville)
> > * Use a helper to do this (Imre, Ville)
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > port_name(port));
> > }
> >
> > +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (INTEL_GEN(dev_priv) <= 9) {
>
> Didn't we want the poll approach for glk+?
But other Gen9s like SKL is still a fixed delay so may be add a GEN <=9 & !GLK here would do?
Manasi
>
> > + usleep_range(600, 1000);
> > + return;
> > + }
> > +
> > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> > + DDI_BUF_IS_IDLE), 600))
> > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> > + port_name(port));
> > +}
> > +
> > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > {
> > switch (pll->info->id) {
> > @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
> >
> > - udelay(600);
> > + intel_wait_ddi_buf_active(dev_priv, port);
>
> Missed the FDI case.
>
> Also we're still missing this for HDMI, on icl+ I think? Can't quite
> remember if that was where the spec started to demand it.
>
> > }
> >
> > static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> > --
> > 2.19.1
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-25 21:28 ` Ville Syrjälä
2020-06-25 21:59 ` Manasi Navare
@ 2020-06-25 22:04 ` Manasi Navare
2020-06-25 22:16 ` Ville Syrjälä
1 sibling, 1 reply; 11+ messages in thread
From: Manasi Navare @ 2020-06-25 22:04 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Jun 26, 2020 at 12:28:53AM +0300, Ville Syrjälä wrote:
> On Wed, Jun 24, 2020 at 03:11:08PM -0700, Manasi Navare wrote:
> > Based on the platform, Bspec expects us to wait or poll with
> > timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> > after enabling DDI_BUF_CTL.
> >
> > v3:
> > * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> > v2:
> > * Based on platform, fixed delay or poll (Ville)
> > * Use a helper to do this (Imre, Ville)
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
> > 1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > port_name(port));
> > }
> >
> > +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> > + enum port port)
> > +{
> > + if (INTEL_GEN(dev_priv) <= 9) {
>
> Didn't we want the poll approach for glk+?
Actually in the bspec I only see Gen10+ has a 500usecs timeout
Manasi
>
> > + usleep_range(600, 1000);
> > + return;
> > + }
> > +
> > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> > + DDI_BUF_IS_IDLE), 600))
> > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> > + port_name(port));
> > +}
> > +
> > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > {
> > switch (pll->info->id) {
> > @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
> >
> > - udelay(600);
> > + intel_wait_ddi_buf_active(dev_priv, port);
>
> Missed the FDI case.
>
> Also we're still missing this for HDMI, on icl+ I think? Can't quite
> remember if that was where the spec started to demand it.
>
> > }
> >
> > static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> > --
> > 2.19.1
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-25 22:04 ` Manasi Navare
@ 2020-06-25 22:16 ` Ville Syrjälä
2020-06-25 22:27 ` Manasi Navare
0 siblings, 1 reply; 11+ messages in thread
From: Ville Syrjälä @ 2020-06-25 22:16 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Thu, Jun 25, 2020 at 03:04:33PM -0700, Manasi Navare wrote:
> On Fri, Jun 26, 2020 at 12:28:53AM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 24, 2020 at 03:11:08PM -0700, Manasi Navare wrote:
> > > Based on the platform, Bspec expects us to wait or poll with
> > > timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> > > after enabling DDI_BUF_CTL.
> > >
> > > v3:
> > > * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> > > v2:
> > > * Based on platform, fixed delay or poll (Ville)
> > > * Use a helper to do this (Imre, Ville)
> > >
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Cc: Imre Deak <imre.deak@intel.com>
> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
> > > 1 file changed, 15 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > > port_name(port));
> > > }
> > >
> > > +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> > > + enum port port)
> > > +{
> > > + if (INTEL_GEN(dev_priv) <= 9) {
> >
> > Didn't we want the poll approach for glk+?
>
> Actually in the bspec I only see Gen10+ has a 500usecs timeout
glk has (mostly) gen10 display.
Defacto standard form to write that test is
'GEN < 10 && !IS_GLK'.
>
> Manasi
> >
> > > + usleep_range(600, 1000);
> > > + return;
> > > + }
> > > +
> > > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> > > + DDI_BUF_IS_IDLE), 600))
> > > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> > > + port_name(port));
> > > +}
> > > +
> > > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > > {
> > > switch (pll->info->id) {
> > > @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> > > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> > > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
> > >
> > > - udelay(600);
> > > + intel_wait_ddi_buf_active(dev_priv, port);
> >
> > Missed the FDI case.
> >
> > Also we're still missing this for HDMI, on icl+ I think? Can't quite
> > remember if that was where the spec started to demand it.
> >
> > > }
> > >
> > > static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> > > --
> > > 2.19.1
> >
> > --
> > Ville Syrjälä
> > Intel
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active
2020-06-25 22:16 ` Ville Syrjälä
@ 2020-06-25 22:27 ` Manasi Navare
0 siblings, 0 replies; 11+ messages in thread
From: Manasi Navare @ 2020-06-25 22:27 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Fri, Jun 26, 2020 at 01:16:42AM +0300, Ville Syrjälä wrote:
> On Thu, Jun 25, 2020 at 03:04:33PM -0700, Manasi Navare wrote:
> > On Fri, Jun 26, 2020 at 12:28:53AM +0300, Ville Syrjälä wrote:
> > > On Wed, Jun 24, 2020 at 03:11:08PM -0700, Manasi Navare wrote:
> > > > Based on the platform, Bspec expects us to wait or poll with
> > > > timeout for DDI BUF IDLE bit to be set to 0 (non idle) or get active
> > > > after enabling DDI_BUF_CTL.
> > > >
> > > > v3:
> > > > * Add a new function _active for DDI BUF CTL to be non idle (Ville)
> > > > v2:
> > > > * Based on platform, fixed delay or poll (Ville)
> > > > * Use a helper to do this (Imre, Ville)
> > > >
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Cc: Imre Deak <imre.deak@intel.com>
> > > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_ddi.c | 16 +++++++++++++++-
> > > > 1 file changed, 15 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > index 7d5c8ab88fc4..ff6b1e9d1b4e 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > @@ -1195,6 +1195,20 @@ static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > > > port_name(port));
> > > > }
> > > >
> > > > +static void intel_wait_ddi_buf_active(struct drm_i915_private *dev_priv,
> > > > + enum port port)
> > > > +{
> > > > + if (INTEL_GEN(dev_priv) <= 9) {
> > >
> > > Didn't we want the poll approach for glk+?
> >
> > Actually in the bspec I only see Gen10+ has a 500usecs timeout
>
> glk has (mostly) gen10 display.
>
> Defacto standard form to write that test is
> 'GEN < 10 && !IS_GLK'.
Okay will update this and send in the next rev
Manasi
>
> >
> > Manasi
> > >
> > > > + usleep_range(600, 1000);
> > > > + return;
> > > > + }
> > > > +
> > > > + if (wait_for_us(!(intel_de_read(dev_priv, DDI_BUF_CTL(port)) &
> > > > + DDI_BUF_IS_IDLE), 600))
> > > > + drm_err(&dev_priv->drm, "Timeout waiting for DDI BUF %c to get active\n",
> > > > + port_name(port));
> > > > +}
> > > > +
> > > > static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > > > {
> > > > switch (pll->info->id) {
> > > > @@ -4020,7 +4034,7 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> > > > intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
> > > > intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
> > > >
> > > > - udelay(600);
> > > > + intel_wait_ddi_buf_active(dev_priv, port);
> > >
> > > Missed the FDI case.
> > >
> > > Also we're still missing this for HDMI, on icl+ I think? Can't quite
> > > remember if that was where the spec started to demand it.
> > >
> > > > }
> > > >
> > > > static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> > > > --
> > > > 2.19.1
> > >
> > > --
> > > Ville Syrjälä
> > > Intel
>
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-06-24 22:11 [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
2020-06-24 22:11 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
2020-06-25 21:26 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Ville Syrjälä
@ 2020-06-26 11:07 ` Patchwork
2020-06-26 11:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2020-06-26 11:07 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
URL : https://patchwork.freedesktop.org/series/78800/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
1156c88678a4 drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
-:36: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst
#36: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:1188:
+ udelay(16);
total: 0 errors, 0 warnings, 1 checks, 24 lines checked
9488e350bd12 drm/i915/dp: Helper to check for DDI BUF status to get active
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
2020-06-24 22:11 [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
` (2 preceding siblings ...)
2020-06-26 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] " Patchwork
@ 2020-06-26 11:29 ` Patchwork
3 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2020-06-26 11:29 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v3,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
URL : https://patchwork.freedesktop.org/series/78800/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8665 -> Patchwork_18021
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/index.html
Known issues
------------
Here are the changes found in Patchwork_18021 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- fi-tgl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
#### Possible fixes ####
* igt@i915_module_load@reload:
- fi-byt-j1900: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-byt-j1900/igt@i915_module_load@reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-byt-j1900/igt@i915_module_load@reload.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- {fi-kbl-7560u}: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-kbl-7560u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
#### Warnings ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][12] ([i915#62] / [i915#92]) +4 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) -> [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8665/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/fi-kbl-x1275/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (44 -> 39)
------------------------------
Additional (1): fi-tgl-y
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_8665 -> Patchwork_18021
CI-20190529: 20190529
CI_DRM_8665: 2cb786fa6506e20b5cb2a10decda11454111e026 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5717: 725bf2dae51f0087eaa64f1931a2ef9d22f070dd @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18021: 9488e350bd12e459062f7f9c469ae5229d8ea270 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9488e350bd12 drm/i915/dp: Helper to check for DDI BUF status to get active
1156c88678a4 drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18021/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2020-06-26 11:29 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-24 22:11 [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Manasi Navare
2020-06-24 22:11 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dp: Helper to check for DDI BUF status to get active Manasi Navare
2020-06-25 21:28 ` Ville Syrjälä
2020-06-25 21:59 ` Manasi Navare
2020-06-25 22:04 ` Manasi Navare
2020-06-25 22:16 ` Ville Syrjälä
2020-06-25 22:27 ` Manasi Navare
2020-06-25 21:26 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status Ville Syrjälä
2020-06-25 21:55 ` Manasi Navare
2020-06-26 11:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] " Patchwork
2020-06-26 11:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
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