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From: Pawel Laszczak <pawell@cadence.com>
To: <gregkh@linuxfoundation.org>, <robh+dt@kernel.org>,
	<linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<balbi@kernel.org>, <devicetree@vger.kernel.org>
Cc: <dan.carpenter@oracle.com>, <ben.dooks@codethink.co.uk>,
	<colin.king@canonical.com>, <rogerq@ti.com>, <peter.chen@nxp.com>,
	<weiyongjun1@huawei.com>, <jpawar@cadence.com>,
	<kurahul@cadene.com>, <sparmar@cadence.com>,
	Pawel Laszczak <pawell@cadence.com>
Subject: [PATCH RFC 1/5] dt-bindings: add binding for CDNSP-DRD controller
Date: Fri, 26 Jun 2020 06:54:46 +0200	[thread overview]
Message-ID: <20200626045450.10205-2-pawell@cadence.com> (raw)
In-Reply-To: <20200626045450.10205-1-pawell@cadence.com>

This patch aim at documenting USB related dt-bindings for the
Cadence CDNSP-DRD controller.

Signed-off-by: Pawel Laszczak <pawell@cadence.com>
---
 .../devicetree/bindings/usb/cdns-cdnsp.yaml   | 104 ++++++++++++++++++
 1 file changed, 104 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/cdns-cdnsp.yaml

diff --git a/Documentation/devicetree/bindings/usb/cdns-cdnsp.yaml b/Documentation/devicetree/bindings/usb/cdns-cdnsp.yaml
new file mode 100644
index 000000000000..83d353711e31
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/cdns-cdnsp.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/usb/cdns-cdnsp.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title:  Device tree binding for Cadence CDNSP (Super Speed Plus) controller
+
+maintainers:
+  - Pawel Laszczak <pawell@cadence.com>
+
+description:
+  The Cadence CDNSP controller support Host, Device and DRD mode.
+  It also supports Full Speed, Hight Speed, Super Speed and
+  Super Speed Plus protocols.
+
+properties:
+  compatible:
+    items:
+      - enum:
+        - cdns,usbssp
+
+  reg:
+    description: Physical base address and size of the
+                 controller's register areas. Controller has
+                 three  different regions.
+    minItems: 2
+    maxItems: 3
+    items:
+      - description: HOST registers area.
+      - description: DEVICE registers area.
+      - description: OTG/DRD registers area.
+
+  reg-names:
+    items:
+      - const: xhci
+      - const: dev
+      - const: otg
+
+  interrupts:
+    minItems: 2
+    maxItems: 3
+    items:
+      - description: Interrupt used by XHCI driver.
+      - description: Interrupt used by device driver.
+      - description: Interrupt used by DRD part of driver.
+
+  interrupt-names:
+    items:
+      - const: host
+      - const: peripheral
+      - const: otg
+
+  maximum-speed:
+    enum:
+      - full-speed
+      - high-speed
+      - super-speed
+      - super-speed-plus
+
+  dr_mode:
+    enum:
+      - host
+      - peripheral
+      - otg
+
+  phys:
+    description:
+      Reference to the USB PHY.
+      Must contain an entry for each entry in phy-names.
+      See ../phy/phy-bindings.txt for details.
+
+  phy-names:
+    items:
+      - const: cdnsp,usb2-phy
+      - const: cdnsp,usb3-phy
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - interrupt-names
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    usb_otg: usb@f3000000 {
+      compatible = "cdns,usbssp";
+      reg = <0x00 0x01c13000 0x00 0x0400>,
+            <0x00 0xf3010000 0x00 0x10000>,
+            <0x00 0xf3020000 0x00 0x10000>;
+      reg-names = "xhci", "dev", "otg";
+      interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                   <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+                   <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+      interrupt-names = "host", "peripheral", "otg";
+      phys = <&usbphy 0>;
+      phy-names = "cdnsp,usb2-phy", "cdnsp,usb3-phy";
+      dr_mode = "peripheral";
+    };
+
+...
-- 
2.17.1


  reply	other threads:[~2020-06-26  4:58 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-26  4:54 [PATCH RFC 0/5] Introduced new Cadence USBSSP DRD Driver Pawel Laszczak
2020-06-26  4:54 ` Pawel Laszczak [this message]
2020-06-29 22:03   ` [PATCH RFC 1/5] dt-bindings: add binding for CDNSP-DRD controller Rob Herring
2020-06-30  8:19     ` Pawel Laszczak
2020-06-26  4:54 ` [PATCH RFC 2/5] usb:cdns3: Add pci to platform driver wrapper Pawel Laszczak
2020-06-26 11:40   ` Dan Carpenter
2020-06-26 15:10     ` Pawel Laszczak
2020-06-26 17:24       ` Dan Carpenter
2020-06-29  6:51         ` Pawel Laszczak
2020-06-26 13:43   ` Greg KH
2020-06-29 11:35     ` Pawel Laszczak
2020-06-29 11:43       ` Greg KH
2020-06-26  4:54 ` [PATCH RFC 3/5] usb: cdnsp: Device side header file for CDNSP driver Pawel Laszczak
2020-06-26  4:54 ` [PATCH RFC 4/5] usb: cdnsp: usb:cdns3 Add main part of Cadence USBSSP DRD Driver Pawel Laszczak
2020-06-26  9:04   ` kernel test robot
2020-06-29 10:16   ` Dan Carpenter
2020-07-02  3:48     ` Pawel Laszczak
2020-06-26  4:54 ` [PATCH RFC 5/5] usb: cdnsp: Add tracepoints for CDNSP driver Pawel Laszczak
2020-06-26  6:52 ` [PATCH RFC 0/5] Introduced new Cadence USBSSP DRD Driver Felipe Balbi
2020-06-26  7:19   ` Pawel Laszczak
2020-06-29  3:41     ` Peter Chen
2020-06-29  4:31       ` gregkh
2020-06-29 11:20         ` Pawel Laszczak
2020-06-29 11:43           ` gregkh
2020-09-22 13:06         ` Pawel Laszczak
2020-09-23  2:56           ` Peter Chen
2020-09-23  3:37             ` Pawel Laszczak

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