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Fri, 26 Jun 2020 09:00:52 +0000 (UTC) Date: Fri, 26 Jun 2020 11:00:50 +0200 From: Andrew Jones To: Beata Michalska Subject: Re: [PATCH v6 1/2] target/arm: kvm: Handle DABT with no valid ISS Message-ID: <20200626090050.3sqsukopwydv43od@kamzik.brq.redhat.com> References: <20200625220336.10186-1-beata.michalska@linaro.org> <20200625220336.10186-2-beata.michalska@linaro.org> MIME-Version: 1.0 In-Reply-To: <20200625220336.10186-2-beata.michalska@linaro.org> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=205.139.110.120; envelope-from=drjones@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/26 01:55:55 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, Christoffer.Dall@arm.com, qemu-arm@nongnu.org, pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Jun 25, 2020 at 11:03:35PM +0100, Beata Michalska wrote: > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort > exception with no valid ISS info to be decoded. The lack of decode info > makes it at least tricky to emulate those instruction which is one of the > (many) reasons why KVM will not even try to do so. > > Add support for handling those by requesting KVM to inject external > dabt into the quest. > > Signed-off-by: Beata Michalska > --- > target/arm/kvm.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 58 insertions(+), 1 deletion(-) > > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > index eef3bbd..265c4b8 100644 > --- a/target/arm/kvm.c > +++ b/target/arm/kvm.c > @@ -39,6 +39,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { > > static bool cap_has_mp_state; > static bool cap_has_inject_serror_esr; > +static bool cap_has_inject_ext_dabt; > > static ARMHostCPUFeatures arm_host_cpu_features; > > @@ -245,6 +246,16 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > ret = -EINVAL; > } > > + if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) { > + if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) { > + error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap"); > + } else { > + /* Set status for supporting the external dabt injection */ > + cap_has_inject_ext_dabt = kvm_check_extension(s, > + KVM_CAP_ARM_INJECT_EXT_DABT); > + } > + } > + > return ret; > } > > @@ -810,6 +821,47 @@ void kvm_arm_vm_state_change(void *opaque, int running, RunState state) > } > } > > +/** > + * kvm_arm_handle_dabt_nisv: > + * @cs: CPUState > + * @esr_iss: ISS encoding (limited) for the exception from Data Abort > + * ISV bit set to '0b0' -> no valid instruction syndrome > + * @fault_ipa: faulting address for the synchronous data abort > + * > + * Returns: 0 if the exception has been handled, < 0 otherwise > + */ > +static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss, > + uint64_t fault_ipa) > +{ > + /* > + * Request KVM to inject the external data abort into the guest > + */ > + if (cap_has_inject_ext_dabt) { > + struct kvm_vcpu_events events; > + /* > + * KVM_CAP_ARM_INJECT_EXT_DABT support implies one for > + * KVM_CAP_VCPU_EVENTS KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS And this comment should probably come just before the KVM_SET_VCPU_EVENTS ioctl. > + */ > + memset(&events, 0, sizeof(events)); nit: How about using '= {0}' when declaring the variable, rather than this memset? > + /* > + * Skipping all the overhead of syncing vcpu regs back and forth > + * and messing around with the vcpu_dirty flag to avoid > + * overwriting changes done by KVM : directly calling > + * the associated ioctl with the status set for external data abort, > + * which, in turn, will be directly delivered to the affected vcpu. The external data abort event will be handled immediately by KVM and does not need any other CPU state. This means we can skip CPU synchronization and set this event, but only this event, here. > + */ > + events.exception.ext_dabt_pending = 1; > + > + return kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events); > + } else { > + error_report("Data abort exception triggered by guest memory access " > + "at physical address: 0x" TARGET_FMT_lx, > + (target_ulong)fault_ipa); > + error_printf("KVM unable to emulate faulting instruction.\n"); > + } > + return -1; > +} > + > int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) > { > int ret = 0; > @@ -820,7 +872,12 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) > ret = EXCP_DEBUG; > } /* otherwise return to guest */ > break; > - default: > + case KVM_EXIT_ARM_NISV: > + /* External DABT with no valid iss to decode */ > + ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss, > + run->arm_nisv.fault_ipa); > + break; > + default: > qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", > __func__, run->exit_reason); > break; > -- > 2.7.4 > > Besides the suggested comment changes and the memset nit Reviewed-by: Andrew Jones Thanks, drew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40E83C433E0 for ; Fri, 26 Jun 2020 09:01:05 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id B60E120DD4 for ; Fri, 26 Jun 2020 09:01:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="IHaVjKEx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B60E120DD4 Authentication-Results: mail.kernel.org; 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Fri, 26 Jun 2020 09:00:55 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.40.194.20]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F2DE05BAE0; Fri, 26 Jun 2020 09:00:52 +0000 (UTC) Date: Fri, 26 Jun 2020 11:00:50 +0200 From: Andrew Jones To: Beata Michalska Subject: Re: [PATCH v6 1/2] target/arm: kvm: Handle DABT with no valid ISS Message-ID: <20200626090050.3sqsukopwydv43od@kamzik.brq.redhat.com> References: <20200625220336.10186-1-beata.michalska@linaro.org> <20200625220336.10186-2-beata.michalska@linaro.org> MIME-Version: 1.0 In-Reply-To: <20200625220336.10186-2-beata.michalska@linaro.org> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=drjones@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, pbonzini@redhat.com, kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thu, Jun 25, 2020 at 11:03:35PM +0100, Beata Michalska wrote: > On ARMv7 & ARMv8 some load/store instructions might trigger a data abort > exception with no valid ISS info to be decoded. The lack of decode info > makes it at least tricky to emulate those instruction which is one of the > (many) reasons why KVM will not even try to do so. > > Add support for handling those by requesting KVM to inject external > dabt into the quest. > > Signed-off-by: Beata Michalska > --- > target/arm/kvm.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 58 insertions(+), 1 deletion(-) > > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > index eef3bbd..265c4b8 100644 > --- a/target/arm/kvm.c > +++ b/target/arm/kvm.c > @@ -39,6 +39,7 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { > > static bool cap_has_mp_state; > static bool cap_has_inject_serror_esr; > +static bool cap_has_inject_ext_dabt; > > static ARMHostCPUFeatures arm_host_cpu_features; > > @@ -245,6 +246,16 @@ int kvm_arch_init(MachineState *ms, KVMState *s) > ret = -EINVAL; > } > > + if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) { > + if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) { > + error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap"); > + } else { > + /* Set status for supporting the external dabt injection */ > + cap_has_inject_ext_dabt = kvm_check_extension(s, > + KVM_CAP_ARM_INJECT_EXT_DABT); > + } > + } > + > return ret; > } > > @@ -810,6 +821,47 @@ void kvm_arm_vm_state_change(void *opaque, int running, RunState state) > } > } > > +/** > + * kvm_arm_handle_dabt_nisv: > + * @cs: CPUState > + * @esr_iss: ISS encoding (limited) for the exception from Data Abort > + * ISV bit set to '0b0' -> no valid instruction syndrome > + * @fault_ipa: faulting address for the synchronous data abort > + * > + * Returns: 0 if the exception has been handled, < 0 otherwise > + */ > +static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss, > + uint64_t fault_ipa) > +{ > + /* > + * Request KVM to inject the external data abort into the guest > + */ > + if (cap_has_inject_ext_dabt) { > + struct kvm_vcpu_events events; > + /* > + * KVM_CAP_ARM_INJECT_EXT_DABT support implies one for > + * KVM_CAP_VCPU_EVENTS KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS And this comment should probably come just before the KVM_SET_VCPU_EVENTS ioctl. > + */ > + memset(&events, 0, sizeof(events)); nit: How about using '= {0}' when declaring the variable, rather than this memset? > + /* > + * Skipping all the overhead of syncing vcpu regs back and forth > + * and messing around with the vcpu_dirty flag to avoid > + * overwriting changes done by KVM : directly calling > + * the associated ioctl with the status set for external data abort, > + * which, in turn, will be directly delivered to the affected vcpu. The external data abort event will be handled immediately by KVM and does not need any other CPU state. This means we can skip CPU synchronization and set this event, but only this event, here. > + */ > + events.exception.ext_dabt_pending = 1; > + > + return kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events); > + } else { > + error_report("Data abort exception triggered by guest memory access " > + "at physical address: 0x" TARGET_FMT_lx, > + (target_ulong)fault_ipa); > + error_printf("KVM unable to emulate faulting instruction.\n"); > + } > + return -1; > +} > + > int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) > { > int ret = 0; > @@ -820,7 +872,12 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) > ret = EXCP_DEBUG; > } /* otherwise return to guest */ > break; > - default: > + case KVM_EXIT_ARM_NISV: > + /* External DABT with no valid iss to decode */ > + ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss, > + run->arm_nisv.fault_ipa); > + break; > + default: > qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", > __func__, run->exit_reason); > break; > -- > 2.7.4 > > Besides the suggested comment changes and the memset nit Reviewed-by: Andrew Jones Thanks, drew _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm