From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v1] drm/i915: Clamp min_cdclk to max_cdclk_freq to unblock 8K
Date: Tue, 30 Jun 2020 14:26:09 +0300 [thread overview]
Message-ID: <20200630112609.9998-1-stanislav.lisovskiy@intel.com> (raw)
We still need "Bump up CDCLK" workaround otherwise getting
underruns - however currently it blocks 8K as CDCLK = Pixel rate,
in 8K case would require CDCLK to be around 1 Ghz which is not
possible.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 45f7f33d1144..01a5bc6b08c4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2080,9 +2080,21 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state)
* Explicitly stating here that this seems to be currently
* rather a Hack, than final solution.
*/
- if (IS_TIGERLAKE(dev_priv))
+ if (IS_TIGERLAKE(dev_priv)) {
min_cdclk = max(min_cdclk, (int)crtc_state->pixel_rate);
+ /*
+ * Clamp to max_cdclk_freq in order not to break an 8K,
+ * but still leave W/A at place.
+ */
+ min_cdclk = min(min_cdclk, (int)dev_priv->max_cdclk_freq);
+
+ /*
+ * max_cdclk_freq check obviously not needed - just return.
+ */
+ return min_cdclk;
+ }
+
if (min_cdclk > dev_priv->max_cdclk_freq) {
drm_dbg_kms(&dev_priv->drm,
"required cdclk (%d kHz) exceeds max (%d kHz)\n",
--
2.24.1.485.gad05a3d8e5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2020-06-30 11:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-30 11:26 Stanislav Lisovskiy [this message]
2020-06-30 15:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clamp min_cdclk to max_cdclk_freq to unblock 8K Patchwork
2020-06-30 16:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-30 16:29 ` [Intel-gfx] [PATCH v1] " Ville Syrjälä
2020-06-30 20:27 ` Manasi Navare
2020-07-01 5:57 ` Lisovskiy, Stanislav
2020-06-30 21:17 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
2020-07-01 12:20 ` [Intel-gfx] [PATCH v1] " Maarten Lankhorst
2020-07-01 18:44 ` Manasi Navare
2020-07-01 19:13 ` Lisovskiy, Stanislav
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200630112609.9998-1-stanislav.lisovskiy@intel.com \
--to=stanislav.lisovskiy@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.