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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 20/23] drm/i915/gem: Include secure batch in common execbuf pinning
Date: Thu,  2 Jul 2020 09:32:22 +0100	[thread overview]
Message-ID: <20200702083225.20044-20-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200702083225.20044-1-chris@chris-wilson.co.uk>

Pull the GGTT binding for the secure batch dispatch into the common vma
pinning routine for execbuf, so that there is just a single central
place for all i915_vma_pin().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 88 +++++++++++--------
 1 file changed, 51 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index e19c0cbe1b7d..320840f9c629 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1648,6 +1648,48 @@ static int eb_alloc_cmdparser(struct i915_execbuffer *eb)
 	return err;
 }
 
+static int eb_secure_batch(struct i915_execbuffer *eb)
+{
+	struct i915_vma *vma = eb->batch->vma;
+
+	/*
+	 * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
+	 * batch" bit. Hence we need to pin secure batches into the global gtt.
+	 * hsw should have this fixed, but bdw mucks it up again.
+	 */
+	if (!(eb->batch_flags & I915_DISPATCH_SECURE))
+		return 0;
+
+	if (GEM_WARN_ON(vma->vm != &eb->engine->gt->ggtt->vm)) {
+		struct eb_vma *ev;
+
+		ev = kzalloc(sizeof(*ev), GFP_KERNEL);
+		if (!ev)
+			return -ENOMEM;
+
+		vma = i915_vma_instance(vma->obj,
+					&eb->engine->gt->ggtt->vm,
+					NULL);
+		if (IS_ERR(vma)) {
+			kfree(ev);
+			return PTR_ERR(vma);
+		}
+
+		ev->vma = i915_vma_get(vma);
+		ev->exec = &no_entry;
+
+		list_add(&ev->submit_link, &eb->submit_list);
+		list_add(&ev->reloc_link, &eb->array->aux_list);
+		list_add(&ev->bind_link, &eb->bind_list);
+
+		GEM_BUG_ON(eb->batch->vma->private);
+		eb->batch = ev;
+	}
+
+	eb->batch->flags |= EXEC_OBJECT_NEEDS_GTT;
+	return 0;
+}
+
 static unsigned int eb_batch_index(const struct i915_execbuffer *eb)
 {
 	if (eb->args->flags & I915_EXEC_BATCH_FIRST)
@@ -2435,6 +2477,10 @@ static int eb_relocate(struct i915_execbuffer *eb)
 	if (err)
 		return err;
 
+	err = eb_secure_batch(eb);
+	if (err)
+		return err;
+
 	err = eb_reserve_vm(eb);
 	if (err)
 		return err;
@@ -2761,7 +2807,7 @@ add_to_client(struct i915_request *rq, struct drm_file *file)
 	spin_unlock(&file_priv->mm.lock);
 }
 
-static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch)
+static int eb_submit(struct i915_execbuffer *eb)
 {
 	int err;
 
@@ -2788,7 +2834,7 @@ static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch)
 	}
 
 	err = eb->engine->emit_bb_start(eb->request,
-					batch->node.start +
+					eb->batch->vma->node.start +
 					eb->batch_start_offset,
 					eb->batch_len,
 					eb->batch_flags);
@@ -3261,7 +3307,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	struct i915_execbuffer eb;
 	struct dma_fence *in_fence = NULL;
 	struct sync_file *out_fence = NULL;
-	struct i915_vma *batch;
 	int out_fence_fd = -1;
 	int err;
 
@@ -3353,34 +3398,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	if (err)
 		goto err_vma;
 
-	/*
-	 * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
-	 * batch" bit. Hence we need to pin secure batches into the global gtt.
-	 * hsw should have this fixed, but bdw mucks it up again. */
-	batch = i915_vma_get(eb.batch->vma);
-	if (eb.batch_flags & I915_DISPATCH_SECURE) {
-		struct i915_vma *vma;
-
-		/*
-		 * So on first glance it looks freaky that we pin the batch here
-		 * outside of the reservation loop. But:
-		 * - The batch is already pinned into the relevant ppgtt, so we
-		 *   already have the backing storage fully allocated.
-		 * - No other BO uses the global gtt (well contexts, but meh),
-		 *   so we don't really have issues with multiple objects not
-		 *   fitting due to fragmentation.
-		 * So this is actually safe.
-		 */
-		vma = i915_gem_object_ggtt_pin(batch->obj, NULL, 0, 0, 0);
-		if (IS_ERR(vma)) {
-			err = PTR_ERR(vma);
-			goto err_vma;
-		}
-
-		GEM_BUG_ON(vma->obj != batch->obj);
-		batch = vma;
-	}
-
 	/* All GPU relocation batches must be submitted prior to the user rq */
 	GEM_BUG_ON(eb.reloc_cache.rq);
 
@@ -3388,7 +3405,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	eb.request = __i915_request_create(eb.context, GFP_KERNEL);
 	if (IS_ERR(eb.request)) {
 		err = PTR_ERR(eb.request);
-		goto err_batch_unpin;
+		goto err_vma;
 	}
 	eb.request->cookie = lockdep_pin_lock(&eb.context->timeline->mutex);
 
@@ -3425,13 +3442,13 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	 * inactive_list and lose its active reference. Hence we do not need
 	 * to explicitly hold another reference here.
 	 */
-	eb.request->batch = batch;
+	eb.request->batch = eb.batch->vma;
 	if (eb.parser.shadow)
 		intel_gt_buffer_pool_mark_active(eb.parser.shadow->vma->private,
 						 eb.request);
 
 	trace_i915_request_queue(eb.request, eb.batch_flags);
-	err = eb_submit(&eb, batch);
+	err = eb_submit(&eb);
 err_request:
 	add_to_client(eb.request, file);
 	i915_request_get(eb.request);
@@ -3452,9 +3469,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	}
 	i915_request_put(eb.request);
 
-err_batch_unpin:
-	if (eb.batch_flags & I915_DISPATCH_SECURE)
-		i915_vma_unpin(batch);
 err_vma:
 	if (eb.parser.shadow)
 		intel_gt_buffer_pool_put(eb.parser.shadow->vma->private);
-- 
2.20.1

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  parent reply	other threads:[~2020-07-02  8:32 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-02  8:32 [PATCH 01/23] drm/i915: Drop vm.ref for duplicate vma on construction Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] " Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 02/23] drm/i915/gem: Split the context's obj:vma lut into its own mutex Chris Wilson
2020-07-02 22:09   ` Andi Shyti
2020-07-02 22:14     ` Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 03/23] drm/i915/gem: Drop forced struct_mutex from shrinker_taints_mutex Chris Wilson
2020-07-02 22:24   ` Andi Shyti
2020-07-02  8:32 ` [Intel-gfx] [PATCH 04/23] drm/i915/gem: Only revoke mmap handlers if active Chris Wilson
2020-07-02 12:35   ` Tvrtko Ursulin
2020-07-02 12:47     ` Chris Wilson
2020-07-02 12:54       ` Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 05/23] drm/i915: Export ppgtt_bind_vma Chris Wilson
2020-07-03 10:09   ` Andi Shyti
2020-07-02  8:32 ` [Intel-gfx] [PATCH 06/23] drm/i915: Preallocate stashes for vma page-directories Chris Wilson
2020-07-03 16:47   ` Tvrtko Ursulin
2020-07-02  8:32 ` [Intel-gfx] [PATCH 07/23] drm/i915: Switch to object allocations for page directories Chris Wilson
2020-07-03  8:44   ` Tvrtko Ursulin
2020-07-03  9:00     ` Chris Wilson
2020-07-03  9:24       ` Tvrtko Ursulin
2020-07-03  9:49         ` Chris Wilson
2020-07-03 16:34           ` Tvrtko Ursulin
2020-07-03 16:36   ` Tvrtko Ursulin
2020-07-02  8:32 ` [Intel-gfx] [PATCH 08/23] drm/i915/gem: Don't drop the timeline lock during execbuf Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 09/23] drm/i915/gem: Rename execbuf.bind_link to unbound_link Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 10/23] drm/i915/gem: Break apart the early i915_vma_pin from execbuf object lookup Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 11/23] drm/i915/gem: Remove the call for no-evict i915_vma_pin Chris Wilson
2020-07-03  8:59   ` Tvrtko Ursulin
2020-07-03  9:23     ` Chris Wilson
2020-07-06 14:43       ` Tvrtko Ursulin
2020-07-02  8:32 ` [Intel-gfx] [PATCH 12/23] drm/i915: Add list_for_each_entry_safe_continue_reverse Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 13/23] drm/i915: Always defer fenced work to the worker Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 14/23] drm/i915/gem: Assign context id for async work Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 15/23] drm/i915: Export a preallocate variant of i915_active_acquire() Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 16/23] drm/i915/gem: Separate the ww_mutex walker into its own list Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 17/23] drm/i915/gem: Asynchronous GTT unbinding Chris Wilson
2020-07-05 22:01   ` Andi Shyti
2020-07-05 22:07     ` Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 18/23] drm/i915/gem: Bind the fence async for execbuf Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 19/23] drm/i915/gem: Include cmdparser in common execbuf pinning Chris Wilson
2020-07-02  8:32 ` Chris Wilson [this message]
2020-07-02  8:32 ` [Intel-gfx] [PATCH 21/23] drm/i915/gem: Reintroduce multiple passes for reloc processing Chris Wilson
2020-07-02  8:32 ` [Intel-gfx] [PATCH 22/23] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2 Chris Wilson
2020-07-02 22:32   ` kernel test robot
2020-07-02  8:32 ` [Intel-gfx] [PATCH 23/23] drm/i915/gem: Pull execbuf dma resv under a single critical section Chris Wilson
2020-07-02  9:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/23] drm/i915: Drop vm.ref for duplicate vma on construction Patchwork
2020-07-02  9:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-07-02  9:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-02 12:27 ` [Intel-gfx] [PATCH 01/23] " Tvrtko Ursulin
2020-07-02 12:27   ` Tvrtko Ursulin
2020-07-02 13:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/23] " Patchwork
2020-07-02 20:25 ` [Intel-gfx] [PATCH 01/23] " Andi Shyti
2020-07-02 20:25   ` Andi Shyti
2020-07-02 20:38   ` Chris Wilson
2020-07-02 20:38     ` Chris Wilson
2020-07-02 20:56     ` Andi Shyti
2020-07-02 20:56       ` Andi Shyti

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