From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D94FC433DF for ; Thu, 2 Jul 2020 18:00:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AA3C20870 for ; Thu, 2 Jul 2020 18:00:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1593712846; bh=Hak91qzk3x/aeXBK1n/XMiTpR5KSRvENrzPRsP83yxM=; h=Date:From:To:Cc:Subject:Reply-To:References:In-Reply-To:List-ID: From; b=WZoNC4wGkx9p7gqLIYA2O+uAfvyoKaj/de2ID9i5+77U9hbE+2u6slts4cI5EMLFw gOJ6FO50f+aZVhcIAcdlJuMHXo32LkTaICWDV08Ludu+/TOa+u3Xo9p8St7qEifigH cKynVtsIcu5unGGwFiokZchvR3npmzyY77M85NnQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728048AbgGBSAo (ORCPT ); Thu, 2 Jul 2020 14:00:44 -0400 Received: from mail.kernel.org ([198.145.29.99]:52846 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727927AbgGBSAn (ORCPT ); Thu, 2 Jul 2020 14:00:43 -0400 Received: from paulmck-ThinkPad-P72.home (50-39-105-78.bvtn.or.frontiernet.net [50.39.105.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 832662073E; Thu, 2 Jul 2020 18:00:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1593712842; bh=Hak91qzk3x/aeXBK1n/XMiTpR5KSRvENrzPRsP83yxM=; h=Date:From:To:Cc:Subject:Reply-To:References:In-Reply-To:From; b=QWmK8WMRCdHSwyVK000d5y6dbgLM+MjgvdkwYsTsrjr5LZBrjrxYWW1nMi6rZxccV IiaPyrs2F2bjvlZIb4WjffkjC0aKcE/DRPRkmEy2Vz5+fS5gilxXEQzxwjlFv3ETvE BcELqK8pbmTnqz6ggKuzaDwzCOlpTPOwyp2kT1xI= Received: by paulmck-ThinkPad-P72.home (Postfix, from userid 1000) id 6CE89352334B; Thu, 2 Jul 2020 11:00:42 -0700 (PDT) Date: Thu, 2 Jul 2020 11:00:42 -0700 From: "Paul E. McKenney" To: David Laight Cc: 'Peter Zijlstra' , Marco Elver , Nick Desaulniers , Sami Tolvanen , Masahiro Yamada , Will Deacon , Greg Kroah-Hartman , Kees Cook , clang-built-linux , Kernel Hardening , linux-arch , Linux ARM , Linux Kbuild mailing list , LKML , "linux-pci@vger.kernel.org" , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" Subject: Re: [PATCH 00/22] add support for Clang LTO Message-ID: <20200702180042.GW9247@paulmck-ThinkPad-P72> Reply-To: paulmck@kernel.org References: <20200625080313.GY4817@hirez.programming.kicks-ass.net> <20200625082433.GC117543@hirez.programming.kicks-ass.net> <20200625085745.GD117543@hirez.programming.kicks-ass.net> <20200630191931.GA884155@elver.google.com> <20200630201243.GD4817@hirez.programming.kicks-ass.net> <20200630203016.GI9247@paulmck-ThinkPad-P72> <20200701091054.GW4781@hirez.programming.kicks-ass.net> <4427b0f825324da4b1640e32265b04bd@AcuMS.aculab.com> <20200701160624.GO9247@paulmck-ThinkPad-P72> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 02, 2020 at 09:37:26AM +0000, David Laight wrote: > From: Paul E. McKenney > > Sent: 01 July 2020 17:06 > ... > > > Would an asm statement that uses the same 'register' for input and > > > output but doesn't actually do anything help? > > > It won't generate any code, but the compiler ought to assume that > > > it might change the value - so can't do optimisations that track > > > the value across the call. > > > > It might replace the volatile load, but there are optimizations that > > apply to the downstream code as well. > > > > Or are you suggesting periodically pushing the dependent variable > > through this asm? That might work, but it would be easier and > > more maintainable to just mark the variable. > > Marking the variable requires compiler support. > Although what 'volatile register int foo;' means might be interesting. > > So I was thinking that in the case mentioned earlier you do: > ptr += LAUNDER(offset & 1); > to ensure the compiler didn't convert to: > if (offset & 1) ptr++; > (Which is probably a pessimisation - the reverse is likely better.) Indeed, Akshat's prototype follows the "volatile" qualifier in many ways. https://github.com/AKG001/gcc/ Thanx, Paul From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B97EFC433E1 for ; Thu, 2 Jul 2020 18:01:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8A86920760 for ; Thu, 2 Jul 2020 18:01:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Y/1LreMF"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="QWmK8WMR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8A86920760 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:Reply-To:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vdm+RbXwjJ1hBcPYoc1P6HgsqYcuU3jyy1f7/gqIbuY=; b=Y/1LreMFQdiZQmL1r39yjR+/ZK e5WHCZ+l0iPNLP1jFX76f5ylrG8O6ZjPr5Cn1JmE0eU028mg5Z01S5cftfFAB1SxKSMpAdrecbWjs psnfSzyAFL4q7esdQP4eDCQbiZHaIlkDw7ID5JR/Hyx7v/BbtGzdJTXgFJuI5VYo/c2NLZ1etjE2u kqnoR5oyEs3AhYX33HRy+JruxpE0gja4T50gmjBFlEgehn4gbb04uERl0aZczmQdXLAyfiNTbUwsB L961NSPlz3skhsJp4x1UKgMzNvm0mkFXck1xKJMan0T+7o3rDl+YQpKNEQ0kFvE6oKlDFMZESS5Kl HdiKCbjw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jr3Vu-0006u4-KM; Thu, 02 Jul 2020 18:00:46 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jr3Vr-0006sZ-7T for linux-arm-kernel@lists.infradead.org; Thu, 02 Jul 2020 18:00:44 +0000 Received: from paulmck-ThinkPad-P72.home (50-39-105-78.bvtn.or.frontiernet.net [50.39.105.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 832662073E; Thu, 2 Jul 2020 18:00:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1593712842; bh=Hak91qzk3x/aeXBK1n/XMiTpR5KSRvENrzPRsP83yxM=; h=Date:From:To:Cc:Subject:Reply-To:References:In-Reply-To:From; b=QWmK8WMRCdHSwyVK000d5y6dbgLM+MjgvdkwYsTsrjr5LZBrjrxYWW1nMi6rZxccV IiaPyrs2F2bjvlZIb4WjffkjC0aKcE/DRPRkmEy2Vz5+fS5gilxXEQzxwjlFv3ETvE BcELqK8pbmTnqz6ggKuzaDwzCOlpTPOwyp2kT1xI= Received: by paulmck-ThinkPad-P72.home (Postfix, from userid 1000) id 6CE89352334B; Thu, 2 Jul 2020 11:00:42 -0700 (PDT) Date: Thu, 2 Jul 2020 11:00:42 -0700 From: "Paul E. McKenney" To: David Laight Subject: Re: [PATCH 00/22] add support for Clang LTO Message-ID: <20200702180042.GW9247@paulmck-ThinkPad-P72> References: <20200625080313.GY4817@hirez.programming.kicks-ass.net> <20200625082433.GC117543@hirez.programming.kicks-ass.net> <20200625085745.GD117543@hirez.programming.kicks-ass.net> <20200630191931.GA884155@elver.google.com> <20200630201243.GD4817@hirez.programming.kicks-ass.net> <20200630203016.GI9247@paulmck-ThinkPad-P72> <20200701091054.GW4781@hirez.programming.kicks-ass.net> <4427b0f825324da4b1640e32265b04bd@AcuMS.aculab.com> <20200701160624.GO9247@paulmck-ThinkPad-P72> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200702_140043_405770_F2A02197 X-CRM114-Status: GOOD ( 21.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: paulmck@kernel.org Cc: linux-arch , Marco Elver , "maintainer:X86 ARCHITECTURE \(32-BIT AND 64-BIT\)" , Kees Cook , Kernel Hardening , 'Peter Zijlstra' , Greg Kroah-Hartman , Masahiro Yamada , Linux Kbuild mailing list , Nick Desaulniers , LKML , clang-built-linux , Sami Tolvanen , "linux-pci@vger.kernel.org" , Will Deacon , Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 02, 2020 at 09:37:26AM +0000, David Laight wrote: > From: Paul E. McKenney > > Sent: 01 July 2020 17:06 > ... > > > Would an asm statement that uses the same 'register' for input and > > > output but doesn't actually do anything help? > > > It won't generate any code, but the compiler ought to assume that > > > it might change the value - so can't do optimisations that track > > > the value across the call. > > > > It might replace the volatile load, but there are optimizations that > > apply to the downstream code as well. > > > > Or are you suggesting periodically pushing the dependent variable > > through this asm? That might work, but it would be easier and > > more maintainable to just mark the variable. > > Marking the variable requires compiler support. > Although what 'volatile register int foo;' means might be interesting. > > So I was thinking that in the case mentioned earlier you do: > ptr += LAUNDER(offset & 1); > to ensure the compiler didn't convert to: > if (offset & 1) ptr++; > (Which is probably a pessimisation - the reverse is likely better.) Indeed, Akshat's prototype follows the "volatile" qualifier in many ways. https://github.com/AKG001/gcc/ Thanx, Paul _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel