All of lore.kernel.org
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: kbuild@lists.01.org
Subject: Re: [PATCH] x86/speculation/l1tf: Add KConfig for setting the L1D cache flush mode
Date: Fri, 03 Jul 2020 03:34:27 +0800	[thread overview]
Message-ID: <202007030351.y0HQZZPl%lkp@intel.com> (raw)

[-- Attachment #1: Type: text/plain, Size: 4205 bytes --]

CC: kbuild-all(a)lists.01.org
In-Reply-To: <20200702161916.2456342-1-abhishekbh@google.com>
References: <20200702161916.2456342-1-abhishekbh@google.com>
TO: Abhishek Bhardwaj <abhishekbh@google.com>
TO: LKML <linux-kernel@vger.kernel.org>
CC: Abhishek Bhardwaj <abhishekbh@google.com>
CC: Anthony Steinhauser <asteinhauser@google.com>
CC: Borislav Petkov <bp@alien8.de>
CC: "H. Peter Anvin" <hpa@zytor.com>
CC: Ingo Molnar <mingo@redhat.com>
CC: Jim Mattson <jmattson@google.com>
CC: Joerg Roedel <joro@8bytes.org>
CC: Josh Poimboeuf <jpoimboe@redhat.com>
CC: Mark Gross <mgross@linux.intel.com>

Hi Abhishek,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tip/auto-latest]
[also build test WARNING on linux/master tip/x86/core kvm/linux-next linus/master v5.8-rc3 next-20200702]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use  as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Abhishek-Bhardwaj/x86-speculation-l1tf-Add-KConfig-for-setting-the-L1D-cache-flush-mode/20200703-002135
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 7e44a91e0445a854af5d34ca0f5baceccd518e73
:::::: branch date: 3 hours ago
:::::: commit date: 3 hours ago
config: i386-randconfig-s002-20200702 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-14) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.2-3-gfa153962-dirty
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)

>> arch/x86/kernel/cpu/bugs.c:1402:6: sparse: sparse: undefined preprocessor identifier 'CONFIG_KVM_VMENTRY_L1D_FLUSH'
   arch/x86/kernel/cpu/bugs.c:1404:8: sparse: sparse: undefined preprocessor identifier 'CONFIG_KVM_VMENTRY_L1D_FLUSH'
   arch/x86/kernel/cpu/bugs.c:1406:8: sparse: sparse: undefined preprocessor identifier 'CONFIG_KVM_VMENTRY_L1D_FLUSH'

# https://github.com/0day-ci/linux/commit/893761b6e087104d84679082e5dfb90d41fd2878
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 893761b6e087104d84679082e5dfb90d41fd2878
vim +/CONFIG_KVM_VMENTRY_L1D_FLUSH +1402 arch/x86/kernel/cpu/bugs.c

72c6d2db64fa18c Thomas Gleixner   2018-07-13  1396  
d90a7a0ec83fb86 Jiri Kosina       2018-07-13  1397  /* Default mitigation for L1TF-affected CPUs */
d90a7a0ec83fb86 Jiri Kosina       2018-07-13  1398  enum l1tf_mitigations l1tf_mitigation __ro_after_init = L1TF_MITIGATION_FLUSH;
72c6d2db64fa18c Thomas Gleixner   2018-07-13  1399  #if IS_ENABLED(CONFIG_KVM_INTEL)
d90a7a0ec83fb86 Jiri Kosina       2018-07-13  1400  EXPORT_SYMBOL_GPL(l1tf_mitigation);
1eb46908b35dfba Guenter Roeck     2018-08-15  1401  #endif
893761b6e087104 Abhishek Bhardwaj 2020-07-02 @1402  #if (CONFIG_KVM_VMENTRY_L1D_FLUSH == 1)
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1403  enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_NEVER;
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1404  #elif (CONFIG_KVM_VMENTRY_L1D_FLUSH == 2)
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1405  enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_COND;
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1406  #elif (CONFIG_KVM_VMENTRY_L1D_FLUSH == 3)
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1407  enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_ALWAYS;
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1408  #else
895ae47f9918833 Thomas Gleixner   2018-07-13  1409  enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_AUTO;
893761b6e087104 Abhishek Bhardwaj 2020-07-02  1410  #endif
72c6d2db64fa18c Thomas Gleixner   2018-07-13  1411  EXPORT_SYMBOL_GPL(l1tf_vmx_mitigation);
72c6d2db64fa18c Thomas Gleixner   2018-07-13  1412  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 34699 bytes --]

             reply	other threads:[~2020-07-02 19:34 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-02 19:34 kernel test robot [this message]
  -- strict thread matches above, loose matches on Subject: below --
2020-07-02 16:19 [PATCH] x86/speculation/l1tf: Add KConfig for setting the L1D cache flush mode Abhishek Bhardwaj
2020-07-02 21:33 ` kernel test robot
2020-07-02 21:33   ` kernel test robot
2020-07-03  6:25 ` kernel test robot
2020-07-03  6:25   ` kernel test robot
2020-07-06 15:01 ` mark gross

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202007030351.y0HQZZPl%lkp@intel.com \
    --to=lkp@intel.com \
    --cc=kbuild@lists.01.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.