All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Mark Brown <broonie@kernel.org>
Cc: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	kernel@pengutronix.de, Marc Kleine-Budde <mkl@pengutronix.de>
Subject: [PATCH v2 01/10] spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate
Date: Mon,  6 Jul 2020 16:34:34 +0200	[thread overview]
Message-ID: <20200706143443.9855-2-mkl@pengutronix.de> (raw)
In-Reply-To: <20200706143443.9855-1-mkl@pengutronix.de>

A SPI transfer defines the _maximum_ speed of the SPI transfer. However the
driver doesn't take into account that the clock divider is always rounded down
(due to integer arithmetics). This results in a too high clock rate for the SPI
transfer.

E.g.: with a mclk_rate of 24 MHz and a SPI transfer speed of 10 MHz, the
original code calculates a reg of "0", which results in a effective divider of
"2" and a 12 MHz clock for the SPI transfer.

This patch fixes the issue by using DIV_ROUND_UP() instead of a plain
integer division.

While there simplify the divider calculation for the CDR1 case, use
order_base_2() instead of two ilog2() calculations.

Fixes: 3558fe900e8a ("spi: sunxi: Add Allwinner A31 SPI controller driver")
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
 drivers/spi/spi-sun6i.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index ecea15534c42..fa11cc0e809b 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -198,7 +198,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 				  struct spi_transfer *tfr)
 {
 	struct sun6i_spi *sspi = spi_master_get_devdata(master);
-	unsigned int mclk_rate, div, timeout;
+	unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout;
 	unsigned int start, end, tx_time;
 	unsigned int trig_level;
 	unsigned int tx_len = 0;
@@ -287,14 +287,12 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 	 * First try CDR2, and if we can't reach the expected
 	 * frequency, fall back to CDR1.
 	 */
-	div = mclk_rate / (2 * tfr->speed_hz);
-	if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
-		if (div > 0)
-			div--;
-
-		reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS;
+	div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz);
+	div_cdr2 = DIV_ROUND_UP(div_cdr1, 2);
+	if (div_cdr2 <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
+		reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS;
 	} else {
-		div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);
+		div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1));
 		reg = SUN6I_CLK_CTL_CDR1(div);
 	}
 
-- 
2.27.0


WARNING: multiple messages have this Message-ID
From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Mark Brown <broonie@kernel.org>
Cc: Maxime Ripard <mripard@kernel.org>,
	linux-spi@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
	Marc Kleine-Budde <mkl@pengutronix.de>,
	kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 01/10] spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate
Date: Mon,  6 Jul 2020 16:34:34 +0200	[thread overview]
Message-ID: <20200706143443.9855-2-mkl@pengutronix.de> (raw)
In-Reply-To: <20200706143443.9855-1-mkl@pengutronix.de>

A SPI transfer defines the _maximum_ speed of the SPI transfer. However the
driver doesn't take into account that the clock divider is always rounded down
(due to integer arithmetics). This results in a too high clock rate for the SPI
transfer.

E.g.: with a mclk_rate of 24 MHz and a SPI transfer speed of 10 MHz, the
original code calculates a reg of "0", which results in a effective divider of
"2" and a 12 MHz clock for the SPI transfer.

This patch fixes the issue by using DIV_ROUND_UP() instead of a plain
integer division.

While there simplify the divider calculation for the CDR1 case, use
order_base_2() instead of two ilog2() calculations.

Fixes: 3558fe900e8a ("spi: sunxi: Add Allwinner A31 SPI controller driver")
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
 drivers/spi/spi-sun6i.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c
index ecea15534c42..fa11cc0e809b 100644
--- a/drivers/spi/spi-sun6i.c
+++ b/drivers/spi/spi-sun6i.c
@@ -198,7 +198,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 				  struct spi_transfer *tfr)
 {
 	struct sun6i_spi *sspi = spi_master_get_devdata(master);
-	unsigned int mclk_rate, div, timeout;
+	unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout;
 	unsigned int start, end, tx_time;
 	unsigned int trig_level;
 	unsigned int tx_len = 0;
@@ -287,14 +287,12 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 	 * First try CDR2, and if we can't reach the expected
 	 * frequency, fall back to CDR1.
 	 */
-	div = mclk_rate / (2 * tfr->speed_hz);
-	if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
-		if (div > 0)
-			div--;
-
-		reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS;
+	div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz);
+	div_cdr2 = DIV_ROUND_UP(div_cdr1, 2);
+	if (div_cdr2 <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
+		reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS;
 	} else {
-		div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);
+		div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1));
 		reg = SUN6I_CLK_CTL_CDR1(div);
 	}
 
-- 
2.27.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-07-06 14:34 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-06 14:34 [PATCH v2 00/10] spi: spi-sun6i: One fix and some improvements Marc Kleine-Budde
2020-07-06 14:34 ` Marc Kleine-Budde
2020-07-06 14:34 ` Marc Kleine-Budde [this message]
2020-07-06 14:34   ` [PATCH v2 01/10] spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 02/10] spi: spi-sun6i: sun6i_spi_transfer_one(): report effectivly used speed_hz of transfer Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 03/10] spi: spi-sun6i: sun6i_spi_transfer_one(): remove useless goto Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 04/10] spi: spi-sun6i: sun6i_spi_transfer_one(): remove not needed masking of transfer length Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 05/10] spi: spi-sun6i: sun6i_spi_get_tx_fifo_count: Convert manual shift+mask to FIELD_GET() Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 06/10] spi: spi-sun6i: sun6i_spi_drain_fifo(): introduce sun6i_spi_get_rx_fifo_count() and make use of it Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 07/10] spi: spi-sun6i: sun6i_spi_drain_fifo(): remove not needed length argument Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 08/10] spi: spi-sun6i: sun6i_spi_fill_fifo(): " Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 09/10] spi: spi-sun6i: sun6i_spi_transfer_one(): collate write to Interrupt Control Register Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 14:34 ` [PATCH v2 10/10] spi: spi-sun6i: sun6i_spi_transfer_one(): enable RF_RDY interrupt only if needed Marc Kleine-Budde
2020-07-06 14:34   ` Marc Kleine-Budde
2020-07-06 15:40 ` [PATCH v2 00/10] spi: spi-sun6i: One fix and some improvements Mark Brown
2020-07-06 15:40   ` Mark Brown
2020-07-06 18:52 ` Mark Brown
2020-07-06 18:52   ` Mark Brown
2020-07-06 19:02 ` Mark Brown
2020-07-06 19:02   ` Mark Brown
2020-07-07 14:17 ` Mark Brown
2020-07-07 14:17   ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200706143443.9855-2-mkl@pengutronix.de \
    --to=mkl@pengutronix.de \
    --cc=broonie@kernel.org \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=mripard@kernel.org \
    --cc=wens@csie.org \
    --subject='Re: [PATCH v2 01/10] spi: spi-sun6i: sun6i_spi_transfer_one(): fix setting of clock rate' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.