From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8768C433E0 for ; Thu, 9 Jul 2020 11:49:36 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B30C3206DF for ; Thu, 9 Jul 2020 11:49:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Q0wFv8Vi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B30C3206DF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tsRWBCL7lKefPT/ttKZwXn/y3b/25BEqgmnyGX4DkgE=; b=Q0wFv8ViQ6W6z2b5sa7DqNBgU Psx+tmD7+FcDt1PR6sak5nJnu+c2rW4/gYTPYWSHTbClzFP/GzWoRVzGoueyaP0bEXrSZhx36wYS4 9NnTBl3XFSw0sMUo8j9/O2nNDEBYewsIyFzP45nw/Pofw4IRQJNHh91t8ffWi8SrtXIt3kjnReqts xTbtx8m2+2hkCGHlTzwAhDJAmhE56GZvFjriiVbbLyirliCsS5CJi5sgIbJz35GJjSi/qJZQRhqEL 5jv2m9FeFSoRiSiNQXenl0wqwi6I+cDEBaUHulmQC3qOoBbEB7o3GcI+bMSNQ+7WbLO97sqmP9rpO UT0dl/Zug==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtV2H-0000by-Ch; Thu, 09 Jul 2020 11:48:17 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtV2F-0000bH-92 for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2020 11:48:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9D3761FB; Thu, 9 Jul 2020 04:48:12 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.14.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 54E1D3F71E; Thu, 9 Jul 2020 04:48:11 -0700 (PDT) Date: Thu, 9 Jul 2020 12:48:05 +0100 From: Mark Rutland To: Pingfan Liu Subject: Re: [PATCH] arm64/mm: save memory access in check_and_switch_context() fast switch path Message-ID: <20200709114805.GA11227@C02TD0UTHF1T.local> References: <1593755079-2160-1-git-send-email-kernelfans@gmail.com> <20200703101336.GA31383@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_074815_423156_A92F9AC6 X-CRM114-Status: GOOD ( 24.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Vladimir Murzin , Steve Capper , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 07, 2020 at 09:50:58AM +0800, Pingfan Liu wrote: > On Mon, Jul 6, 2020 at 4:10 PM Pingfan Liu wrote: > > > > On Fri, Jul 3, 2020 at 6:13 PM Mark Rutland wrote: > > > > > > On Fri, Jul 03, 2020 at 01:44:39PM +0800, Pingfan Liu wrote: > > > > The cpu_number and __per_cpu_offset cost two different cache lines, and may > > > > not exist after a heavy user space load. > > > > > > > > By replacing per_cpu(active_asids, cpu) with this_cpu_ptr(&active_asids) in > > > > fast path, register is used and these memory access are avoided. > > > > > > How about: > > > > > > | On arm64, smp_processor_id() reads a per-cpu `cpu_number` variable, > > > | using the per-cpu offset stored in the tpidr_el1 system register. In > > > | some cases we generate a per-cpu address with a sequence like: > > > | > > > | | cpu_ptr = &per_cpu(ptr, smp_processor_id()); > > > | > > > | Which potentially incurs a cache miss for both `cpu_number` and the > > > | in-memory `__per_cpu_offset` array. This can be written more optimally > > > | as: > > > | > > > | | cpu_ptr = this_cpu_ptr(ptr); > > > | > > > | ... which only needs the offset from tpidr_el1, and does not need to > > > | load from memory. > > Appreciate for your clear document. > > > > > > > By replacing per_cpu(active_asids, cpu) with this_cpu_ptr(&active_asids) in > > > > fast path, register is used and these memory access are avoided. > > > > > > Do you have any numbers that show benefit here? It's not clear to me how > > > often the above case would apply where the cahes would also be hot for > > > everything else we need, and numbers would help to justify that. > > Initially, I was just abstracted by the macro __my_cpu_offset > > implement, and came to this question. But following your thinking, I > > realized data is needed to make things clear. > > > > I have finished a test with 5.8.0-rc4 kernel on a 46 cpus qualcomm machine. > > command: time -p make all -j138 > > > > Before this patch: > > real 291.86 > > user 11050.18 > > sys 362.91 > > > > After this patch > > real 291.11 > > user 11055.62 > > sys 363.39 > > > > As the data, it shows a very small improvement. > The data may be affected by random factors, and less persuasive. And I > tried to do some repeated tests with perf-stat. > #cat b.sh > make clean && make all -j138 > > #perf stat --repeat 10 --null --sync sh b.sh > > - before this patch > Performance counter stats for 'sh b.sh' (10 runs): > > 298.62 +- 1.86 seconds time elapsed ( +- 0.62% ) > > > - after this patch > Performance counter stats for 'sh b.sh' (10 runs): > > 297.734 +- 0.954 seconds time elapsed ( +- 0.32% ) > IIUC that's a 0.3% improvement. It'd be worth putting these results in the commit message. Could you also try that with "perf bench sched messaging" as the workload? As a microbenchmark, that might show the highest potential benefit, and it'd be nice to have those figures too if possible. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel