[Intel-gfx] [PATCH 1/9] drm/i915/sdvo: Reduce the size of the on stack buffers

[Intel-gfx] [PATCH 1/9] drm/i915/sdvo: Reduce the size of the on stack buffers

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The strings we want to print to the on stack buffers should
be no more than
8 * 3 + strlen("(GET_SCALED_HDTV_RESOLUTION_SUPPORT)") + 1 = 61
bytes. So let's shrink the buffers down to 64 bytes.

Also switch the BUG_ON()s to WARN_ON()s if I made a mistake in
my arithmentic.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 8758ee2a4442..02119c827c80 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -414,12 +414,10 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 {
 	const char *cmd_name;
 	int i, pos = 0;
-#define BUF_LEN 256
-	char buffer[BUF_LEN];
+	char buffer[64];
 
 #define BUF_PRINT(args...) \
-	pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
-
+	pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 
 	for (i = 0; i < args_len; i++) {
 		BUF_PRINT("%02X ", ((u8 *)args)[i]);
@@ -433,9 +431,9 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 		BUF_PRINT("(%s)", cmd_name);
 	else
 		BUF_PRINT("(%02X)", cmd);
-	BUG_ON(pos >= BUF_LEN - 1);
+
+	WARN_ON(pos >= sizeof(buffer) - 1);
 #undef BUF_PRINT
-#undef BUF_LEN
 
 	DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 }
@@ -540,8 +538,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 	u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 	u8 status;
 	int i, pos = 0;
-#define BUF_LEN 256
-	char buffer[BUF_LEN];
+	char buffer[64];
 
 	buffer[0] = '\0';
 
@@ -581,7 +578,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 	}
 
 #define BUF_PRINT(args...) \
-	pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
+	pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 
 	cmd_status = sdvo_cmd_status(status);
 	if (cmd_status)
@@ -600,9 +597,9 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 			goto log_fail;
 		BUF_PRINT(" %02X", ((u8 *)response)[i]);
 	}
-	BUG_ON(pos >= BUF_LEN - 1);
+
+	WARN_ON(pos >= sizeof(buffer) - 1);
 #undef BUF_PRINT
-#undef BUF_LEN
 
 	DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 	return true;
-- 
2.24.1

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[Intel-gfx] [PATCH 2/9] drm/i915: Consolidate HDMI force_dvi handling

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the force_dvi check to a single function that can be called from
both mode validation and compute_config().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 49 ++++++++++++-----------
 1 file changed, 26 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 685589064d10..1659cff91426 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2108,9 +2108,16 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
 	return max_tmds_clock;
 }
 
+static bool intel_has_hdmi_sink(struct intel_hdmi *hdmi,
+				const struct drm_connector_state *conn_state)
+{
+	return hdmi->has_hdmi_sink &&
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
+}
+
 static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
 				 bool respect_downstream_limits,
-				 bool force_dvi)
+				 bool has_hdmi_sink)
 {
 	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
 	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
@@ -2126,7 +2133,7 @@ static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
 		if (info->max_tmds_clock)
 			max_tmds_clock = min(max_tmds_clock,
 					     info->max_tmds_clock);
-		else if (!hdmi->has_hdmi_sink || force_dvi)
+		else if (!has_hdmi_sink)
 			max_tmds_clock = min(max_tmds_clock, 165000);
 	}
 
@@ -2136,13 +2143,14 @@ static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
 static enum drm_mode_status
 hdmi_port_clock_valid(struct intel_hdmi *hdmi,
 		      int clock, bool respect_downstream_limits,
-		      bool force_dvi)
+		      bool has_hdmi_sink)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
 
 	if (clock < 25000)
 		return MODE_CLOCK_LOW;
-	if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits, force_dvi))
+	if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits,
+					  has_hdmi_sink))
 		return MODE_CLOCK_HIGH;
 
 	/* BXT DPLL can't generate 223-240 MHz */
@@ -2164,16 +2172,13 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
 	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum drm_mode_status status;
-	int clock;
+	int clock = mode->clock;
 	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
-	bool force_dvi =
-		READ_ONCE(to_intel_digital_connector_state(connector->state)->force_audio) == HDMI_AUDIO_OFF_DVI;
+	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->state);
 
 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return MODE_NO_DBLESCAN;
 
-	clock = mode->clock;
-
 	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
 		clock *= 2;
 
@@ -2187,18 +2192,18 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
 		clock /= 2;
 
 	/* check if we can do 8bpc */
-	status = hdmi_port_clock_valid(hdmi, clock, true, force_dvi);
+	status = hdmi_port_clock_valid(hdmi, clock, true, has_hdmi_sink);
 
-	if (hdmi->has_hdmi_sink && !force_dvi) {
+	if (has_hdmi_sink) {
 		/* if we can't do 8bpc we may still be able to do 12bpc */
 		if (status != MODE_OK && !HAS_GMCH(dev_priv))
 			status = hdmi_port_clock_valid(hdmi, clock * 3 / 2,
-						       true, force_dvi);
+						       true, has_hdmi_sink);
 
 		/* if we can't do 8,12bpc we may still be able to do 10bpc */
 		if (status != MODE_OK && INTEL_GEN(dev_priv) >= 11)
 			status = hdmi_port_clock_valid(hdmi, clock * 5 / 4,
-						       true, force_dvi);
+						       true, has_hdmi_sink);
 	}
 	if (status != MODE_OK)
 		return status;
@@ -2314,7 +2319,7 @@ static int intel_hdmi_port_clock(int clock, int bpc)
 
 static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
 				  struct intel_crtc_state *crtc_state,
-				  int clock, bool force_dvi)
+				  int clock)
 {
 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
 	int bpc;
@@ -2323,7 +2328,7 @@ static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
 		if (hdmi_deep_color_possible(crtc_state, bpc) &&
 		    hdmi_port_clock_valid(intel_hdmi,
 					  intel_hdmi_port_clock(clock, bpc),
-					  true, force_dvi) == MODE_OK)
+					  true, crtc_state->has_hdmi_sink) == MODE_OK)
 			return bpc;
 	}
 
@@ -2331,8 +2336,7 @@ static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
 }
 
 static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
-				    struct intel_crtc_state *crtc_state,
-				    bool force_dvi)
+				    struct intel_crtc_state *crtc_state)
 {
 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
 	const struct drm_display_mode *adjusted_mode =
@@ -2346,8 +2350,7 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
 	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
 		clock /= 2;
 
-	bpc = intel_hdmi_compute_bpc(encoder, crtc_state,
-				     clock, force_dvi);
+	bpc = intel_hdmi_compute_bpc(encoder, crtc_state, clock);
 
 	crtc_state->port_clock = intel_hdmi_port_clock(clock, bpc);
 
@@ -2363,7 +2366,7 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
 		      bpc, crtc_state->pipe_bpp);
 
 	if (hdmi_port_clock_valid(intel_hdmi, crtc_state->port_clock,
-				  false, force_dvi) != MODE_OK) {
+				  false, crtc_state->has_hdmi_sink) != MODE_OK) {
 		DRM_DEBUG_KMS("unsupported HDMI clock (%d kHz), rejecting mode\n",
 			      crtc_state->port_clock);
 		return -EINVAL;
@@ -2411,14 +2414,14 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 	struct drm_scdc *scdc = &connector->display_info.hdmi.scdc;
 	struct intel_digital_connector_state *intel_conn_state =
 		to_intel_digital_connector_state(conn_state);
-	bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
 	int ret;
 
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return -EINVAL;
 
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;
+	pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_hdmi,
+							 conn_state);
 
 	if (pipe_config->has_hdmi_sink)
 		pipe_config->has_infoframe = true;
@@ -2447,7 +2450,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 				intel_conn_state->force_audio == HDMI_AUDIO_ON;
 	}
 
-	ret = intel_hdmi_compute_clock(encoder, pipe_config, force_dvi);
+	ret = intel_hdmi_compute_clock(encoder, pipe_config);
 	if (ret)
 		return ret;
 
-- 
2.24.1

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[Intel-gfx] [PATCH 3/9] drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the force_dvi check to a single function that can be called from
both mode validation and compute_config(). Note that currently we
don't call it from mode validation, but that will change soon.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 02119c827c80..2d2c5e1c7e7c 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1264,6 +1264,13 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
 	pipe_config->clock_set = true;
 }
 
+static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
+				const struct drm_connector_state *conn_state)
+{
+	return sdvo->has_hdmi_monitor &&
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
+}
+
 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
 				     struct intel_crtc_state *pipe_config,
 				     struct drm_connector_state *conn_state)
@@ -1319,12 +1326,15 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
 	pipe_config->pixel_multiplier =
 		intel_sdvo_get_pixel_multiplier(adjusted_mode);
 
-	if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
-		pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
+	pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
 
-	if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
-	    (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
-		pipe_config->has_audio = true;
+	if (pipe_config->has_hdmi_sink) {
+		if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO)
+			pipe_config->has_audio = intel_sdvo->has_hdmi_audio;
+		else
+			pipe_config->has_audio =
+				intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
+	}
 
 	if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
 		/*
-- 
2.24.1

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[Intel-gfx] [PATCH 4/9] drm/i915/sdvo: Fix SDVO colorimetry bit defines

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Fix up the SDVO colorimetry bits to match the spec.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sdvo_regs.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo_regs.h b/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
index 13b9a8e257bb..74dc6c042b6e 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
@@ -705,10 +705,10 @@ struct intel_sdvo_enhancements_arg {
 #define SDVO_CMD_GET_PIXEL_REPLI	0x8c
 #define SDVO_CMD_GET_COLORIMETRY_CAP	0x8d
 #define SDVO_CMD_SET_COLORIMETRY	0x8e
-  #define SDVO_COLORIMETRY_RGB256   0x0
-  #define SDVO_COLORIMETRY_RGB220   0x1
-  #define SDVO_COLORIMETRY_YCrCb422 0x3
-  #define SDVO_COLORIMETRY_YCrCb444 0x4
+  #define SDVO_COLORIMETRY_RGB256	(1 << 0)
+  #define SDVO_COLORIMETRY_RGB220	(1 << 1)
+  #define SDVO_COLORIMETRY_YCrCb422	(1 << 2)
+  #define SDVO_COLORIMETRY_YCrCb444	(1 << 3)
 #define SDVO_CMD_GET_COLORIMETRY	0x8f
 #define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
 #define SDVO_CMD_SET_AUDIO_STAT		0x91
-- 
2.24.1

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[Intel-gfx] [PATCH 5/9] drm/i915/sdvo: Implement limited color range for SDVO HDMI properly

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The SDVO/HDMI port register limited color range bit can only be used
with TMDS encoding and not SDVO encoding, ie. to be used only when
using the port as a HDMI port as opposed to a SDVO port. The SDVO
spec does have a note that some GMCHs might allow that, but gen4
bspec vehemently disagrees. I suppose on ILK+ it might work since
the color range handling is on the CPU side rather than on the PCH
side, so there is no clear linkage between the TMDS vs. SDVO
encoding and color range. Alas, I have no hardware to test that
theory.

To implement limited color range support for SDVO->HDMI we need to
ask the SDVO device to do the range compression. Do so, but first
check if the device even supports the colorimetry selection.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c    |  4 +-
 drivers/gpu/drm/i915/display/intel_hdmi.h    |  2 +
 drivers/gpu/drm/i915/display/intel_sdvo.c    | 62 ++++++++++++--------
 4 files changed, 45 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 59c375879186..7ef1f209acc4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9888,7 +9888,8 @@ static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
 	WARN_ON(crtc_state->limited_color_range &&
 		crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
 
-	if (crtc_state->limited_color_range)
+	if (crtc_state->limited_color_range &&
+	    !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO))
 		val |= PIPECONF_COLOR_RANGE_SELECT;
 
 	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 1659cff91426..85c5f840a0fc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2375,8 +2375,8 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
 	return 0;
 }
 
-static bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
-					   const struct drm_connector_state *conn_state)
+bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
+				    const struct drm_connector_state *conn_state)
 {
 	const struct intel_digital_connector_state *intel_conn_state =
 		to_intel_digital_connector_state(conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index cf1ea5427639..c5f59c20f1e8 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -48,5 +48,7 @@ void intel_read_infoframe(struct intel_encoder *encoder,
 			  const struct intel_crtc_state *crtc_state,
 			  enum hdmi_infoframe_type type,
 			  union hdmi_infoframe *frame);
+bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
+				    const struct drm_connector_state *conn_state);
 
 #endif /* __INTEL_HDMI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 2d2c5e1c7e7c..a0bbd728aa54 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -95,6 +95,8 @@ struct intel_sdvo {
 	 */
 	struct intel_sdvo_caps caps;
 
+	u8 colorimetry_cap;
+
 	/* Pixel clock limitations reported by the SDVO device, in kHz */
 	int pixel_clock_min, pixel_clock_max;
 
@@ -1271,6 +1273,18 @@ static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
 		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
 }
 
+static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
+					   const struct intel_crtc_state *crtc_state,
+					   const struct drm_connector_state *conn_state)
+{
+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
+
+	if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
+		return false;
+
+	return intel_hdmi_limited_color_range(crtc_state, conn_state);
+}
+
 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
 				     struct intel_crtc_state *pipe_config,
 				     struct drm_connector_state *conn_state)
@@ -1336,21 +1350,9 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
 				intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
 	}
 
-	if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
-		/*
-		 * See CEA-861-E - 5.1 Default Encoding Parameters
-		 *
-		 * FIXME: This bit is only valid when using TMDS encoding and 8
-		 * bit per color mode.
-		 */
-		if (pipe_config->has_hdmi_sink &&
-		    drm_match_cea_mode(adjusted_mode) > 1)
-			pipe_config->limited_color_range = true;
-	} else {
-		if (pipe_config->has_hdmi_sink &&
-		    intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
-			pipe_config->limited_color_range = true;
-	}
+	pipe_config->limited_color_range =
+		intel_sdvo_limited_color_range(encoder, pipe_config,
+					       conn_state);
 
 	/* Clock computation needs to happen after pixel multiplier. */
 	if (IS_TV(intel_sdvo_connector))
@@ -1487,6 +1489,8 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
 	if (crtc_state->has_hdmi_sink) {
 		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
 		intel_sdvo_set_colorimetry(intel_sdvo,
+					   crtc_state->limited_color_range ?
+					   SDVO_COLORIMETRY_RGB220 :
 					   SDVO_COLORIMETRY_RGB256);
 		intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
 	} else
@@ -1520,8 +1524,6 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
 		/* The real mode polarity is set by the SDVO commands, using
 		 * struct intel_sdvo_dtd. */
 		sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
-		if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
-			sdvox |= HDMI_COLOR_RANGE_16_235;
 		if (INTEL_GEN(dev_priv) < 5)
 			sdvox |= SDVO_BORDER_ENABLE;
 	} else {
@@ -1678,8 +1680,11 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
 	     "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
 	     pipe_config->pixel_multiplier, encoder_pixel_multiplier);
 
-	if (sdvox & HDMI_COLOR_RANGE_16_235)
-		pipe_config->limited_color_range = true;
+	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
+				 &val, 1)) {
+		if (val == SDVO_COLORIMETRY_RGB220)
+			pipe_config->limited_color_range = true;
+	}
 
 	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
 				 &val, 1)) {
@@ -1898,6 +1903,17 @@ static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct in
 	return true;
 }
 
+static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
+{
+	u8 cap;
+
+	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
+				  &cap, sizeof(cap)))
+		return SDVO_COLORIMETRY_RGB256;
+
+	return cap;
+}
+
 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
 {
 	struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
@@ -2654,12 +2670,9 @@ static void
 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
 			       struct intel_sdvo_connector *connector)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
-
 	intel_attach_force_audio_property(&connector->base.base);
-	if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
+	if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
 		intel_attach_broadcast_rgb_property(&connector->base.base);
-	}
 	intel_attach_aspect_ratio_property(&connector->base.base);
 }
 
@@ -3298,6 +3311,9 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
 	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
 		goto err;
 
+	intel_sdvo->colorimetry_cap =
+		intel_sdvo_get_colorimetry_cap(intel_sdvo);
+
 	if (intel_sdvo_output_setup(intel_sdvo,
 				    intel_sdvo->caps.output_flags) != true) {
 		DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
-- 
2.24.1

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[Intel-gfx] [PATCH 6/9] drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
pixel repeat feature. That only works with HDMI since it requires
AVI infoframe to signal the information to the sink. Hence even if
the mode dotclock would be valid we cannot currently assume that
we can just ignore the DBLCLK flag. Reject it for DVI sinks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 85c5f840a0fc..a62dd3348301 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2185,8 +2185,11 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
 	if (clock > max_dotclk)
 		return MODE_CLOCK_HIGH;
 
-	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		if (!has_hdmi_sink)
+			return MODE_CLOCK_LOW;
 		clock *= 2;
+	}
 
 	if (drm_mode_is_420_only(&connector->display_info, mode))
 		clock /= 2;
-- 
2.24.1

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[Intel-gfx] [PATCH 7/9] drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

With SDVO the pipe config pixel_multiplier only concerns itself with the
data on the SDVO bus. Any HDMI specific pixel repeat must be handled by
the SDVO device itself. To do that simply configure the SDVO pixel
replication factor appropriately. We already set up the infoframe PRB
values correctly via the infoframe helpers.

There is no cap we can check for this. The spec says that 1X,2X,4X are
mandatory, anything else is optional. 1X and 2X are all we need so
we should be able to assume they work.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 27 +++++++++++++++++++----
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index a0bbd728aa54..34d5bd750de8 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -943,6 +943,13 @@ static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 }
 
+static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
+					     u8 pixel_repeat)
+{
+	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
+				    &pixel_repeat, 1);
+}
+
 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 				       u8 audio_state)
 {
@@ -1493,6 +1500,9 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
 					   SDVO_COLORIMETRY_RGB220 :
 					   SDVO_COLORIMETRY_RGB256);
 		intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
+		intel_sdvo_set_pixel_replication(intel_sdvo,
+						 !!(adjusted_mode->flags &
+						    DRM_MODE_FLAG_DBLCLK));
 	} else
 		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
 
@@ -1839,17 +1849,26 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
 	struct intel_sdvo_connector *intel_sdvo_connector =
 		to_intel_sdvo_connector(connector);
 	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
+	bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
+	int clock = mode->clock;
 
 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return MODE_NO_DBLESCAN;
 
-	if (intel_sdvo->pixel_clock_min > mode->clock)
-		return MODE_CLOCK_LOW;
 
-	if (intel_sdvo->pixel_clock_max < mode->clock)
+	if (clock > max_dotclk)
 		return MODE_CLOCK_HIGH;
 
-	if (mode->clock > max_dotclk)
+	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
+		if (!has_hdmi_sink)
+			return MODE_CLOCK_LOW;
+		clock *= 2;
+	}
+
+	if (intel_sdvo->pixel_clock_min > clock)
+		return MODE_CLOCK_LOW;
+
+	if (intel_sdvo->pixel_clock_max < clock)
 		return MODE_CLOCK_HIGH;
 
 	if (IS_LVDS(intel_sdvo_connector)) {
-- 
2.24.1

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[Intel-gfx] [PATCH 8/9] drm/i915/sdvo: Make .get_modes() return the number of modes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

.get_modes() is supposed to return the number of modes added to the
probed_modes list (not that anyone actually checks for anything
except zero vs. not zero). Let's do that. Also switch over to using
intel_connector_update_modes() instead of hand rolling it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_sdvo.c | 56 +++++++++++++----------
 1 file changed, 33 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 34d5bd750de8..69ff297156cf 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2120,8 +2120,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
 	return ret;
 }
 
-static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
+static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
 {
+	int num_modes = 0;
 	struct edid *edid;
 
 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
@@ -2136,18 +2137,19 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
 	 * DDC fails, check to see if the analog output is disconnected, in
 	 * which case we'll look there for the digital DDC data.
 	 */
-	if (edid == NULL)
+	if (!edid)
 		edid = intel_sdvo_get_analog_edid(connector);
 
-	if (edid != NULL) {
-		if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
-						      edid)) {
-			drm_connector_update_edid_property(connector, edid);
-			drm_add_edid_modes(connector, edid);
-		}
+	if (!edid)
+		return 0;
 
-		kfree(edid);
-	}
+	if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
+					      edid))
+		num_modes += intel_connector_update_modes(connector, edid);
+
+	kfree(edid);
+
+	return num_modes;
 }
 
 /*
@@ -2215,12 +2217,13 @@ static const struct drm_display_mode sdvo_tv_modes[] = {
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 };
 
-static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
+static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
 {
 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
 	const struct drm_connector_state *conn_state = connector->state;
 	struct intel_sdvo_sdtv_resolution_request tv_res;
 	u32 reply = 0, format_map = 0;
+	int num_modes = 0;
 	int i;
 
 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
@@ -2235,31 +2238,37 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
 	       min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
 
 	if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
-		return;
+		return 0;
 
 	BUILD_BUG_ON(sizeof(tv_res) != 3);
 	if (!intel_sdvo_write_cmd(intel_sdvo,
 				  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
 				  &tv_res, sizeof(tv_res)))
-		return;
+		return 0;
 	if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
-		return;
+		return 0;
 
-	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
+	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
 		if (reply & (1 << i)) {
 			struct drm_display_mode *nmode;
 			nmode = drm_mode_duplicate(connector->dev,
 						   &sdvo_tv_modes[i]);
-			if (nmode)
+			if (nmode) {
 				drm_mode_probed_add(connector, nmode);
+				num_modes++;
+			}
 		}
+	}
+
+	return num_modes;
 }
 
-static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
+static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
 {
 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 	struct drm_display_mode *newmode;
+	int num_modes = 0;
 
 	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 		      connector->base.id, connector->name);
@@ -2276,6 +2285,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
 			newmode->type = (DRM_MODE_TYPE_PREFERRED |
 					 DRM_MODE_TYPE_DRIVER);
 			drm_mode_probed_add(connector, newmode);
+			num_modes++;
 		}
 	}
 
@@ -2284,7 +2294,9 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
 	 * Assume that the preferred modes are
 	 * arranged in priority order.
 	 */
-	intel_ddc_get_modes(connector, &intel_sdvo->ddc);
+	num_modes += intel_ddc_get_modes(connector, &intel_sdvo->ddc);
+
+	return num_modes;
 }
 
 static int intel_sdvo_get_modes(struct drm_connector *connector)
@@ -2292,13 +2304,11 @@ static int intel_sdvo_get_modes(struct drm_connector *connector)
 	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
 
 	if (IS_TV(intel_sdvo_connector))
-		intel_sdvo_get_tv_modes(connector);
+		return intel_sdvo_get_tv_modes(connector);
 	else if (IS_LVDS(intel_sdvo_connector))
-		intel_sdvo_get_lvds_modes(connector);
+		return intel_sdvo_get_lvds_modes(connector);
 	else
-		intel_sdvo_get_ddc_modes(connector);
-
-	return !list_empty(&connector->probed_modes);
+		return intel_sdvo_get_ddc_modes(connector);
 }
 
 static int
-- 
2.24.1

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[Intel-gfx] [PATCH 9/9] drm/i915/dvo: Make .get_modes() return the number of modes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

.get_modes() is supposed to return the number of modes added to the
probed_modes list (not that anyone actually checks for anything
except zero vs. not zero). Let's do that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dvo.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index a74dc5b915d1..3ce9f72d12e5 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -322,6 +322,7 @@ static int intel_dvo_get_modes(struct drm_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->dev);
 	const struct drm_display_mode *fixed_mode =
 		to_intel_connector(connector)->panel.fixed_mode;
+	int num_modes;
 
 	/*
 	 * We should probably have an i2c driver get_modes function for those
@@ -329,21 +330,22 @@ static int intel_dvo_get_modes(struct drm_connector *connector)
 	 * (TV-out, for example), but for now with just TMDS and LVDS,
 	 * that's not the case.
 	 */
-	intel_ddc_get_modes(connector,
-			    intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
-	if (!list_empty(&connector->probed_modes))
-		return 1;
+	num_modes = intel_ddc_get_modes(connector,
+					intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
+	if (num_modes)
+		return num_modes;
 
 	if (fixed_mode) {
 		struct drm_display_mode *mode;
+
 		mode = drm_mode_duplicate(connector->dev, fixed_mode);
 		if (mode) {
 			drm_mode_probed_add(connector, mode);
-			return 1;
+			num_modes++;
 		}
 	}
 
-	return 0;
+	return num_modes;
 }
 
 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
-- 
2.24.1

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers
URL   : https://patchwork.freedesktop.org/series/71775/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ac1818fd99c9 drm/i915/sdvo: Reduce the size of the on stack buffers
f28fab3ed98c drm/i915: Consolidate HDMI force_dvi handling
-:26: WARNING:LONG_LINE: line over 100 characters
#26: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:2115:
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;

total: 0 errors, 1 warnings, 0 checks, 147 lines checked
9c38e233607e drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling
-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_sdvo.c:1271:
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;

total: 0 errors, 1 warnings, 0 checks, 33 lines checked
b7beccfe4cce drm/i915/sdvo: Fix SDVO colorimetry bit defines
352cca7fca00 drm/i915/sdvo: Implement limited color range for SDVO HDMI properly
8b3edc33044e drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks
a367724ad6f5 drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat
e62085f51578 drm/i915/sdvo: Make .get_modes() return the number of modes
521d3340a6bd drm/i915/dvo: Make .get_modes() return the number of modes

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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers
URL   : https://patchwork.freedesktop.org/series/71775/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7705 -> Patchwork_16032
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16032 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16032, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16032:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_execlists:
    - fi-icl-u3:          [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-icl-u3/igt@i915_selftest@live_execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-icl-u3/igt@i915_selftest@live_execlists.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_chamelium@dp-edid-read:
    - {fi-ehl-1}:         NOTRUN -> [SKIP][3] +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-ehl-1/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - {fi-ehl-1}:         NOTRUN -> [INCOMPLETE][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-ehl-1/igt@kms_flip@basic-flip-vs-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_16032 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [TIMEOUT][5] ([i915#816]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_fence@nb-await-default:
    - {fi-ehl-1}:         [INCOMPLETE][7] -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-ehl-1/igt@gem_exec_fence@nb-await-default.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-ehl-1/igt@gem_exec_fence@nb-await-default.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-cfl-8700k:       [INCOMPLETE][9] ([i915#505]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
    - fi-kbl-x1275:       [INCOMPLETE][11] ([i915#879]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-kbl-x1275/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-guc:         [SKIP][13] ([fdo#109271]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][15] ([i915#553] / [i915#725]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - fi-skl-6770hq:      [INCOMPLETE][17] ([i915#435]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7705/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/fi-skl-6770hq/igt@kms_flip@basic-flip-vs-wf_vblank.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
  [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879


Participating hosts (38 -> 44)
------------------------------

  Additional (12): fi-bdw-5557u fi-bsw-n3050 fi-hsw-peppy fi-snb-2520m fi-gdg-551 fi-ivb-3770 fi-bsw-kefka fi-skl-lmem fi-blb-e6850 fi-kbl-r fi-skl-6600u fi-snb-2600 
  Missing    (6): fi-kbl-soraka fi-hsw-4770r fi-byt-squawks fi-ctg-p8600 fi-kbl-7560u fi-tgl-y 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7705 -> Patchwork_16032

  CI-20190529: 20190529
  CI_DRM_7705: b57ea8cadecd3444690439b4703d964afca476e1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5358: c6fc013f414b806175dc4143c58ab445e5235ea5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16032: 521d3340a6bd9cb531745a57ab6a005e453cdfe4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

521d3340a6bd drm/i915/dvo: Make .get_modes() return the number of modes
e62085f51578 drm/i915/sdvo: Make .get_modes() return the number of modes
a367724ad6f5 drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat
8b3edc33044e drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks
352cca7fca00 drm/i915/sdvo: Implement limited color range for SDVO HDMI properly
b7beccfe4cce drm/i915/sdvo: Fix SDVO colorimetry bit defines
9c38e233607e drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling
f28fab3ed98c drm/i915: Consolidate HDMI force_dvi handling
ac1818fd99c9 drm/i915/sdvo: Reduce the size of the on stack buffers

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16032/index.html
_______________________________________________
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Re: [Intel-gfx] [PATCH 2/9] drm/i915: Consolidate HDMI force_dvi handling

[Jani Nikula]

On Wed, 08 Jan 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the force_dvi check to a single function that can be called from
> both mode validation and compute_config().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 49 ++++++++++++-----------
>  1 file changed, 26 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 685589064d10..1659cff91426 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2108,9 +2108,16 @@ static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
>  	return max_tmds_clock;
>  }
>  
> +static bool intel_has_hdmi_sink(struct intel_hdmi *hdmi,
> +				const struct drm_connector_state *conn_state)
> +{
> +	return hdmi->has_hdmi_sink &&
> +		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
> +}
> +
>  static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>  				 bool respect_downstream_limits,
> -				 bool force_dvi)
> +				 bool has_hdmi_sink)
>  {
>  	struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
>  	int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
> @@ -2126,7 +2133,7 @@ static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>  		if (info->max_tmds_clock)
>  			max_tmds_clock = min(max_tmds_clock,
>  					     info->max_tmds_clock);
> -		else if (!hdmi->has_hdmi_sink || force_dvi)
> +		else if (!has_hdmi_sink)
>  			max_tmds_clock = min(max_tmds_clock, 165000);
>  	}
>  
> @@ -2136,13 +2143,14 @@ static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
>  static enum drm_mode_status
>  hdmi_port_clock_valid(struct intel_hdmi *hdmi,
>  		      int clock, bool respect_downstream_limits,
> -		      bool force_dvi)
> +		      bool has_hdmi_sink)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(intel_hdmi_to_dev(hdmi));
>  
>  	if (clock < 25000)
>  		return MODE_CLOCK_LOW;
> -	if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits, force_dvi))
> +	if (clock > hdmi_port_clock_limit(hdmi, respect_downstream_limits,
> +					  has_hdmi_sink))
>  		return MODE_CLOCK_HIGH;
>  
>  	/* BXT DPLL can't generate 223-240 MHz */
> @@ -2164,16 +2172,13 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>  	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
>  	struct drm_i915_private *dev_priv = to_i915(dev);
>  	enum drm_mode_status status;
> -	int clock;
> +	int clock = mode->clock;
>  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> -	bool force_dvi =
> -		READ_ONCE(to_intel_digital_connector_state(connector->state)->force_audio) == HDMI_AUDIO_OFF_DVI;
> +	bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->state);
>  
>  	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
>  		return MODE_NO_DBLESCAN;
>  
> -	clock = mode->clock;
> -
>  	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
>  		clock *= 2;
>  
> @@ -2187,18 +2192,18 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>  		clock /= 2;
>  
>  	/* check if we can do 8bpc */
> -	status = hdmi_port_clock_valid(hdmi, clock, true, force_dvi);
> +	status = hdmi_port_clock_valid(hdmi, clock, true, has_hdmi_sink);
>  
> -	if (hdmi->has_hdmi_sink && !force_dvi) {
> +	if (has_hdmi_sink) {
>  		/* if we can't do 8bpc we may still be able to do 12bpc */
>  		if (status != MODE_OK && !HAS_GMCH(dev_priv))
>  			status = hdmi_port_clock_valid(hdmi, clock * 3 / 2,
> -						       true, force_dvi);
> +						       true, has_hdmi_sink);
>  
>  		/* if we can't do 8,12bpc we may still be able to do 10bpc */
>  		if (status != MODE_OK && INTEL_GEN(dev_priv) >= 11)
>  			status = hdmi_port_clock_valid(hdmi, clock * 5 / 4,
> -						       true, force_dvi);
> +						       true, has_hdmi_sink);
>  	}
>  	if (status != MODE_OK)
>  		return status;
> @@ -2314,7 +2319,7 @@ static int intel_hdmi_port_clock(int clock, int bpc)
>  
>  static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
>  				  struct intel_crtc_state *crtc_state,
> -				  int clock, bool force_dvi)
> +				  int clock)
>  {
>  	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
>  	int bpc;
> @@ -2323,7 +2328,7 @@ static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
>  		if (hdmi_deep_color_possible(crtc_state, bpc) &&
>  		    hdmi_port_clock_valid(intel_hdmi,
>  					  intel_hdmi_port_clock(clock, bpc),
> -					  true, force_dvi) == MODE_OK)
> +					  true, crtc_state->has_hdmi_sink) == MODE_OK)
>  			return bpc;
>  	}
>  
> @@ -2331,8 +2336,7 @@ static int intel_hdmi_compute_bpc(struct intel_encoder *encoder,
>  }
>  
>  static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
> -				    struct intel_crtc_state *crtc_state,
> -				    bool force_dvi)
> +				    struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
>  	const struct drm_display_mode *adjusted_mode =
> @@ -2346,8 +2350,7 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
>  	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
>  		clock /= 2;
>  
> -	bpc = intel_hdmi_compute_bpc(encoder, crtc_state,
> -				     clock, force_dvi);
> +	bpc = intel_hdmi_compute_bpc(encoder, crtc_state, clock);
>  
>  	crtc_state->port_clock = intel_hdmi_port_clock(clock, bpc);
>  
> @@ -2363,7 +2366,7 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
>  		      bpc, crtc_state->pipe_bpp);
>  
>  	if (hdmi_port_clock_valid(intel_hdmi, crtc_state->port_clock,
> -				  false, force_dvi) != MODE_OK) {
> +				  false, crtc_state->has_hdmi_sink) != MODE_OK) {
>  		DRM_DEBUG_KMS("unsupported HDMI clock (%d kHz), rejecting mode\n",
>  			      crtc_state->port_clock);
>  		return -EINVAL;
> @@ -2411,14 +2414,14 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	struct drm_scdc *scdc = &connector->display_info.hdmi.scdc;
>  	struct intel_digital_connector_state *intel_conn_state =
>  		to_intel_digital_connector_state(conn_state);
> -	bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
>  	int ret;
>  
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
>  		return -EINVAL;
>  
>  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> -	pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;
> +	pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_hdmi,
> +							 conn_state);
>  
>  	if (pipe_config->has_hdmi_sink)
>  		pipe_config->has_infoframe = true;
> @@ -2447,7 +2450,7 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>  				intel_conn_state->force_audio == HDMI_AUDIO_ON;
>  	}
>  
> -	ret = intel_hdmi_compute_clock(encoder, pipe_config, force_dvi);
> +	ret = intel_hdmi_compute_clock(encoder, pipe_config);
>  	if (ret)
>  		return ret;

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 1/9] drm/i915/sdvo: Reduce the size of the on stack buffers

[Jani Nikula]

On Wed, 08 Jan 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The strings we want to print to the on stack buffers should
> be no more than
> 8 * 3 + strlen("(GET_SCALED_HDTV_RESOLUTION_SUPPORT)") + 1 = 61
> bytes. So let's shrink the buffers down to 64 bytes.
>
> Also switch the BUG_ON()s to WARN_ON()s if I made a mistake in
> my arithmentic.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_sdvo.c | 19 ++++++++-----------
>  1 file changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 8758ee2a4442..02119c827c80 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -414,12 +414,10 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
>  {
>  	const char *cmd_name;
>  	int i, pos = 0;
> -#define BUF_LEN 256
> -	char buffer[BUF_LEN];
> +	char buffer[64];
>  
>  #define BUF_PRINT(args...) \
> -	pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
> -
> +	pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
>  
>  	for (i = 0; i < args_len; i++) {
>  		BUF_PRINT("%02X ", ((u8 *)args)[i]);
> @@ -433,9 +431,9 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
>  		BUF_PRINT("(%s)", cmd_name);
>  	else
>  		BUF_PRINT("(%02X)", cmd);
> -	BUG_ON(pos >= BUF_LEN - 1);
> +
> +	WARN_ON(pos >= sizeof(buffer) - 1);
>  #undef BUF_PRINT
> -#undef BUF_LEN
>  
>  	DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
>  }
> @@ -540,8 +538,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
>  	u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
>  	u8 status;
>  	int i, pos = 0;
> -#define BUF_LEN 256
> -	char buffer[BUF_LEN];
> +	char buffer[64];
>  
>  	buffer[0] = '\0';
>  
> @@ -581,7 +578,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
>  	}
>  
>  #define BUF_PRINT(args...) \
> -	pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
> +	pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
>  
>  	cmd_status = sdvo_cmd_status(status);
>  	if (cmd_status)
> @@ -600,9 +597,9 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
>  			goto log_fail;
>  		BUF_PRINT(" %02X", ((u8 *)response)[i]);
>  	}
> -	BUG_ON(pos >= BUF_LEN - 1);
> +
> +	WARN_ON(pos >= sizeof(buffer) - 1);
>  #undef BUF_PRINT
> -#undef BUF_LEN
>  
>  	DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
>  	return true;

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 3/9] drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling

[Jani Nikula]

On Wed, 08 Jan 2020, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the force_dvi check to a single function that can be called from
> both mode validation and compute_config(). Note that currently we
> don't call it from mode validation, but that will change soon.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_sdvo.c | 20 +++++++++++++++-----
>  1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 02119c827c80..2d2c5e1c7e7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1264,6 +1264,13 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
>  	pipe_config->clock_set = true;
>  }
>  
> +static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
> +				const struct drm_connector_state *conn_state)
> +{
> +	return sdvo->has_hdmi_monitor &&
> +		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
> +}
> +
>  static int intel_sdvo_compute_config(struct intel_encoder *encoder,
>  				     struct intel_crtc_state *pipe_config,
>  				     struct drm_connector_state *conn_state)
> @@ -1319,12 +1326,15 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
>  	pipe_config->pixel_multiplier =
>  		intel_sdvo_get_pixel_multiplier(adjusted_mode);
>  
> -	if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
> -		pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
> +	pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
>  
> -	if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
> -	    (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
> -		pipe_config->has_audio = true;
> +	if (pipe_config->has_hdmi_sink) {
> +		if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO)
> +			pipe_config->has_audio = intel_sdvo->has_hdmi_audio;
> +		else
> +			pipe_config->has_audio =
> +				intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
> +	}
>  
>  	if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
>  		/*

-- 
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)
URL   : https://patchwork.freedesktop.org/series/71775/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d629200d3735 drm/i915/sdvo: Reduce the size of the on stack buffers
63fd40d1cd3d drm/i915: Consolidate HDMI force_dvi handling
-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:2116:
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;

total: 0 errors, 1 warnings, 0 checks, 147 lines checked
db7012bcf038 drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling
-:28: WARNING:LONG_LINE: line over 100 characters
#28: FILE: drivers/gpu/drm/i915/display/intel_sdvo.c:1271:
+		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;

total: 0 errors, 1 warnings, 0 checks, 33 lines checked
347977599923 drm/i915/sdvo: Fix SDVO colorimetry bit defines
2ec2b60bb239 drm/i915/sdvo: Implement limited color range for SDVO HDMI properly
d0350c5ec179 drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks
2e9ee2b681b8 drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat
18742fe20146 drm/i915/sdvo: Make .get_modes() return the number of modes
8b2fc5fad88e drm/i915/dvo: Make .get_modes() return the number of modes

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)
URL   : https://patchwork.freedesktop.org/series/71775/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7753 -> Patchwork_16127
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16127:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_flip@basic-flip-vs-dpms:
    - {fi-kbl-7560u}:     NOTRUN -> [FAIL][1] +5 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-kbl-7560u/igt@kms_flip@basic-flip-vs-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_16127 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_execlists:
    - fi-kbl-soraka:      [PASS][2] -> [DMESG-FAIL][3] ([i915#656])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-kbl-soraka/igt@i915_selftest@live_execlists.html

  
#### Possible fixes ####

  * igt@gem_ctx_param@basic:
    - {fi-ehl-1}:         [INCOMPLETE][4] ([i915#937]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-ehl-1/igt@gem_ctx_param@basic.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-ehl-1/igt@gem_ctx_param@basic.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6700k2:      [DMESG-WARN][6] ([i915#889]) -> [PASS][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-skl-6700k2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6600u:       [DMESG-WARN][8] ([i915#889]) -> [PASS][9] +23 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][10] ([i915#725]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gt_lrc:
    - fi-skl-6600u:       [DMESG-FAIL][12] ([i915#889]) -> [PASS][13] +7 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html

  * igt@i915_selftest@live_hangcheck:
    - fi-kbl-7500u:       [DMESG-FAIL][14] ([i915#889]) -> [PASS][15] +7 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-kbl-7500u/igt@i915_selftest@live_hangcheck.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-kbl-7500u/igt@i915_selftest@live_hangcheck.html

  * igt@i915_selftest@live_vma:
    - fi-kbl-7500u:       [DMESG-WARN][16] ([i915#889]) -> [PASS][17] +23 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/fi-kbl-7500u/igt@i915_selftest@live_vma.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/fi-kbl-7500u/igt@i915_selftest@live_vma.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
  [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937


Participating hosts (51 -> 43)
------------------------------

  Additional (2): fi-kbl-7560u fi-tgl-y 
  Missing    (10): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-bsw-kefka fi-skl-lmem fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7753 -> Patchwork_16127

  CI-20190529: 20190529
  CI_DRM_7753: cef3a815e760485d4c011adb3dafb4d49bff9378 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16127: 8b2fc5fad88e713339de2caceea9cbfaa6e6ca6c @ git://anongit.freedesktop.org/gfx-ci/linux


== Kernel 32bit build ==

Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16127/build_32bit.log

  CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  Building modules, stage 2.
  MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2


== Linux commits ==

8b2fc5fad88e drm/i915/dvo: Make .get_modes() return the number of modes
18742fe20146 drm/i915/sdvo: Make .get_modes() return the number of modes
2e9ee2b681b8 drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat
d0350c5ec179 drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks
2ec2b60bb239 drm/i915/sdvo: Implement limited color range for SDVO HDMI properly
347977599923 drm/i915/sdvo: Fix SDVO colorimetry bit defines
db7012bcf038 drm/i915/sdvo: Consolidate SDVO HDMI force_dvi handling
63fd40d1cd3d drm/i915: Consolidate HDMI force_dvi handling
d629200d3735 drm/i915/sdvo: Reduce the size of the on stack buffers

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.BUILD: warning for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)
URL   : https://patchwork.freedesktop.org/series/71775/
State : warning

== Summary ==

CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  Building modules, stage 2.
  MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/9] drm/i915/sdvo: Reduce the size of the on stack buffers (rev2)
URL   : https://patchwork.freedesktop.org/series/71775/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7753_full -> Patchwork_16127_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_16127_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +7 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb4/igt@gem_busy@busy-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb8/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_persistence@bcs0-mixed-process:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#679])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-glk3/igt@gem_ctx_persistence@bcs0-mixed-process.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-glk8/igt@gem_ctx_persistence@bcs0-mixed-process.html

  * igt@gem_ctx_persistence@processes:
    - shard-glk:          [PASS][5] -> [FAIL][6] ([i915#570])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-glk9/igt@gem_ctx_persistence@processes.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-glk5/igt@gem_ctx_persistence@processes.html

  * igt@gem_ctx_shared@q-smoketest-vebox:
    - shard-tglb:         [PASS][7] -> [INCOMPLETE][8] ([fdo#111735] / [i915#472])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb4/igt@gem_ctx_shared@q-smoketest-vebox.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb4/igt@gem_ctx_shared@q-smoketest-vebox.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([i915#677])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb8/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@preempt-queue-contexts-render:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111606] / [fdo#111677] / [i915#472])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb1/igt@gem_exec_schedule@preempt-queue-contexts-render.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb3/igt@gem_exec_schedule@preempt-queue-contexts-render.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([i915#463] / [i915#472])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb5/igt@gem_exec_schedule@smoketest-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb1/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_exec_schedule@smoketest-blt:
    - shard-tglb:         [PASS][17] -> [INCOMPLETE][18] ([i915#470] / [i915#472]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb1/igt@gem_exec_schedule@smoketest-blt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb3/igt@gem_exec_schedule@smoketest-blt.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-skl:          [PASS][19] -> [TIMEOUT][20] ([fdo#112271] / [i915#530])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl8/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-hsw:          [PASS][21] -> [TIMEOUT][22] ([fdo#112271] / [i915#530])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrash-inactive:
    - shard-apl:          [PASS][23] -> [TIMEOUT][24] ([fdo#112271] / [i915#530])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-apl3/igt@gem_persistent_relocs@forked-thrash-inactive.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-apl3/igt@gem_persistent_relocs@forked-thrash-inactive.html

  * igt@i915_pm_rps@reset:
    - shard-iclb:         [PASS][25] -> [FAIL][26] ([i915#413])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb4/igt@i915_pm_rps@reset.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb1/igt@i915_pm_rps@reset.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [PASS][27] -> [INCOMPLETE][28] ([i915#472])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb6/igt@i915_selftest@live_requests.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb3/igt@i915_selftest@live_requests.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x256-random:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([i915#54])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-256x256-random.html

  * igt@kms_flip@flip-vs-panning:
    - shard-skl:          [PASS][31] -> [DMESG-WARN][32] ([i915#109])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl2/igt@kms_flip@flip-vs-panning.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl1/igt@kms_flip@flip-vs-panning.html

  * igt@kms_flip_tiling@flip-changes-tiling:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([i915#699])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl1/igt@kms_flip_tiling@flip-changes-tiling.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl6/igt@kms_flip_tiling@flip-changes-tiling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
    - shard-tglb:         [PASS][35] -> [FAIL][36] ([i915#49]) +4 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][37] -> [DMESG-WARN][38] ([i915#180]) +7 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-apl:          [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][41] -> [FAIL][42] ([fdo#108145])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([fdo#108145] / [i915#265]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([fdo#109642] / [fdo#111068])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb4/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][47] -> [SKIP][48] ([fdo#109441])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb4/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][49] -> [FAIL][50] ([i915#31])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-apl8/igt@kms_setmode@basic.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-apl8/igt@kms_setmode@basic.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [PASS][51] -> [SKIP][52] ([fdo#109276]) +17 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb1/igt@prime_busy@hang-bsd2.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb5/igt@prime_busy@hang-bsd2.html

  
#### Possible fixes ####

  * igt@gem_busy@extended-parallel-vcs1:
    - shard-iclb:         [SKIP][53] ([fdo#112080]) -> [PASS][54] +4 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb5/igt@gem_busy@extended-parallel-vcs1.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb2/igt@gem_busy@extended-parallel-vcs1.html

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [DMESG-WARN][55] ([i915#180]) -> [PASS][56] +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-apl2/igt@gem_ctx_isolation@bcs0-s3.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-apl1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [SKIP][57] ([fdo#109276] / [fdo#112080]) -> [PASS][58] +3 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb8/igt@gem_ctx_persistence@vcs1-queued.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb4/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#110841]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_await@wide-contexts:
    - shard-tglb:         [INCOMPLETE][61] ([fdo#111736] / [i915#472]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb3/igt@gem_exec_await@wide-contexts.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb7/igt@gem_exec_await@wide-contexts.html

  * igt@gem_exec_gttfill@basic:
    - shard-tglb:         [INCOMPLETE][63] ([fdo#111593] / [i915#472]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb5/igt@gem_exec_gttfill@basic.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb1/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_parallel@basic:
    - shard-tglb:         [INCOMPLETE][65] ([i915#472] / [i915#476]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb3/igt@gem_exec_parallel@basic.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb7/igt@gem_exec_parallel@basic.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [SKIP][67] ([fdo#109276]) -> [PASS][68] +6 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb2/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [SKIP][69] ([i915#677]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb4/igt@gem_exec_schedule@pi-common-bsd.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb5/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [SKIP][71] ([fdo#112146]) -> [PASS][72] +5 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_exec_schedule@smoketest-vebox:
    - shard-tglb:         [INCOMPLETE][73] ([i915#472] / [i915#707]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb6/igt@gem_exec_schedule@smoketest-vebox.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb5/igt@gem_exec_schedule@smoketest-vebox.html

  * igt@gem_exec_whisper@normal:
    - shard-tglb:         [INCOMPLETE][75] ([i915#472]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb3/igt@gem_exec_whisper@normal.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb7/igt@gem_exec_whisper@normal.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-apl:          [TIMEOUT][77] ([fdo#112271] / [i915#530]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-apl6/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-apl4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-kbl:          [TIMEOUT][79] ([fdo#112271] / [i915#530]) -> [PASS][80] +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-kbl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-kbl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-kbl:          [INCOMPLETE][81] ([fdo#103665] / [i915#530]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-kbl6/igt@gem_persistent_relocs@forked-thrashing.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-kbl6/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-skl:          [DMESG-WARN][83] ([fdo#111870] / [i915#836]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl2/igt@gem_userptr_blits@sync-unmap-after-close.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl8/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][85] ([i915#454]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb1/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_selftest@live_gt_heartbeat:
    - shard-skl:          [DMESG-FAIL][87] ([i915#541]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl7/igt@i915_selftest@live_gt_heartbeat.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl9/igt@i915_selftest@live_gt_heartbeat.html

  * igt@kms_color@pipe-b-ctm-0-25:
    - shard-skl:          [DMESG-WARN][89] ([i915#109]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl7/igt@kms_color@pipe-b-ctm-0-25.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl3/igt@kms_color@pipe-b-ctm-0-25.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
    - shard-skl:          [FAIL][91] ([i915#54]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][93] ([IGT#5]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][95] ([i915#79]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][97] ([i915#79]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][99] ([i915#180]) -> [PASS][100] +2 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite:
    - shard-tglb:         [FAIL][101] ([i915#49]) -> [PASS][102] +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-pwrite.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [SKIP][103] ([fdo#109441]) -> [PASS][104] +2 similar issues
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][105] ([IGT#28]) -> [SKIP][106] ([fdo#109276] / [fdo#112080])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [SKIP][107] ([i915#468]) -> [FAIL][108] ([i915#454])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-tglb3/igt@i915_pm_dc@dc6-psr.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-tglb7/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][109] ([fdo#107724]) -> [SKIP][110] ([fdo#109349])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7753/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
  [i915#570]: https://gitlab.freedesktop.org/drm/intel/issues/570
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#699]: https://gitlab.freedesktop.org/drm/intel/issues/699
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#836]: https://gitlab.freedesktop.org/drm/intel/issues/836


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7753 -> Patchwork_16127

  CI-20190529: 20190529
  CI_DRM_7753: cef3a815e760485d4c011adb3dafb4d49bff9378 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16127: 8b2fc5fad88e713339de2caceea9cbfaa6e6ca6c @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16127/index.html
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Re: [Intel-gfx] [PATCH 4/9] drm/i915/sdvo: Fix SDVO colorimetry bit defines

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:37PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Fix up the SDVO colorimetry bits to match the spec.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_sdvo_regs.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo_regs.h b/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
> index 13b9a8e257bb..74dc6c042b6e 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo_regs.h
> @@ -705,10 +705,10 @@ struct intel_sdvo_enhancements_arg {
>  #define SDVO_CMD_GET_PIXEL_REPLI	0x8c
>  #define SDVO_CMD_GET_COLORIMETRY_CAP	0x8d
>  #define SDVO_CMD_SET_COLORIMETRY	0x8e
> -  #define SDVO_COLORIMETRY_RGB256   0x0
> -  #define SDVO_COLORIMETRY_RGB220   0x1
> -  #define SDVO_COLORIMETRY_YCrCb422 0x3
> -  #define SDVO_COLORIMETRY_YCrCb444 0x4
> +  #define SDVO_COLORIMETRY_RGB256	(1 << 0)
> +  #define SDVO_COLORIMETRY_RGB220	(1 << 1)
> +  #define SDVO_COLORIMETRY_YCrCb422	(1 << 2)
> +  #define SDVO_COLORIMETRY_YCrCb444	(1 << 3)
>  #define SDVO_CMD_GET_COLORIMETRY	0x8f
>  #define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
>  #define SDVO_CMD_SET_AUDIO_STAT		0x91
> -- 
> 2.24.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [Intel-gfx] [PATCH 5/9] drm/i915/sdvo: Implement limited color range for SDVO HDMI properly

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:38PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The SDVO/HDMI port register limited color range bit can only be used
> with TMDS encoding and not SDVO encoding, ie. to be used only when
> using the port as a HDMI port as opposed to a SDVO port. The SDVO
> spec does have a note that some GMCHs might allow that, but gen4
> bspec vehemently disagrees. I suppose on ILK+ it might work since
> the color range handling is on the CPU side rather than on the PCH
> side, so there is no clear linkage between the TMDS vs. SDVO
> encoding and color range. Alas, I have no hardware to test that
> theory.
> 
> To implement limited color range support for SDVO->HDMI we need to
> ask the SDVO device to do the range compression. Do so, but first
> check if the device even supports the colorimetry selection.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  3 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c    |  4 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.h    |  2 +
>  drivers/gpu/drm/i915/display/intel_sdvo.c    | 62 ++++++++++++--------
>  4 files changed, 45 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 59c375879186..7ef1f209acc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9888,7 +9888,8 @@ static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state)
>  	WARN_ON(crtc_state->limited_color_range &&
>  		crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB);
>  
> -	if (crtc_state->limited_color_range)
> +	if (crtc_state->limited_color_range &&
> +	    !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO))
>  		val |= PIPECONF_COLOR_RANGE_SELECT;
>  
>  	if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 1659cff91426..85c5f840a0fc 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2375,8 +2375,8 @@ static int intel_hdmi_compute_clock(struct intel_encoder *encoder,
>  	return 0;
>  }
>  
> -static bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
> -					   const struct drm_connector_state *conn_state)
> +bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
> +				    const struct drm_connector_state *conn_state)
>  {
>  	const struct intel_digital_connector_state *intel_conn_state =
>  		to_intel_digital_connector_state(conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
> index cf1ea5427639..c5f59c20f1e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
> @@ -48,5 +48,7 @@ void intel_read_infoframe(struct intel_encoder *encoder,
>  			  const struct intel_crtc_state *crtc_state,
>  			  enum hdmi_infoframe_type type,
>  			  union hdmi_infoframe *frame);
> +bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
> +				    const struct drm_connector_state *conn_state);
>  
>  #endif /* __INTEL_HDMI_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 2d2c5e1c7e7c..a0bbd728aa54 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -95,6 +95,8 @@ struct intel_sdvo {
>  	 */
>  	struct intel_sdvo_caps caps;
>  
> +	u8 colorimetry_cap;
> +
>  	/* Pixel clock limitations reported by the SDVO device, in kHz */
>  	int pixel_clock_min, pixel_clock_max;
>  
> @@ -1271,6 +1273,18 @@ static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
>  		READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
>  }
>  
> +static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
> +					   const struct intel_crtc_state *crtc_state,
> +					   const struct drm_connector_state *conn_state)
> +{
> +	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
> +
> +	if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
> +		return false;
> +
> +	return intel_hdmi_limited_color_range(crtc_state, conn_state);
> +}
> +
>  static int intel_sdvo_compute_config(struct intel_encoder *encoder,
>  				     struct intel_crtc_state *pipe_config,
>  				     struct drm_connector_state *conn_state)
> @@ -1336,21 +1350,9 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
>  				intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
>  	}
>  
> -	if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
> -		/*
> -		 * See CEA-861-E - 5.1 Default Encoding Parameters
> -		 *
> -		 * FIXME: This bit is only valid when using TMDS encoding and 8
> -		 * bit per color mode.
> -		 */
> -		if (pipe_config->has_hdmi_sink &&
> -		    drm_match_cea_mode(adjusted_mode) > 1)
> -			pipe_config->limited_color_range = true;
> -	} else {
> -		if (pipe_config->has_hdmi_sink &&
> -		    intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
> -			pipe_config->limited_color_range = true;
> -	}
> +	pipe_config->limited_color_range =
> +		intel_sdvo_limited_color_range(encoder, pipe_config,
> +					       conn_state);
>  
>  	/* Clock computation needs to happen after pixel multiplier. */
>  	if (IS_TV(intel_sdvo_connector))
> @@ -1487,6 +1489,8 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
>  	if (crtc_state->has_hdmi_sink) {
>  		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
>  		intel_sdvo_set_colorimetry(intel_sdvo,
> +					   crtc_state->limited_color_range ?
> +					   SDVO_COLORIMETRY_RGB220 :
>  					   SDVO_COLORIMETRY_RGB256);
>  		intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
>  	} else
> @@ -1520,8 +1524,6 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
>  		/* The real mode polarity is set by the SDVO commands, using
>  		 * struct intel_sdvo_dtd. */
>  		sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
> -		if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
> -			sdvox |= HDMI_COLOR_RANGE_16_235;
>  		if (INTEL_GEN(dev_priv) < 5)
>  			sdvox |= SDVO_BORDER_ENABLE;
>  	} else {
> @@ -1678,8 +1680,11 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
>  	     "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
>  	     pipe_config->pixel_multiplier, encoder_pixel_multiplier);
>  
> -	if (sdvox & HDMI_COLOR_RANGE_16_235)
> -		pipe_config->limited_color_range = true;
> +	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
> +				 &val, 1)) {
> +		if (val == SDVO_COLORIMETRY_RGB220)
> +			pipe_config->limited_color_range = true;
> +	}
>  
>  	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
>  				 &val, 1)) {
> @@ -1898,6 +1903,17 @@ static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct in
>  	return true;
>  }
>  
> +static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
> +{
> +	u8 cap;
> +
> +	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
> +				  &cap, sizeof(cap)))
> +		return SDVO_COLORIMETRY_RGB256;
> +
> +	return cap;
> +}
> +
>  static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
> @@ -2654,12 +2670,9 @@ static void
>  intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
>  			       struct intel_sdvo_connector *connector)
>  {
> -	struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
> -
>  	intel_attach_force_audio_property(&connector->base.base);
> -	if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
> +	if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
>  		intel_attach_broadcast_rgb_property(&connector->base.base);
> -	}
>  	intel_attach_aspect_ratio_property(&connector->base.base);
>  }
>  
> @@ -3298,6 +3311,9 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
>  	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
>  		goto err;
>  
> +	intel_sdvo->colorimetry_cap =
> +		intel_sdvo_get_colorimetry_cap(intel_sdvo);
> +
>  	if (intel_sdvo_output_setup(intel_sdvo,
>  				    intel_sdvo->caps.output_flags) != true) {
>  		DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
> -- 
> 2.24.1
> 
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Re: [Intel-gfx] [PATCH 6/9] drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:39PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
> pixel repeat feature. That only works with HDMI since it requires
> AVI infoframe to signal the information to the sink. Hence even if
> the mode dotclock would be valid we cannot currently assume that
> we can just ignore the DBLCLK flag. Reject it for DVI sinks.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 85c5f840a0fc..a62dd3348301 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2185,8 +2185,11 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>  	if (clock > max_dotclk)
>  		return MODE_CLOCK_HIGH;
>  
> -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> +		if (!has_hdmi_sink)
> +			return MODE_CLOCK_LOW;

MODE_H_ILLEGAL is used elsewhere for this case, and also an odd MODE_BAD
at one place.

>  		clock *= 2;
> +	}
>  
>  	if (drm_mode_is_420_only(&connector->display_info, mode))
>  		clock /= 2;
> -- 
> 2.24.1
> 
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Re: [Intel-gfx] [PATCH 7/9] drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:40PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> With SDVO the pipe config pixel_multiplier only concerns itself with the
> data on the SDVO bus. Any HDMI specific pixel repeat must be handled by
> the SDVO device itself. To do that simply configure the SDVO pixel
> replication factor appropriately. We already set up the infoframe PRB
> values correctly via the infoframe helpers.
> 
> There is no cap we can check for this. The spec says that 1X,2X,4X are
> mandatory, anything else is optional. 1X and 2X are all we need so
> we should be able to assume they work.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

Shouldn't DRM_MODE_FLAG_DBLCLK be set for the read-out mode in
intel_sdvo_get_config()?

> ---
>  drivers/gpu/drm/i915/display/intel_sdvo.c | 27 +++++++++++++++++++----
>  1 file changed, 23 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index a0bbd728aa54..34d5bd750de8 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -943,6 +943,13 @@ static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
>  	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
>  }
>  
> +static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
> +					     u8 pixel_repeat)
> +{
> +	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
> +				    &pixel_repeat, 1);
> +}
> +
>  static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
>  				       u8 audio_state)
>  {
> @@ -1493,6 +1500,9 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
>  					   SDVO_COLORIMETRY_RGB220 :
>  					   SDVO_COLORIMETRY_RGB256);
>  		intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
> +		intel_sdvo_set_pixel_replication(intel_sdvo,
> +						 !!(adjusted_mode->flags &
> +						    DRM_MODE_FLAG_DBLCLK));
>  	} else
>  		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
>  
> @@ -1839,17 +1849,26 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
>  	struct intel_sdvo_connector *intel_sdvo_connector =
>  		to_intel_sdvo_connector(connector);
>  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> +	bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
> +	int clock = mode->clock;
>  
>  	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
>  		return MODE_NO_DBLESCAN;
>  
> -	if (intel_sdvo->pixel_clock_min > mode->clock)
> -		return MODE_CLOCK_LOW;
>  
> -	if (intel_sdvo->pixel_clock_max < mode->clock)
> +	if (clock > max_dotclk)
>  		return MODE_CLOCK_HIGH;
>  
> -	if (mode->clock > max_dotclk)
> +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> +		if (!has_hdmi_sink)
> +			return MODE_CLOCK_LOW;
> +		clock *= 2;
> +	}
> +
> +	if (intel_sdvo->pixel_clock_min > clock)
> +		return MODE_CLOCK_LOW;
> +
> +	if (intel_sdvo->pixel_clock_max < clock)
>  		return MODE_CLOCK_HIGH;
>  
>  	if (IS_LVDS(intel_sdvo_connector)) {
> -- 
> 2.24.1
> 
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Re: [Intel-gfx] [PATCH 8/9] drm/i915/sdvo: Make .get_modes() return the number of modes

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:41PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> .get_modes() is supposed to return the number of modes added to the
> probed_modes list (not that anyone actually checks for anything
> except zero vs. not zero). Let's do that. Also switch over to using
> intel_connector_update_modes() instead of hand rolling it.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_sdvo.c | 56 +++++++++++++----------
>  1 file changed, 33 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 34d5bd750de8..69ff297156cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -2120,8 +2120,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
>  	return ret;
>  }
>  
> -static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
> +static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
>  {
> +	int num_modes = 0;
>  	struct edid *edid;
>  
>  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
> @@ -2136,18 +2137,19 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
>  	 * DDC fails, check to see if the analog output is disconnected, in
>  	 * which case we'll look there for the digital DDC data.
>  	 */
> -	if (edid == NULL)
> +	if (!edid)
>  		edid = intel_sdvo_get_analog_edid(connector);
>  
> -	if (edid != NULL) {
> -		if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
> -						      edid)) {
> -			drm_connector_update_edid_property(connector, edid);
> -			drm_add_edid_modes(connector, edid);
> -		}
> +	if (!edid)
> +		return 0;
>  
> -		kfree(edid);
> -	}
> +	if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
> +					      edid))
> +		num_modes += intel_connector_update_modes(connector, edid);
> +
> +	kfree(edid);
> +
> +	return num_modes;
>  }
>  
>  /*
> @@ -2215,12 +2217,13 @@ static const struct drm_display_mode sdvo_tv_modes[] = {
>  		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
>  };
>  
> -static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
> +static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
>  {
>  	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
>  	const struct drm_connector_state *conn_state = connector->state;
>  	struct intel_sdvo_sdtv_resolution_request tv_res;
>  	u32 reply = 0, format_map = 0;
> +	int num_modes = 0;
>  	int i;
>  
>  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
> @@ -2235,31 +2238,37 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
>  	       min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
>  
>  	if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
> -		return;
> +		return 0;
>  
>  	BUILD_BUG_ON(sizeof(tv_res) != 3);
>  	if (!intel_sdvo_write_cmd(intel_sdvo,
>  				  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
>  				  &tv_res, sizeof(tv_res)))
> -		return;
> +		return 0;
>  	if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
> -		return;
> +		return 0;
>  
> -	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
> +	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
>  		if (reply & (1 << i)) {
>  			struct drm_display_mode *nmode;
>  			nmode = drm_mode_duplicate(connector->dev,
>  						   &sdvo_tv_modes[i]);
> -			if (nmode)
> +			if (nmode) {
>  				drm_mode_probed_add(connector, nmode);
> +				num_modes++;
> +			}
>  		}
> +	}
> +
> +	return num_modes;
>  }
>  
> -static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
> +static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
>  {
>  	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
>  	struct drm_i915_private *dev_priv = to_i915(connector->dev);
>  	struct drm_display_mode *newmode;
> +	int num_modes = 0;
>  
>  	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
>  		      connector->base.id, connector->name);
> @@ -2276,6 +2285,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
>  			newmode->type = (DRM_MODE_TYPE_PREFERRED |
>  					 DRM_MODE_TYPE_DRIVER);
>  			drm_mode_probed_add(connector, newmode);
> +			num_modes++;
>  		}
>  	}
>  
> @@ -2284,7 +2294,9 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
>  	 * Assume that the preferred modes are
>  	 * arranged in priority order.
>  	 */
> -	intel_ddc_get_modes(connector, &intel_sdvo->ddc);
> +	num_modes += intel_ddc_get_modes(connector, &intel_sdvo->ddc);
> +
> +	return num_modes;
>  }
>  
>  static int intel_sdvo_get_modes(struct drm_connector *connector)
> @@ -2292,13 +2304,11 @@ static int intel_sdvo_get_modes(struct drm_connector *connector)
>  	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
>  
>  	if (IS_TV(intel_sdvo_connector))
> -		intel_sdvo_get_tv_modes(connector);
> +		return intel_sdvo_get_tv_modes(connector);
>  	else if (IS_LVDS(intel_sdvo_connector))
> -		intel_sdvo_get_lvds_modes(connector);
> +		return intel_sdvo_get_lvds_modes(connector);
>  	else
> -		intel_sdvo_get_ddc_modes(connector);
> -
> -	return !list_empty(&connector->probed_modes);
> +		return intel_sdvo_get_ddc_modes(connector);
>  }
>  
>  static int
> -- 
> 2.24.1
> 
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Re: [Intel-gfx] [PATCH 9/9] drm/i915/dvo: Make .get_modes() return the number of modes

[Imre Deak]

On Wed, Jan 08, 2020 at 08:12:42PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> .get_modes() is supposed to return the number of modes added to the
> probed_modes list (not that anyone actually checks for anything
> except zero vs. not zero). Let's do that.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dvo.c | 14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
> index a74dc5b915d1..3ce9f72d12e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -322,6 +322,7 @@ static int intel_dvo_get_modes(struct drm_connector *connector)
>  	struct drm_i915_private *dev_priv = to_i915(connector->dev);
>  	const struct drm_display_mode *fixed_mode =
>  		to_intel_connector(connector)->panel.fixed_mode;
> +	int num_modes;
>  
>  	/*
>  	 * We should probably have an i2c driver get_modes function for those
> @@ -329,21 +330,22 @@ static int intel_dvo_get_modes(struct drm_connector *connector)
>  	 * (TV-out, for example), but for now with just TMDS and LVDS,
>  	 * that's not the case.
>  	 */
> -	intel_ddc_get_modes(connector,
> -			    intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
> -	if (!list_empty(&connector->probed_modes))
> -		return 1;
> +	num_modes = intel_ddc_get_modes(connector,
> +					intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
> +	if (num_modes)
> +		return num_modes;
>  
>  	if (fixed_mode) {
>  		struct drm_display_mode *mode;
> +
>  		mode = drm_mode_duplicate(connector->dev, fixed_mode);
>  		if (mode) {
>  			drm_mode_probed_add(connector, mode);
> -			return 1;
> +			num_modes++;
>  		}
>  	}
>  
> -	return 0;
> +	return num_modes;
>  }
>  
>  static const struct drm_connector_funcs intel_dvo_connector_funcs = {
> -- 
> 2.24.1
> 
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Re: [Intel-gfx] [PATCH 6/9] drm/i915: Reject DRM_MODE_FLAG_DBLCLK with DVI sinks

[Ville Syrjälä]

On Thu, Jul 09, 2020 at 02:01:19PM +0300, Imre Deak wrote:
> On Wed, Jan 08, 2020 at 08:12:39PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The code assumes that DRM_MODE_FLAG_DBLCLK means that we enable the
> > pixel repeat feature. That only works with HDMI since it requires
> > AVI infoframe to signal the information to the sink. Hence even if
> > the mode dotclock would be valid we cannot currently assume that
> > we can just ignore the DBLCLK flag. Reject it for DVI sinks.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Imre Deak <imre.deak@intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_hdmi.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > index 85c5f840a0fc..a62dd3348301 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> > @@ -2185,8 +2185,11 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
> >  	if (clock > max_dotclk)
> >  		return MODE_CLOCK_HIGH;
> >  
> > -	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> > +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> > +		if (!has_hdmi_sink)
> > +			return MODE_CLOCK_LOW;
> 
> MODE_H_ILLEGAL is used elsewhere for this case, and also an odd MODE_BAD
> at one place.

Not seeing the MODE_BAD. The MODE_H_ILLEGAL cases are in the DP code.
I think that check is kinda wrong for DP anyway, except possinbly when
driving a HDMI sink via the protocol converter. Can't be sure since
IIRC the DP spec doesn't really say whether protocol converters are
supposed to enable pixel repeat for the HDMI part or not.

I think I migth have had a patch somewhere to ignore this for non-HDMI
sinks in the DP code. Which at least should be safe.

> 
> >  		clock *= 2;
> > +	}
> >  
> >  	if (drm_mode_is_420_only(&connector->display_info, mode))
> >  		clock /= 2;
> > -- 
> > 2.24.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 7/9] drm/i915/sdvo: Make SDVO deal with HDMI pixel repeat

[Ville Syrjälä]

On Thu, Jul 09, 2020 at 02:47:10PM +0300, Imre Deak wrote:
> On Wed, Jan 08, 2020 at 08:12:40PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > With SDVO the pipe config pixel_multiplier only concerns itself with the
> > data on the SDVO bus. Any HDMI specific pixel repeat must be handled by
> > the SDVO device itself. To do that simply configure the SDVO pixel
> > replication factor appropriately. We already set up the infoframe PRB
> > values correctly via the infoframe helpers.
> > 
> > There is no cap we can check for this. The spec says that 1X,2X,4X are
> > mandatory, anything else is optional. 1X and 2X are all we need so
> > we should be able to assume they work.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Imre Deak <imre.deak@intel.com>
> 
> Shouldn't DRM_MODE_FLAG_DBLCLK be set for the read-out mode in
> intel_sdvo_get_config()?

Apparently we don't do that for HDMI either, and we don't check
it it in intel_pipe_config_compare() either. I guess we could add
the readout+check. 

Although I've been actually tempted to just remove this flag
entirely since it only really should be set to boost the clock
above the magic 25MHz limit. Hmm, now I wonder if that limit
is about the TMDS clock or the dotclock actually. Would need to
read the spec once again. Anyways, the reason why I haven't
deprecated this flag yet is that IIRC some other drivers was
also  using it for other purposes, and I was too lazy to figure
out what's going on there.

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_sdvo.c | 27 +++++++++++++++++++----
> >  1 file changed, 23 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> > index a0bbd728aa54..34d5bd750de8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> > @@ -943,6 +943,13 @@ static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
> >  	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
> >  }
> >  
> > +static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
> > +					     u8 pixel_repeat)
> > +{
> > +	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
> > +				    &pixel_repeat, 1);
> > +}
> > +
> >  static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
> >  				       u8 audio_state)
> >  {
> > @@ -1493,6 +1500,9 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
> >  					   SDVO_COLORIMETRY_RGB220 :
> >  					   SDVO_COLORIMETRY_RGB256);
> >  		intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
> > +		intel_sdvo_set_pixel_replication(intel_sdvo,
> > +						 !!(adjusted_mode->flags &
> > +						    DRM_MODE_FLAG_DBLCLK));
> >  	} else
> >  		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
> >  
> > @@ -1839,17 +1849,26 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
> >  	struct intel_sdvo_connector *intel_sdvo_connector =
> >  		to_intel_sdvo_connector(connector);
> >  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> > +	bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
> > +	int clock = mode->clock;
> >  
> >  	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
> >  		return MODE_NO_DBLESCAN;
> >  
> > -	if (intel_sdvo->pixel_clock_min > mode->clock)
> > -		return MODE_CLOCK_LOW;
> >  
> > -	if (intel_sdvo->pixel_clock_max < mode->clock)
> > +	if (clock > max_dotclk)
> >  		return MODE_CLOCK_HIGH;
> >  
> > -	if (mode->clock > max_dotclk)
> > +	if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
> > +		if (!has_hdmi_sink)
> > +			return MODE_CLOCK_LOW;
> > +		clock *= 2;
> > +	}
> > +
> > +	if (intel_sdvo->pixel_clock_min > clock)
> > +		return MODE_CLOCK_LOW;
> > +
> > +	if (intel_sdvo->pixel_clock_max < clock)
> >  		return MODE_CLOCK_HIGH;
> >  
> >  	if (IS_LVDS(intel_sdvo_connector)) {
> > -- 
> > 2.24.1
> > 
> > _______________________________________________
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> > Intel-gfx@lists.freedesktop.org
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-- 
Ville Syrjälä
Intel
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