All of lore.kernel.org
 help / color / mirror / Atom feed
From: Igor Russkikh <irusskikh@marvell.com>
To: <netdev@vger.kernel.org>
Cc: "David S . Miller" <davem@davemloft.net>,
	Mark Starovoytov <mstarovoitov@marvell.com>,
	Jakub Kicinski <kuba@kernel.org>,
	Pavel Belous <pbelous@marvell.com>,
	Igor Russkikh <irusskikh@marvell.com>
Subject: [PATCH net-next 06/10] net: atlantic: add support for 64-bit reads/writes
Date: Mon, 13 Jul 2020 14:42:29 +0300	[thread overview]
Message-ID: <20200713114233.436-7-irusskikh@marvell.com> (raw)
In-Reply-To: <20200713114233.436-1-irusskikh@marvell.com>

From: Pavel Belous <pbelous@marvell.com>

This patch adds support for 64-bit reads/writes where applicable, e.g.
A2 supports them.

Signed-off-by: Pavel Belous <pbelous@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
---
 .../net/ethernet/aquantia/atlantic/aq_hw.h    |  1 +
 .../ethernet/aquantia/atlantic/aq_hw_utils.c  | 35 ++++++++++++++++---
 .../ethernet/aquantia/atlantic/aq_hw_utils.h  |  8 +++--
 .../aquantia/atlantic/hw_atl/hw_atl_a0.c      |  1 +
 .../aquantia/atlantic/hw_atl/hw_atl_b0.c      |  1 +
 .../aquantia/atlantic/hw_atl2/hw_atl2.c       |  1 +
 6 files changed, 39 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
index 9505918f252c..31606f512e05 100644
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
@@ -67,6 +67,7 @@ struct aq_hw_caps_s {
 	u8 rx_rings;
 	bool flow_control;
 	bool is_64_dma;
+	bool op64bit;
 	u32 priv_data_len;
 };
 
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
index 342c5179f846..0172d2206685 100644
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
@@ -1,7 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/*
- * aQuantia Corporation Network Driver
- * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
+/* Atlantic Network Driver
+ *
+ * Copyright (C) 2014-2019 aQuantia Corporation
+ * Copyright (C) 2019-2020 Marvell International Ltd.
  */
 
 /* File aq_hw_utils.c: Definitions of helper functions used across
@@ -56,13 +57,37 @@ void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)
  */
 u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg)
 {
-	u64 value = aq_hw_read_reg(hw, reg);
+	u64 value = U64_MAX;
+#ifdef CONFIG_X86_64
+	if (hw->aq_nic_cfg->aq_hw_caps->op64bit)
+		value = readq(hw->mmio + reg);
+	else
+#endif
+	{
+		value = aq_hw_read_reg(hw, reg);
+		value |= (u64)aq_hw_read_reg(hw, reg + 4) << 32;
+	}
 
-	value |= (u64)aq_hw_read_reg(hw, reg + 4) << 32;
+	if (value == U64_MAX &&
+	    readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX)
+		aq_utils_obj_set(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG);
 
 	return value;
 }
 
+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value)
+{
+#ifdef CONFIG_X86_64
+	if (hw->aq_nic_cfg->aq_hw_caps->op64bit)
+		writeq(value, hw->mmio + reg);
+	else
+#endif
+	{
+		writel(lower_32_bits(value), hw->mmio + reg);
+		writel(upper_32_bits(value), hw->mmio + reg + sizeof(u32));
+	}
+}
+
 int aq_hw_err_from_flags(struct aq_hw_s *hw)
 {
 	int err = 0;
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
index 32aa5f2fb840..ffa6e4067c21 100644
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
@@ -1,7 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * aQuantia Corporation Network Driver
- * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
+/* Atlantic Network Driver
+ *
+ * Copyright (C) 2014-2019 aQuantia Corporation
+ * Copyright (C) 2019-2020 Marvell International Ltd.
  */
 
 /* File aq_hw_utils.h: Declaration of helper functions used across hardware
@@ -33,6 +34,7 @@ u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);
 u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);
 void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);
 u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg);
+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value);
 int aq_hw_err_from_flags(struct aq_hw_s *hw);
 int aq_hw_num_tcs(struct aq_hw_s *hw);
 int aq_hw_q_per_tc(struct aq_hw_s *hw);
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
index a312864969af..8f8b90436ced 100644
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
@@ -18,6 +18,7 @@
 
 #define DEFAULT_A0_BOARD_BASIC_CAPABILITIES \
 	.is_64_dma = true,		  \
+	.op64bit = false,		  \
 	.msix_irqs = 4U,		  \
 	.irq_mask = ~0U,		  \
 	.vecs = HW_ATL_A0_RSS_MAX,	  \
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
index 51c8962b7a0e..ee74cad4a168 100644
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
@@ -20,6 +20,7 @@
 
 #define DEFAULT_B0_BOARD_BASIC_CAPABILITIES \
 	.is_64_dma = true,		  \
+	.op64bit = false,		  \
 	.msix_irqs = 8U,		  \
 	.irq_mask = ~0U,		  \
 	.vecs = HW_ATL_B0_RSS_MAX,	  \
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
index c65e6daad0e5..92f64048bf69 100644
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
@@ -21,6 +21,7 @@ static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,
 
 #define DEFAULT_BOARD_BASIC_CAPABILITIES \
 	.is_64_dma = true,		  \
+	.op64bit = true,		  \
 	.msix_irqs = 8U,		  \
 	.irq_mask = ~0U,		  \
 	.vecs = HW_ATL2_RSS_MAX,	  \
-- 
2.17.1


  parent reply	other threads:[~2020-07-13 11:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 11:42 [PATCH net-next 00/10] net: atlantic: various features Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 01/10] net: atlantic: media detect Igor Russkikh
2020-07-13 14:25   ` Andrew Lunn
2020-07-15  7:41     ` [EXT] " Igor Russkikh
2020-07-15 15:46       ` Andrew Lunn
2020-07-17  7:34         ` Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 02/10] net: atlantic: move FRAC_PER_NS to aq_hw.h Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 03/10] net: atlantic: additional per-queue stats Igor Russkikh
2020-07-13 22:03   ` Jakub Kicinski
2020-07-15  7:58     ` [EXT] " Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 04/10] net: atlantic: PTP statistics Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 05/10] net: atlantic: enable ipv6 support for TCP LSO and UDP GSO Igor Russkikh
2020-07-13 11:42 ` Igor Russkikh [this message]
2020-07-13 22:07   ` [PATCH net-next 06/10] net: atlantic: add support for 64-bit reads/writes Jakub Kicinski
2020-07-13 11:42 ` [PATCH net-next 07/10] net: atlantic: use U32_MAX in aq_hw_utils.c Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 08/10] net: atlantic: use intermediate variable to improve readability a bit Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 09/10] net: atlantic: A0 ntuple filters Igor Russkikh
2020-07-13 11:42 ` [PATCH net-next 10/10] net: atlantic: add hwmon getter for MAC temperature Igor Russkikh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200713114233.436-7-irusskikh@marvell.com \
    --to=irusskikh@marvell.com \
    --cc=davem@davemloft.net \
    --cc=kuba@kernel.org \
    --cc=mstarovoitov@marvell.com \
    --cc=netdev@vger.kernel.org \
    --cc=pbelous@marvell.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.