All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tony Nguyen <anthony.l.nguyen@intel.com>
To: intel-wired-lan@osuosl.org
Subject: [Intel-wired-lan] [PATCH S50 08/15] ice: Adjust scheduler default BW weight
Date: Mon, 13 Jul 2020 13:53:11 -0700	[thread overview]
Message-ID: <20200713205318.32425-8-anthony.l.nguyen@intel.com> (raw)
In-Reply-To: <20200713205318.32425-1-anthony.l.nguyen@intel.com>

From: Tarun Singh <tarun.k.singh@intel.com>

By default the queues are configured in legacy mode. The default
BW settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommneded default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
---
 drivers/net/ethernet/intel/ice/ice_common.c | 13 ++++++++++++-
 drivers/net/ethernet/intel/ice/ice_type.h   |  2 +-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
index 99b12446c7b0..d1d827a69271 100644
--- a/drivers/net/ethernet/intel/ice/ice_common.c
+++ b/drivers/net/ethernet/intel/ice/ice_common.c
@@ -3888,7 +3888,18 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
 	 * Without setting the generic section as valid in valid_sections, the
 	 * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
 	 */
-	buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
+	buf->txqs[0].info.valid_sections =
+		ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
+		ICE_AQC_ELEM_VALID_EIR;
+	buf->txqs[0].info.generic = 0;
+	buf->txqs[0].info.cir_bw.bw_profile_idx =
+		cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.cir_bw.bw_alloc =
+		cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
+	buf->txqs[0].info.eir_bw.bw_profile_idx =
+		cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.eir_bw.bw_alloc =
+		cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
 
 	/* add the LAN queue */
 	status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h
index bf31ccf01100..1fe8b0cbf064 100644
--- a/drivers/net/ethernet/intel/ice/ice_type.h
+++ b/drivers/net/ethernet/intel/ice/ice_type.h
@@ -418,7 +418,7 @@ enum ice_rl_type {
 #define ICE_SCHED_DFLT_BW		0xFFFFFFFF	/* unlimited */
 #define ICE_SCHED_DFLT_RL_PROF_ID	0
 #define ICE_SCHED_NO_SHARED_RL_PROF_ID	0xFFFF
-#define ICE_SCHED_DFLT_BW_WT		1
+#define ICE_SCHED_DFLT_BW_WT		4
 #define ICE_SCHED_INVAL_PROF_ID		0xFFFF
 #define ICE_SCHED_DFLT_BURST_SIZE	(15 * 1024)	/* in bytes (15k) */
 
-- 
2.20.1


  parent reply	other threads:[~2020-07-13 20:53 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 20:53 [Intel-wired-lan] [PATCH S50 01/15] ice: Implement LFC workaround Tony Nguyen
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 02/15] ice: Fix link broken after GLOBR reset Tony Nguyen
2020-07-16 17:48   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 03/15] ice: fix link event handling timing Tony Nguyen
2020-07-16 17:46   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 04/15] ice: restore VF MSI-X state during PCI reset Tony Nguyen
2020-07-16 17:46   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 05/15] ice: return correct error code from ice_aq_sw_rules Tony Nguyen
2020-07-16 17:45   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 06/15] ice: fix overwriting TX/RX descriptor values when rebuilding VSI Tony Nguyen
2020-07-16 17:49   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 07/15] ice: Add RL profile bit mask check Tony Nguyen
2020-07-16 17:47   ` Bowers, AndrewX
2020-07-13 20:53 ` Tony Nguyen [this message]
2020-07-16 17:47   ` [Intel-wired-lan] [PATCH S50 08/15] ice: Adjust scheduler default BW weight Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 09/15] ice: distribute Tx queues evenly Tony Nguyen
2020-07-16 17:50   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 10/15] ice: need_wakeup flag might not be set for Tx Tony Nguyen
2020-07-16 17:49   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 11/15] ice: Allow all VLANs in safe mode Tony Nguyen
2020-07-16 17:46   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 12/15] ice: cleanup VSI on probe fail Tony Nguyen
2020-07-16 17:48   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 13/15] ice: reduce scope of variable Tony Nguyen
2020-07-16 17:49   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 14/15] ice: disable no longer needed workaround for FW logging Tony Nguyen
2020-07-16 17:48   ` Bowers, AndrewX
2020-07-13 20:53 ` [Intel-wired-lan] [PATCH S50 15/15] ice: fix unused parameter warning Tony Nguyen
2020-07-16 17:48   ` Bowers, AndrewX
2020-07-16 17:47 ` [Intel-wired-lan] [PATCH S50 01/15] ice: Implement LFC workaround Bowers, AndrewX

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200713205318.32425-8-anthony.l.nguyen@intel.com \
    --to=anthony.l.nguyen@intel.com \
    --cc=intel-wired-lan@osuosl.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.