From: Somnath Kotur <somnath.kotur@broadcom.com>
To: dev@dpdk.org
Cc: ferruh.yigit@intel.com
Subject: [dpdk-dev] [PATCH 14/14] net/bnxt: add debug logs to the TF-ULP layer
Date: Fri, 17 Jul 2020 15:19:35 +0530 [thread overview]
Message-ID: <20200717094935.9337-15-somnath.kotur@broadcom.com> (raw)
In-Reply-To: <20200717094935.9337-1-somnath.kotur@broadcom.com>
Adding debug logs to the TF-ULP, introducing new debug files for
the same
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
drivers/net/bnxt/meson.build | 2 +
drivers/net/bnxt/tf_ulp/Makefile | 10 +
drivers/net/bnxt/tf_ulp/bnxt_tf_common.h | 6 +
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 6 +
drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c | 10 +
drivers/net/bnxt/tf_ulp/ulp_mapper.c | 130 ++-
drivers/net/bnxt/tf_ulp/ulp_matcher.c | 4 +
drivers/net/bnxt/tf_ulp/ulp_port_db.c | 8 +-
drivers/net/bnxt/tf_ulp/ulp_template_debug.c | 595 ++++++++++
drivers/net/bnxt/tf_ulp/ulp_template_debug.h | 329 ++++++
drivers/net/bnxt/tf_ulp/ulp_template_debug_proto.h | 72 ++
drivers/net/bnxt/tf_ulp/ulp_tf_debug.c | 1161 ++++++++++++++++++++
drivers/net/bnxt/tf_ulp/ulp_tf_debug.h | 26 +
drivers/net/bnxt/tf_ulp/ulp_utils.c | 2 +-
14 files changed, 2325 insertions(+), 36 deletions(-)
create mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_debug.c
create mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_debug.h
create mode 100644 drivers/net/bnxt/tf_ulp/ulp_template_debug_proto.h
create mode 100644 drivers/net/bnxt/tf_ulp/ulp_tf_debug.c
create mode 100644 drivers/net/bnxt/tf_ulp/ulp_tf_debug.h
diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build
index 8529b33..cfe9b7c 100644
--- a/drivers/net/bnxt/meson.build
+++ b/drivers/net/bnxt/meson.build
@@ -64,6 +64,8 @@ sources = files('bnxt_cpr.c',
'tf_ulp/ulp_port_db.c',
'tf_ulp/ulp_def_rules.c',
'tf_ulp/ulp_fc_mgr.c',
+ 'tf_ulp/ulp_template_debug.c',
+ 'tf_ulp/ulp_tf_debug.c',
'rte_pmd_bnxt.c')
diff --git a/drivers/net/bnxt/tf_ulp/Makefile b/drivers/net/bnxt/tf_ulp/Makefile
index abb6815..4312986 100644
--- a/drivers/net/bnxt/tf_ulp/Makefile
+++ b/drivers/net/bnxt/tf_ulp/Makefile
@@ -18,3 +18,13 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_flow_db.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_port_db.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_def_rules.c
SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_fc_mgr.c
+
+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW_DEBUG) += tf_ulp/ulp_template_debug.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_TRUFLOW_DEBUG) += tf_ulp/ulp_tf_debug.c
+
+#
+## Export include files
+#
+#
+SYMLINK-y-include +=
+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_ulp/ulp_tf_debug.h
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h b/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h
index f0633f0..3aa358c 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h
+++ b/drivers/net/bnxt/tf_ulp/bnxt_tf_common.h
@@ -13,6 +13,12 @@
#define BNXT_TF_DBG(lvl, fmt, args...) PMD_DRV_LOG(lvl, fmt, ## args)
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#define BNXT_TF_INF(fmt, args...) PMD_DRV_LOG(INFO, fmt, ## args)
+#else
+#define BNXT_TF_INF(fmt, args...)
+#endif
+
#define BNXT_ULP_EM_FLOWS 8192
#define BNXT_ULP_1M_FLOWS 1000000
#define BNXT_EEM_RX_GLOBAL_ID_MASK (BNXT_ULP_1M_FLOWS - 1)
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
index 0869231..f9a303f 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c
@@ -263,6 +263,12 @@ ulp_eem_tbl_scope_init(struct bnxt *bp)
return rc;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_TF_DBG(DEBUG, "TableScope=0x%0x %d\n",
+ params.tbl_scope_id,
+ params.tbl_scope_id);
+#endif
+
rc = bnxt_ulp_cntxt_tbl_scope_id_set(bp->ulp_ctx, params.tbl_scope_id);
if (rc) {
BNXT_TF_DBG(ERR, "Unable to set table scope id\n");
diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
index 89fffcf..4d2bb1d 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
@@ -11,6 +11,9 @@
#include "ulp_mapper.h"
#include "ulp_fc_mgr.h"
#include <rte_malloc.h>
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#include "ulp_template_debug_proto.h"
+#endif
static int32_t
bnxt_ulp_flow_validate_args(const struct rte_flow_attr *attr,
@@ -130,6 +133,13 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
if (ret != BNXT_TF_RC_SUCCESS)
goto parse_error;
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ /* Dump the rte flow pattern */
+ ulp_parser_hdr_info_dump(¶ms);
+ /* Dump the rte flow action */
+ ulp_parser_act_info_dump(¶ms);
+#endif
+
ret = ulp_matcher_pattern_match(¶ms, &class_id);
if (ret != BNXT_TF_RC_SUCCESS)
goto parse_error;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
index 051a095..ef685ee 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
@@ -18,6 +18,11 @@
#include "ulp_mapper.h"
#include "tf_util.h"
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#include "ulp_template_debug_proto.h"
+#include "ulp_tf_debug.h"
+#endif
+
static struct bnxt_ulp_glb_resource_info *
ulp_mapper_glb_resource_info_list_get(uint32_t *num_entries)
{
@@ -102,7 +107,7 @@ ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx,
rc = tf_alloc_identifier(tfp, &iparms);
if (rc) {
BNXT_TF_DBG(ERR, "Failed to alloc identifier [%s][%d]\n",
- (iparms.dir == TF_DIR_RX) ? "RX" : "TX",
+ tf_dir_2_str(iparms.dir),
iparms.ident_type);
return rc;
}
@@ -120,6 +125,11 @@ ulp_mapper_resource_ident_allocate(struct bnxt_ulp_context *ulp_ctx,
tf_free_identifier(tfp, &fparms);
return rc;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_TF_DBG(DEBUG, "Allocated Glb Res Ident [%s][%d][%d] = 0x%04x\n",
+ tf_dir_2_str(iparms.dir),
+ glb_res->glb_regfile_index, iparms.ident_type, iparms.id);
+#endif
return rc;
}
@@ -160,8 +170,7 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx,
rc = tf_alloc_tbl_entry(tfp, &aparms);
if (rc) {
BNXT_TF_DBG(ERR, "Failed to alloc identifier [%s][%d]\n",
- (aparms.dir == TF_DIR_RX) ? "RX" : "TX",
- aparms.type);
+ tf_dir_2_str(aparms.dir), aparms.type);
return rc;
}
@@ -178,6 +187,11 @@ ulp_mapper_resource_index_tbl_alloc(struct bnxt_ulp_context *ulp_ctx,
tf_free_tbl_entry(tfp, &free_parms);
return rc;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_TF_DBG(DEBUG, "Allocated Glb Res Index [%s][%d][%d] = 0x%04x\n",
+ tf_dir_2_str(aparms.dir),
+ glb_res->glb_regfile_index, aparms.type, aparms.idx);
+#endif
return rc;
}
@@ -484,8 +498,7 @@ ulp_mapper_cache_entry_free(struct bnxt_ulp_context *ulp,
if (rc)
BNXT_TF_DBG(ERR, "Failed to free tcam [%d][%s][0x%04x] rc=%d\n",
table_type,
- (res->direction == TF_DIR_RX) ? "RX" : "TX",
- tcam_parms.idx, rc);
+ tf_dir_2_str(res->direction), tcam_parms.idx, rc);
/*
* Free the identifiers associated with the tcam entry. Entries with
@@ -503,7 +516,7 @@ ulp_mapper_cache_entry_free(struct bnxt_ulp_context *ulp,
BNXT_TF_DBG(ERR, "Failed to free identifier "
"[%d][%s][0x%04x] rc=%d\n",
ident_parms.ident_type,
- (res->direction == TF_DIR_RX) ? "RX" : "TX",
+ tf_dir_2_str(res->direction),
ident_parms.id, trc);
rc = trc;
}
@@ -625,11 +638,13 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms,
rc = tf_alloc_identifier(tfp, &iparms);
if (rc) {
- BNXT_TF_DBG(ERR, "Alloc ident %s:%d failed.\n",
- (iparms.dir == TF_DIR_RX) ? "RX" : "TX",
- iparms.ident_type);
+ BNXT_TF_DBG(ERR, "Alloc ident %s: failed.\n",
+ tf_dir_2_str(iparms.dir));
return rc;
}
+ BNXT_TF_INF("Alloc ident %s:%s.success.\n",
+ tf_dir_2_str(iparms.dir),
+ tf_tbl_type_2_str(iparms.ident_type));
id = (uint64_t)tfp_cpu_to_be_64(iparms.id);
if (!ulp_regfile_write(parms->regfile, idx, id)) {
@@ -662,6 +677,10 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms,
*val = iparms.id;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ ulp_mapper_ident_field_dump("Ident", ident, tbl, iparms.id);
+#endif
+
return 0;
error:
@@ -674,7 +693,7 @@ ulp_mapper_ident_process(struct bnxt_ulp_mapper_parms *parms,
BNXT_TF_DBG(ERR, "Ident process failed for %s:%s\n",
ident->description,
- (tbl->direction == TF_DIR_RX) ? "RX" : "TX");
+ tf_dir_2_str(tbl->direction));
return rc;
}
@@ -725,7 +744,7 @@ ulp_mapper_ident_extract(struct bnxt_ulp_mapper_parms *parms,
sparms.search_id);
return rc;
}
- BNXT_TF_DBG(INFO, "Search ident %s:%x.success.\n",
+ BNXT_TF_INF("Search ident %s:%x.success.\n",
tf_dir_2_str(sparms.dir),
sparms.search_id);
@@ -782,6 +801,9 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
{
uint16_t idx, size_idx;
uint8_t *val = NULL;
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ uint16_t write_idx = blob->write_idx;
+#endif
uint64_t regval;
uint32_t val_size = 0, field_size = 0;
uint64_t act_bit;
@@ -1006,6 +1028,11 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms,
fld->result_opcode);
return -EINVAL;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ if (fld->result_opcode != BNXT_ULP_MAPPER_OPC_SET_TO_ZERO)
+ ulp_mapper_result_field_dump(name, fld, blob,
+ write_idx, val, val_size);
+#endif
return 0;
}
@@ -1140,6 +1167,10 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
break;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ if (opcode != BNXT_ULP_MAPPER_OPC_SET_TO_ZERO)
+ ulp_mapper_key_fld_dump(name, fld, blob, val);
+#endif
return 0;
}
@@ -1452,12 +1483,14 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
rc = tf_set_tcam_entry(tfp, &sparms);
if (rc) {
- BNXT_TF_DBG(ERR, "tcam[%d][%s][%d] write failed.\n",
- sparms.tcam_tbl_type,
- (sparms.dir == TF_DIR_RX) ? "RX" : "TX",
- sparms.idx);
+ BNXT_TF_DBG(ERR, "tcam[%s][%s][%x] write failed.\n",
+ tf_tcam_tbl_2_str(sparms.tcam_tbl_type),
+ tf_dir_2_str(sparms.dir), sparms.idx);
goto error;
}
+ BNXT_TF_INF("tcam[%s][%s][%x] write success.\n",
+ tf_tcam_tbl_2_str(sparms.tcam_tbl_type),
+ tf_dir_2_str(sparms.dir), sparms.idx);
/* Update cache with TCAM index if the was cache allocated. */
if (parms->tcam_tbl_opc ==
@@ -1475,6 +1508,10 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
if (rc)
goto error;
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ ulp_mapper_tcam_entry_dump("TCAM", aparms.idx, tbl,
+ &key, &mask, &data);
+#endif
} else {
struct bnxt_ulp_mapper_ident_info *idents;
uint32_t num_idents;
@@ -1611,6 +1648,9 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
return rc;
}
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ ulp_mapper_result_dump("EEM Result", tbl, &data);
+#endif
/* do the transpose for the internal EM keys */
if (tbl->resource_func == BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE)
@@ -1641,6 +1681,10 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
return rc;
}
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ ulp_mapper_em_dump("EM", &key, &data, &iparms);
+ /* tf_dump_tables(tfp, iparms.tbl_scope_id); */
+#endif
/* Mark action process */
if (mtype == BNXT_ULP_FLOW_MEM_TYPE_EXT &&
tbl->resource_type == TF_MEM_EXTERNAL)
@@ -1761,6 +1805,10 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
/* if encap bit swap is enabled perform the bit swap */
if (parms->device_params->encap_byte_swap && encap_flds) {
ulp_blob_perform_encap_swap(&data);
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_TF_DBG(INFO, "Dump after encap swap\n");
+ ulp_mapper_blob_dump(&data);
+#endif
}
/*
@@ -1790,13 +1838,15 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
rc = tf_set_tbl_entry(tfp, &sparms);
if (rc) {
BNXT_TF_DBG(ERR,
- "Glbl Set table[%d][%s][%d] failed rc=%d\n",
- sparms.type,
- (sparms.dir == TF_DIR_RX) ? "RX" : "TX",
- sparms.idx,
- rc);
+ "Glbl Index table[%s][%s][%x] failed rc=%d\n",
+ tf_tbl_type_2_str(sparms.type),
+ tf_dir_2_str(sparms.dir),
+ sparms.idx, rc);
return rc;
}
+ BNXT_TF_INF("Glbl Index table[%s][%s][%x] success.\n",
+ tf_tbl_type_2_str(sparms.type),
+ tf_dir_2_str(sparms.dir), sparms.idx);
return 0; /* success */
}
@@ -1811,10 +1861,9 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
/* All failures after the alloc succeeds require a free */
rc = tf_alloc_tbl_entry(tfp, &aparms);
if (rc) {
- BNXT_TF_DBG(ERR, "Alloc table[%d][%s] failed rc=%d\n",
- aparms.type,
- (aparms.dir == TF_DIR_RX) ? "RX" : "TX",
- rc);
+ BNXT_TF_DBG(ERR, "Alloc table[%s][%s] failed rc=%d\n",
+ tf_tbl_type_2_str(aparms.type),
+ tf_dir_2_str(aparms.dir), rc);
return rc;
}
@@ -1850,13 +1899,15 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
rc = tf_set_tbl_entry(tfp, &sparms);
if (rc) {
- BNXT_TF_DBG(ERR, "Set table[%d][%s][%d] failed rc=%d\n",
- sparms.type,
- (sparms.dir == TF_DIR_RX) ? "RX" : "TX",
- sparms.idx,
- rc);
+ BNXT_TF_DBG(ERR, "Set table[%s][%s][%x] failed rc=%d\n",
+ tf_tbl_type_2_str(sparms.type),
+ tf_dir_2_str(sparms.dir),
+ sparms.idx, rc);
goto error;
}
+ BNXT_TF_INF("Index set table[%s][%s][%x] passed\n",
+ tf_tbl_type_2_str(sparms.type),
+ tf_dir_2_str(sparms.dir), sparms.idx);
}
/* Link the resource to the flow in the flow db */
@@ -1960,6 +2011,9 @@ ulp_mapper_cache_tbl_process(struct bnxt_ulp_mapper_parms *parms,
(tbl->resource_sub_type << 1 |
(tbl->direction & 0x1)),
*ckey);
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ BNXT_TF_DBG(DEBUG, "The cache key is (0x%04x)\n", *ckey);
+#endif
/*
* Get the identifier list for processing by both the hit and miss
@@ -2005,6 +2059,11 @@ ulp_mapper_cache_tbl_process(struct bnxt_ulp_mapper_parms *parms,
"Failed to write to regfile\n");
return -EINVAL;
}
+ BNXT_TF_INF("Ident [%s]:[%s]:[0x%04x]:%x\n",
+ tf_dir_2_str(tbl->direction),
+ tf_ident_2_str(idents[i].ident_type),
+ cache_entry->tcam_idx,
+ cache_entry->idents[i]);
}
/*
* The cached entry is being used, so let the tcam processing
@@ -2120,13 +2179,16 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,
rc = tf_set_if_tbl_entry(tfp, &iftbl_params);
if (rc) {
- BNXT_TF_DBG(ERR, "Set table[%d][%s][%d] failed rc=%d\n",
- iftbl_params.type,
- (iftbl_params.dir == TF_DIR_RX) ? "RX" : "TX",
- iftbl_params.idx,
- rc);
+ BNXT_TF_DBG(ERR, "Set table[%d][%s][%x] failed rc=%d\n",
+ iftbl_params.type,/* TBD: add tf_if_tbl_2_str */
+ tf_dir_2_str(iftbl_params.dir),
+ iftbl_params.idx, rc);
return rc;
}
+ BNXT_TF_INF("Set table[%s][%s][%x] success.\n",
+ tf_if_tbl_2_str(iftbl_params.type),
+ tf_dir_2_str(iftbl_params.dir),
+ iftbl_params.idx);
/*
* TBD: Need to look at the need to store idx in flow db for restore
diff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
index 9112647..b87705a 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
@@ -6,6 +6,10 @@
#include "ulp_matcher.h"
#include "ulp_utils.h"
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#include "ulp_template_debug_proto.h"
+#endif
+
/* Utility function to calculate the class matcher hash */
static uint32_t
ulp_matcher_class_hash_calculate(uint64_t hi_sig, uint64_t lo_sig)
diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c
index 0fc7c0a..eee2860 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c
@@ -9,6 +9,10 @@
#include "bnxt_tf_common.h"
#include "ulp_port_db.h"
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#include "ulp_tf_debug.h"
+#endif
+
static uint32_t
ulp_port_db_allocate_ifindex(struct bnxt_ulp_port_db *port_db)
{
@@ -193,7 +197,9 @@ int32_t ulp_port_db_dev_port_intf_update(struct bnxt_ulp_context *ulp_ctxt,
port_data->port_vport = bnxt_get_vport(port_id);
port_data->port_valid = true;
}
-
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+ ulp_port_db_dump(port_db, intf, port_id);
+#endif
return 0;
}
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_debug.c b/drivers/net/bnxt/tf_ulp/ulp_template_debug.c
new file mode 100644
index 0000000..5f07bef
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_debug.c
@@ -0,0 +1,595 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2019 Broadcom
+ * All rights reserved.
+ */
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+#include "bnxt.h"
+#include "ulp_utils.h"
+#include "ulp_template_db_enum.h"
+#include "ulp_template_struct.h"
+#include "ulp_template_debug.h"
+#include "ulp_template_debug_proto.h"
+#include "bnxt_tf_common.h"
+
+/* #define RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_DETAIL 1 */
+
+const char *ulp_rte_hdr_comp_field_names[] = {
+ "BNXT_ULP_CF_IDX_NOT_USED",
+ "BNXT_ULP_CF_IDX_MPLS_TAG_NUM",
+ "BNXT_ULP_CF_IDX_O_VTAG_NUM",
+ "BNXT_ULP_CF_IDX_O_NO_VTAG",
+ "BNXT_ULP_CF_IDX_O_ONE_VTAG",
+ "BNXT_ULP_CF_IDX_O_TWO_VTAGS",
+ "BNXT_ULP_CF_IDX_I_VTAG_NUM",
+ "BNXT_ULP_CF_IDX_I_NO_VTAG",
+ "BNXT_ULP_CF_IDX_I_ONE_VTAG",
+ "BNXT_ULP_CF_IDX_I_TWO_VTAGS",
+ "BNXT_ULP_CF_IDX_INCOMING_IF",
+ "BNXT_ULP_CF_IDX_DIRECTION",
+ "BNXT_ULP_CF_IDX_SVIF_FLAG",
+ "BNXT_ULP_CF_IDX_O_L3",
+ "BNXT_ULP_CF_IDX_I_L3",
+ "BNXT_ULP_CF_IDX_O_L4",
+ "BNXT_ULP_CF_IDX_I_L4",
+ "BNXT_ULP_CF_IDX_DEV_PORT_ID",
+ "BNXT_ULP_CF_IDX_PMD_FUNC_SVIF",
+ "BNXT_ULP_CF_IDX_PMD_FUNC_SPIF",
+ "BNXT_ULP_CF_IDX_PMD_FUNC_PARIF",
+ "BNXT_ULP_CF_IDX_PMD_FUNC_VNIC",
+ "BNXT_ULP_CF_IDX_PMD_FUNC_PHY_PORT",
+ "BNXT_ULP_CF_IDX_VF_FUNC_SVIF",
+ "BNXT_ULP_CF_IDX_VF_FUNC_SPIF",
+ "BNXT_ULP_CF_IDX_VF_FUNC_PARIF",
+ "BNXT_ULP_CF_IDX_VF_FUNC_VNIC",
+ "BNXT_ULP_CF_IDX_PHY_PORT_SVIF",
+ "BNXT_ULP_CF_IDX_PHY_PORT_SPIF",
+ "BNXT_ULP_CF_IDX_PHY_PORT_PARIF",
+ "BNXT_ULP_CF_IDX_PHY_PORT_VPORT",
+ "BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG",
+ "BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG",
+ "BNXT_ULP_CF_IDX_ACT_DEC_TTL",
+ "BNXT_ULP_CF_IDX_ACT_T_DEC_TTL",
+ "BNXT_ULP_CF_IDX_ACT_PORT_IS_SET",
+ "BNXT_ULP_CF_IDX_ACT_PORT_TYPE",
+ "BNXT_ULP_CF_IDX_MATCH_PORT_TYPE",
+ "BNXT_ULP_CF_IDX_VF_TO_VF",
+ "BNXT_ULP_CF_IDX_LAST"
+};
+
+const char *ulp_rte_hdr_svif_names[] = {
+ "SVIF",
+};
+
+const char *ulp_rte_hdr_eth_field_names[] = {
+ "Dst Mac",
+ "Src Mac",
+ "Ether Type",
+};
+
+const char *ulp_rte_hdr_vlan_field_names[] = {
+ "Priority",
+ "Vlan Id",
+ "Vlan-Ether Type",
+};
+
+const char *ulp_rte_hdr_ipv4_field_names[] = {
+ "Version",
+ "Type of Service",
+ "Length",
+ "Fragment Id",
+ "Fragment Offset",
+ "TTL",
+ "Next Proto",
+ "Checksum",
+ "Src Addr",
+ "Dst Addr"
+};
+
+const char *ulp_rte_hdr_ipv6_field_names[] = {
+ "Flow",
+ "Length",
+ "Proto",
+ "Hop limits",
+ "Src Addr",
+ "Dst Addr"
+};
+
+const char *ulp_rte_hdr_udp_field_names[] = {
+ "Src Port",
+ "Dst Port",
+ "Length",
+ "Checksum"
+};
+
+const char *ulp_rte_hdr_vxlan_field_names[] = {
+ "Vxlan Flags",
+ "Reserved",
+ "VNI",
+ "Reserved"
+};
+
+const char *ulp_rte_hdr_tcp_field_names[] = {
+ "Src Port",
+ "Dst Port",
+ "Sent Seq",
+ "Recv Ack",
+ "Data Offset",
+ "Tcp flags",
+ "Rx Window",
+ "Checksum",
+ "URP",
+};
+
+/* Utility Function to dump a simple buffer of a given length. */
+static void dump_hex(uint8_t *ptr, uint32_t size)
+{
+ uint32_t i;
+ uint8_t lbuffer[1024];
+ uint8_t *lbuffer_ptr = lbuffer;
+ int32_t ret;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+ ret = sprintf((char *)lbuffer_ptr, "\t\t\t");
+ lbuffer_ptr += ret;
+ for (i = 0; i < size; i++, ptr++) {
+ if (i && !(i % 16)) {
+ ret = sprintf((char *)lbuffer_ptr, "\t\t\t\t");
+ lbuffer_ptr += ret;
+ }
+ ret = sprintf((char *)lbuffer_ptr, "0x%02x ", *ptr);
+ lbuffer_ptr += ret;
+ if ((i & 0x0F) == 0x0F) {
+ ret = sprintf((char *)lbuffer_ptr, "\n");
+ lbuffer_ptr += ret;
+ }
+ }
+ if (size & 0x0F)
+ sprintf((char *)lbuffer_ptr, "\n");
+ BNXT_TF_DBG(DEBUG, "%s", lbuffer);
+}
+
+/* Utility Function to dump the computed field properties */
+static void
+ulp_parser_comp_field_dump(struct ulp_rte_parser_params *params,
+ const char *field_names[],
+ uint32_t count_list)
+{
+ uint32_t idx = 0;
+
+ BNXT_TF_DBG(DEBUG, "Default computed fields\n");
+ for (idx = 0; idx < count_list; idx++) {
+ BNXT_TF_DBG(DEBUG, "\t%s =\n", field_names[idx]);
+ dump_hex((uint8_t *)¶ms->comp_fld[idx], sizeof(uint32_t));
+ }
+}
+
+/* Utility Function to dump the field properties.*/
+static void
+ulp_parser_field_dump(struct ulp_rte_hdr_field *hdr_field,
+ const char *field_names[],
+ uint32_t start_idx,
+ uint32_t count_list)
+{
+ uint32_t f_idx = 0, idx = 0;
+
+ for (f_idx = start_idx; f_idx < (start_idx + count_list); f_idx++) {
+ if (hdr_field[f_idx].size) {
+ BNXT_TF_DBG(DEBUG, "\t%s =\n", field_names[idx]);
+ dump_hex(hdr_field[f_idx].spec, hdr_field[f_idx].size);
+ dump_hex(hdr_field[f_idx].mask, hdr_field[f_idx].size);
+ }
+ idx++;
+ }
+}
+
+/* Utility Function to dump the field properties.*/
+static inline void
+ulp_parser_vlan_dump(struct ulp_rte_hdr_field *hdr_field,
+ uint32_t f_idx)
+{
+ ulp_parser_field_dump(hdr_field, ulp_rte_hdr_vlan_field_names,
+ f_idx, BNXT_ULP_PROTO_HDR_S_VLAN_NUM);
+}
+
+/* Function to dump the Pattern header bitmaps and fields. */
+void
+ulp_parser_hdr_info_dump(struct ulp_rte_parser_params *params)
+{
+ uint32_t idx = 0, f_idx = 0;
+ uint32_t num_idx;
+ uint64_t hdr_bit;
+ struct ulp_rte_hdr_bitmap *hdr_bitmap = ¶ms->hdr_bitmap;
+ struct ulp_rte_hdr_field *hdr_field = params->hdr_field;
+
+ BNXT_TF_DBG(DEBUG, "Configured Header Protocols for matching\n");
+ if (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_FLOW_DIR_BITMASK_EGR))
+ BNXT_TF_DBG(DEBUG, "It is a Egress Flow - %x\n",
+ params->dir_attr);
+ else
+ BNXT_TF_DBG(DEBUG, "It is a Ingress Flow - %x\n",
+ params->dir_attr);
+ ulp_parser_comp_field_dump(params, ulp_rte_hdr_comp_field_names,
+ BNXT_ULP_CF_IDX_LAST);
+
+ num_idx = sizeof(bnxt_ulp_hdr_bit_names) /
+ sizeof(bnxt_ulp_hdr_bit_names[0]);
+
+ /* Print the svif details, there is no bitmap for this field */
+ ulp_parser_field_dump(hdr_field, ulp_rte_hdr_svif_names, f_idx,
+ BNXT_ULP_PROTO_HDR_SVIF_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_SVIF_NUM;
+
+ for (idx = 0; idx < num_idx; idx++) {
+ hdr_bit = 1UL << idx;
+ if (!ULP_BITMAP_ISSET(hdr_bitmap->bits, hdr_bit)) {
+ if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_OO_VLAN) ||
+ ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_OI_VLAN) ||
+ ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_IO_VLAN) ||
+ ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_II_VLAN)) {
+ f_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+ }
+ continue;
+ }
+
+ BNXT_TF_DBG(DEBUG, "%s\n", bnxt_ulp_hdr_bit_names[idx]);
+ if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_O_ETH)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_eth_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_ETH_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_ETH_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_I_ETH)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_eth_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_ETH_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_ETH_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_OO_VLAN)) {
+ ulp_parser_vlan_dump(hdr_field, f_idx);
+ f_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_OI_VLAN)) {
+ ulp_parser_vlan_dump(hdr_field, f_idx);
+ f_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_IO_VLAN)) {
+ ulp_parser_vlan_dump(hdr_field, f_idx);
+ f_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_II_VLAN)) {
+ ulp_parser_vlan_dump(hdr_field, f_idx);
+ f_idx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_O_IPV4)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_ipv4_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_IPV4_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_IPV4_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_O_IPV6)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_ipv6_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_IPV6_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_IPV6_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_O_UDP)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_udp_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_UDP_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_UDP_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit, BNXT_ULP_HDR_BIT_O_TCP)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_tcp_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_TCP_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_TCP_NUM;
+ } else if (ULP_BITMAP_ISSET(hdr_bit,
+ BNXT_ULP_HDR_BIT_T_VXLAN)) {
+ ulp_parser_field_dump(hdr_field,
+ ulp_rte_hdr_vxlan_field_names,
+ f_idx,
+ BNXT_ULP_PROTO_HDR_VXLAN_NUM);
+ f_idx += BNXT_ULP_PROTO_HDR_VXLAN_NUM;
+ }
+ }
+ BNXT_TF_DBG(DEBUG, "******************************************\n");
+}
+
+static void
+ulp_parser_action_prop_dump(struct ulp_rte_act_prop *act_prop,
+ uint32_t start_idx,
+ uint32_t dump_size)
+{
+ BNXT_TF_DBG(DEBUG, "\t%s =\n",
+ bnxt_ulp_rte_parser_action_prop_names[start_idx]);
+ dump_hex(&act_prop->act_details[start_idx], dump_size);
+}
+
+/* Function to dump the Action header bitmaps and properties. */
+void
+ulp_parser_act_info_dump(struct ulp_rte_parser_params *params)
+{
+ uint32_t idx = 0;
+ uint32_t num_idx = 0;
+ uint64_t act_bit;
+ struct ulp_rte_act_bitmap *act_bitmap = ¶ms->act_bitmap;
+ struct ulp_rte_act_prop *act_prop = ¶ms->act_prop;
+
+ BNXT_TF_DBG(DEBUG, "Configured actions for matching\n");
+ BNXT_TF_DBG(DEBUG, "Default computed fields\n");
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE,
+ BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_VNIC,
+ BNXT_ULP_ACT_PROP_SZ_VNIC);
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_VPORT,
+ BNXT_ULP_ACT_PROP_SZ_VPORT);
+
+ num_idx = sizeof(bnxt_ulp_action_bit_names) /
+ sizeof(bnxt_ulp_action_bit_names[0]);
+
+ for (idx = 0; idx < num_idx; idx++) {
+ enum bnxt_ulp_act_prop_idx tmp_act_p;
+ enum bnxt_ulp_act_prop_sz tmp_act_sz;
+
+ act_bit = 1UL << idx;
+ if (!ULP_BITMAP_ISSET(act_bitmap->bits, act_bit))
+ continue;
+
+ BNXT_TF_DBG(DEBUG, "%s\n", bnxt_ulp_action_bit_names[idx]);
+ if (ULP_BITMAP_ISSET(act_bit, BNXT_ULP_ACTION_BIT_MARK)) {
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_MARK,
+ BNXT_ULP_ACT_PROP_SZ_MARK);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_VXLAN_ENCAP)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_IDX_LAST -
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC;
+ printf("size %d and %d\n", tmp_act_p, tmp_act_sz);
+ ulp_parser_action_prop_dump(act_prop, tmp_act_p,
+ tmp_act_sz);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_COUNT)) {
+ ulp_parser_action_prop_dump(act_prop,
+ BNXT_ULP_ACT_PROP_IDX_COUNT,
+ BNXT_ULP_ACT_PROP_SZ_COUNT);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_PUSH_VLAN)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN;
+ ulp_parser_action_prop_dump(act_prop,
+ tmp_act_p,
+ tmp_act_sz);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_SET_IPV4_SRC)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC;
+ ulp_parser_action_prop_dump(act_prop,
+ tmp_act_p,
+ tmp_act_sz);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_SET_IPV4_DST)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST;
+ ulp_parser_action_prop_dump(act_prop,
+ tmp_act_p,
+ tmp_act_sz);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_SET_TP_SRC)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC;
+ ulp_parser_action_prop_dump(act_prop,
+ tmp_act_p,
+ tmp_act_sz);
+ } else if (ULP_BITMAP_ISSET(act_bit,
+ BNXT_ULP_ACTION_BIT_SET_TP_DST)) {
+ tmp_act_p = BNXT_ULP_ACT_PROP_IDX_SET_TP_DST;
+ tmp_act_sz = BNXT_ULP_ACT_PROP_SZ_SET_TP_DST;
+ ulp_parser_action_prop_dump(act_prop,
+ tmp_act_p,
+ tmp_act_sz);
+ }
+ }
+ BNXT_TF_DBG(DEBUG, "******************************************\n");
+}
+
+/* Function to dump the error field during matching. */
+void
+ulp_matcher_act_field_dump(uint32_t idx,
+ uint32_t jdx,
+ uint32_t mask_id)
+{
+ BNXT_TF_DBG(DEBUG, "Match failed template=%d,field=%s,mask=%s\n",
+ idx,
+ bnxt_ulp_rte_template_field_names[(jdx +
+ (idx + 1) * 1)],
+ bnxt_ulp_flow_matcher_field_mask_opcode_names[mask_id]);
+}
+
+/* Function to dump the blob during the mapper processing. */
+void
+ulp_mapper_result_field_dump(const char *name,
+ struct bnxt_ulp_mapper_result_field_info *fld,
+ struct ulp_blob *blob,
+ uint16_t write_idx,
+ uint8_t *val,
+ uint32_t field_size)
+{
+ uint32_t len = 0, slen = 0;
+ uint8_t lbuffer[64];
+ uint8_t *lbuffer_ptr = lbuffer;
+ uint32_t ret = 0, idx = 0;
+ uint32_t p_size;
+
+ if (!val || !blob)
+ return;
+
+ if (fld->result_opcode == BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ)
+ slen = field_size;
+ else
+ slen = fld->field_bit_size;
+
+ if (slen % 8)
+ len = (slen / 8) + 1;
+ else
+ len = (slen / 8);
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+ while (len > 0 && idx < 32) {
+ ret = sprintf((char *)lbuffer_ptr, "%02x", val[idx]);
+ lbuffer_ptr += ret;
+ len--;
+ idx++;
+ }
+
+ BNXT_TF_DBG(DEBUG,
+ "%-16s %-20s, bits = %-3d and pos = %-3d val = 0x%s\n",
+ name, fld->description, slen, write_idx, lbuffer);
+ p_size = (write_idx + slen + 7) / 8;
+ dump_hex((uint8_t *)blob->data, p_size);
+}
+
+/* Function to dump the blob during the mapper processing. */
+void
+ulp_mapper_key_fld_dump(const char *name,
+ struct bnxt_ulp_mapper_class_key_field_info *fld,
+ struct ulp_blob *blob,
+ uint8_t *val)
+{
+ uint32_t len = fld->field_bit_size / 8;
+ uint8_t lbuffer[64];
+ uint8_t *lbuffer_ptr = lbuffer;
+ uint32_t ret = 0, idx = 0;
+
+ if (!val)
+ return;
+
+ /* The value was already written, so calculate the write_idx. */
+ uint16_t write_idx = blob->write_idx - fld->field_bit_size;
+
+ if (fld->field_bit_size % 8)
+ len++;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+ while (len > 0 && idx < 32) {
+ ret = sprintf((char *)lbuffer_ptr, "%02x", val[idx]);
+ lbuffer_ptr += ret;
+ len--;
+ idx++;
+ }
+
+ BNXT_TF_DBG(DEBUG, "%-16s %-20s, bits = %-3d pos = %-3d val = 0x%s\n",
+ name, fld->description, fld->field_bit_size,
+ write_idx, lbuffer);
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_DETAIL
+ dump_hex((uint8_t *)blob->data, 16);
+#endif
+}
+
+void
+ulp_mapper_ident_field_dump(const char *name,
+ struct bnxt_ulp_mapper_ident_info *ident,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ int32_t id)
+{
+ BNXT_TF_DBG(DEBUG, "%-16s alloc %-16s, dir= %s, id = 0x%x\n",
+ name, ident->description,
+ (tbl->direction == TF_DIR_RX) ? "RX" : "TX", id);
+}
+
+void
+ulp_mapper_tcam_entry_dump(const char *name,
+ uint32_t idx,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *key,
+ struct ulp_blob *mask,
+ struct ulp_blob *result)
+{
+ BNXT_TF_DBG(DEBUG, "%-16s [%s][0x%0x],keysz=%-3d resultsz=%-3d\n",
+ name,
+ (tbl->direction == TF_DIR_RX) ? "RX" : "TX",
+ idx, key->write_idx, result->write_idx);
+ dump_hex((uint8_t *)key->data, (key->bitlen + 7) / 8);
+ dump_hex((uint8_t *)mask->data, (key->bitlen + 7) / 8);
+ dump_hex((uint8_t *)result->data, (key->bitlen + 7) / 8);
+}
+
+void
+ulp_mapper_result_dump(const char *name,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *result)
+{
+ BNXT_TF_DBG(DEBUG, "%-16s [%s], bitlen=%-3d\n",
+ name,
+ (tbl->direction == TF_DIR_RX) ? "RX" : "TX",
+ result->write_idx);
+ dump_hex((uint8_t *)result->data, (result->bitlen + 7) / 8);
+}
+
+void
+ulp_mapper_act_dump(const char *name,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *data)
+{
+ BNXT_TF_DBG(DEBUG, "%-16s [%s], bitlen=%-3d\n",
+ name,
+ (tbl->direction == TF_DIR_RX) ? "RX" : "TX",
+ data->write_idx);
+ dump_hex((uint8_t *)data->data, (data->bitlen + 7) / 8);
+}
+
+void
+ulp_mapper_em_dump(const char *name,
+ struct ulp_blob *key,
+ struct ulp_blob *data,
+ struct tf_insert_em_entry_parms *iparms)
+{
+ BNXT_TF_DBG(DEBUG, "%s ins %s[%s] scope=0x%02x keysz=%d recsz=%d\n",
+ name,
+ (iparms->mem == TF_MEM_EXTERNAL) ? "EXT" : "INT",
+ (iparms->dir == TF_DIR_RX) ? "RX" : "TX",
+ iparms->tbl_scope_id,
+ iparms->key_sz_in_bits,
+ iparms->em_record_sz_in_bits);
+
+ BNXT_TF_DBG(DEBUG, "FlowHdl=0x%016" PRIx64 " FlowID=0x%016" PRIx64 "\n",
+ iparms->flow_handle, iparms->flow_id);
+
+ BNXT_TF_DBG(DEBUG, "Key Size %d, Data Size %d\n",
+ key->write_idx, data->write_idx);
+
+ dump_hex(iparms->key, (key->write_idx + 7) / 8);
+ dump_hex(iparms->em_record, (data->write_idx + 7) / 8);
+}
+
+void
+ulp_mapper_blob_dump(struct ulp_blob *blob)
+{
+ dump_hex(blob->data, (blob->write_idx + 7) / 8);
+}
+
+#endif /* RTE_LIBRTE_BNXT_TRUFLOW_DEBUG */
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_debug.h b/drivers/net/bnxt/tf_ulp/ulp_template_debug.h
new file mode 100644
index 0000000..706562b
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_debug.h
@@ -0,0 +1,329 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2019 Broadcom
+ * All rights reserved.
+ */
+
+#ifndef ULP_TEMPLATE_DEBUG_H_
+#define ULP_TEMPLATE_DEBUG_H_
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+
+/*
+ * THIS FILE IS AUTOGENERATED AND MUST NOT BE MODIFIED WITHOUT FEEDING BACK
+ * TO THE TEMPLATE COMPILER.
+ */
+
+const char *bnxt_ulp_hdr_bit_names[] = {
+ "BNXT_ULP_HDR_BIT_O_ETH",
+ "BNXT_ULP_HDR_BIT_OO_VLAN",
+ "BNXT_ULP_HDR_BIT_OI_VLAN",
+ "BNXT_ULP_HDR_BIT_O_IPV4",
+ "BNXT_ULP_HDR_BIT_O_IPV6",
+ "BNXT_ULP_HDR_BIT_O_TCP",
+ "BNXT_ULP_HDR_BIT_O_UDP",
+ "BNXT_ULP_HDR_BIT_T_VXLAN",
+ "BNXT_ULP_HDR_BIT_T_GRE",
+ "BNXT_ULP_HDR_BIT_I_ETH",
+ "BNXT_ULP_HDR_BIT_IO_VLAN",
+ "BNXT_ULP_HDR_BIT_II_VLAN",
+ "BNXT_ULP_HDR_BIT_I_IPV4",
+ "BNXT_ULP_HDR_BIT_I_IPV6",
+ "BNXT_ULP_HDR_BIT_I_TCP",
+ "BNXT_ULP_HDR_BIT_I_UDP",
+ "BNXT_ULP_HDR_PROTO_LAST",
+};
+
+const char *bnxt_ulp_action_bit_names[] = {
+ "BNXT_ULP_ACTION_BIT_MARK",
+ "BNXT_ULP_ACTION_BIT_DROP",
+ "BNXT_ULP_ACTION_BIT_COUNT",
+ "BNXT_ULP_ACTION_BIT_RSS",
+ "BNXT_ULP_ACTION_BIT_METER",
+ "BNXT_ULP_ACTION_BIT_VXLAN_DECAP",
+ "BNXT_ULP_ACTION_BIT_NVGRE_DECAP",
+ "BNXT_ULP_ACTION_BIT_OF_POP_MPLS",
+ "BNXT_ULP_ACTION_BIT_OF_PUSH_MPLS",
+ "BNXT_ULP_ACTION_BIT_MAC_SWAP",
+ "BNXT_ULP_ACTION_BIT_SET_MAC_SRC",
+ "BNXT_ULP_ACTION_BIT_SET_MAC_DST",
+ "BNXT_ULP_ACTION_BIT_POP_VLAN",
+ "BNXT_ULP_ACTION_BIT_PUSH_VLAN",
+ "BNXT_ULP_ACTION_BIT_SET_VLAN_PCP",
+ "BNXT_ULP_ACTION_BIT_SET_VLAN_VID",
+ "BNXT_ULP_ACTION_BIT_SET_IPV4_SRC",
+ "BNXT_ULP_ACTION_BIT_SET_IPV4_DST",
+ "BNXT_ULP_ACTION_BIT_SET_IPV6_SRC",
+ "BNXT_ULP_ACTION_BIT_SET_IPV6_DST",
+ "BNXT_ULP_ACTION_BIT_DEC_TTL",
+ "BNXT_ULP_ACTION_BIT_SET_TP_SRC",
+ "BNXT_ULP_ACTION_BIT_SET_TP_DST",
+ "BNXT_ULP_ACTION_BIT_VXLAN_ENCAP",
+ "BNXT_ULP_ACTION_BIT_NVGRE_ENCAP",
+ "BNXT_ULP_ACTION_BIT_LAST"
+};
+
+const char *bnxt_ulp_rte_parser_action_prop_names[] = {
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE",
+ [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] =
+ "BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM",
+ [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] =
+ "BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM",
+ [BNXT_ULP_ACT_PROP_IDX_PORT_ID] =
+ "BNXT_ULP_ACT_PROP_IDX_PORT_ID",
+ [BNXT_ULP_ACT_PROP_IDX_VNIC] =
+ "BNXT_ULP_ACT_PROP_IDX_VNIC",
+ [BNXT_ULP_ACT_PROP_IDX_VPORT] =
+ "BNXT_ULP_ACT_PROP_IDX_VPORT",
+ [BNXT_ULP_ACT_PROP_IDX_MARK] =
+ "BNXT_ULP_ACT_PROP_IDX_MARK",
+ [BNXT_ULP_ACT_PROP_IDX_COUNT] =
+ "BNXT_ULP_ACT_PROP_IDX_COUNT",
+ [BNXT_ULP_ACT_PROP_IDX_METER] =
+ "BNXT_ULP_ACT_PROP_IDX_METER",
+ [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC",
+ [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST",
+ [BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN] =
+ "BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN",
+ [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP",
+ [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID",
+ [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC",
+ [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST",
+ [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC",
+ [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST",
+ [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC",
+ [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] =
+ "BNXT_ULP_ACT_PROP_IDX_SET_TP_DST",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6",
+ [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] =
+ "BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_IP",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP",
+ [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
+ "BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN",
+ [BNXT_ULP_ACT_PROP_IDX_LAST] =
+ "BNXT_ULP_ACT_PROP_IDX_LAST"
+};
+
+const char *bnxt_ulp_flow_matcher_field_mask_opcode_names[] = {
+ "MASK_IGNORE",
+ "MASK_ANY",
+ "MASK_EXACT",
+ "MASK_WC",
+ "MASK_LAST",
+};
+
+const char *bnxt_ulp_rte_template_field_names[] = {
+ /* Ingress Template 0 */
+ "BNXT_ULP_HF0_SVIF_INDEX",
+ "BNXT_ULP_HF0_O_ETH_DMAC",
+ "BNXT_ULP_HF0_O_ETH_SMAC",
+ "BNXT_ULP_HF0_O_ETH_TYPE",
+ "BNXT_ULP_HF0_OO_VLAN_CFI_PRI",
+ "BNXT_ULP_HF0_OO_VLAN_VID",
+ "BNXT_ULP_HF0_OO_VLAN_TYPE",
+ "BNXT_ULP_HF0_OI_VLAN_CFI_PRI",
+ "BNXT_ULP_HF0_OI_VLAN_VID",
+ "BNXT_ULP_HF0_OI_VLAN_TYPE",
+ "BNXT_ULP_HF0_O_IPV4_VER",
+ "BNXT_ULP_HF0_O_IPV4_TOS",
+ "BNXT_ULP_HF0_O_IPV4_LEN",
+ "BNXT_ULP_HF0_O_IPV4_FRAG_ID",
+ "BNXT_ULP_HF0_O_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF0_O_IPV4_TTL",
+ "BNXT_ULP_HF0_O_IPV4_NEXT_PID",
+ "BNXT_ULP_HF0_O_IPV4_CSUM",
+ "BNXT_ULP_HF0_O_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF0_O_IPV4_DST_ADDR",
+ "BNXT_ULP_HF0_O_UDP_SRC_PORT",
+ "BNXT_ULP_HF0_O_UDP_DST_PORT",
+ "BNXT_ULP_HF0_O_UDP_LENGTH",
+ "BNXT_ULP_HF0_O_UDP_CSUM",
+ "BNXT_ULP_HF0_VXLAN_FLAGS",
+ "BNXT_ULP_HF0_VXLAN_RSVD0",
+ "BNXT_ULP_HF0_VXLAN_VNI",
+ "BNXT_ULP_HF0_VXLAN_RSVD1",
+ "BNXT_ULP_HF0_I_ETH_DMAC",
+ "BNXT_ULP_HF0_I_ETH_SMAC",
+ "BNXT_ULP_HF0_I_ETH_TYPE",
+ "BNXT_ULP_HF0_IO_VLAN_CFI_PRI",
+ "BNXT_ULP_HF0_IO_VLAN_VID",
+ "BNXT_ULP_HF0_IO_VLAN_TYPE",
+ "BNXT_ULP_HF0_II_VLAN_CFI_PRI",
+ "BNXT_ULP_HF0_II_VLAN_VID",
+ "BNXT_ULP_HF0_II_VLAN_TYPE",
+ "BNXT_ULP_HF0_I_IPV4_VER",
+ "BNXT_ULP_HF0_I_IPV4_TOS",
+ "BNXT_ULP_HF0_I_IPV4_LEN",
+ "BNXT_ULP_HF0_I_IPV4_FRAG_ID",
+ "BNXT_ULP_HF0_I_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF0_I_IPV4_TTL",
+ "BNXT_ULP_HF0_I_IPV4_NEXT_PID",
+ "BNXT_ULP_HF0_I_IPV4_CSUM",
+ "BNXT_ULP_HF0_I_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF0_I_IPV4_DST_ADDR",
+ "BNXT_ULP_HF0_I_TCP_SRC_PORT",
+ "BNXT_ULP_HF0_I_TCP_DST_PORT",
+ "BNXT_ULP_HF0_I_TCP_SENT_SEQ",
+ "BNXT_ULP_HF0_I_TCP_RECV_ACK",
+ "BNXT_ULP_HF0_I_TCP_DATA_OFF",
+ "BNXT_ULP_HF0_I_TCP_TCP_FLAGS",
+ "BNXT_ULP_HF0_I_TCP_RX_WIN",
+ "BNXT_ULP_HF0_I_TCP_CSUM",
+ "BNXT_ULP_HF0_I_TCP_UR",
+
+ /* Ingress template 1 */
+ "BNXT_ULP_HF1_MPLS_TAG_NUM",
+ "BNXT_ULP_HF1_O_VTAG_NUM",
+ "BNXT_ULP_HF1_I_VTAG_NUM",
+ "BNXT_ULP_HF1_SVIF_INDEX",
+ "BNXT_ULP_HF1_O_ETH_DMAC",
+ "BNXT_ULP_HF1_O_ETH_SMAC",
+ "BNXT_ULP_HF1_O_ETH_TYPE",
+ "BNXT_ULP_HF1_O_OVLAN_CFI_PRI",
+ "BNXT_ULP_HF1_O_OVLAN_VID",
+ "BNXT_ULP_HF1_O_OVLAN_TYPE",
+ "BNXT_ULP_HF1_O_IVLAN_CFI_PRI",
+ "BNXT_ULP_HF1_O_IVLAN_VID",
+ "BNXT_ULP_HF1_O_IVLAN_TYPE",
+ "BNXT_ULP_HF1_O_IPV4_VER",
+ "BNXT_ULP_HF1_O_IPV4_TOS",
+ "BNXT_ULP_HF1_O_IPV4_LEN",
+ "BNXT_ULP_HF1_O_IPV4_FRAG_ID",
+ "BNXT_ULP_HF1_O_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF1_O_IPV4_TTL",
+ "BNXT_ULP_HF1_O_IPV4_NEXT_PID",
+ "BNXT_ULP_HF1_O_IPV4_CSUM",
+ "BNXT_ULP_HF1_O_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF1_O_IPV4_DST_ADDR",
+ "BNXT_ULP_HF1_O_UDP_SRC_PORT",
+ "BNXT_ULP_HF1_O_UDP_DST_PORT",
+ "BNXT_ULP_HF1_O_UDP_LENGTH",
+ "BNXT_ULP_HF1_O_UDP_CSUM",
+ "BNXT_ULP_HF1_VXLAN_FLAGS",
+ "BNXT_ULP_HF1_VXLAN_RSVD0",
+ "BNXT_ULP_HF1_VXLAN_VNI",
+ "BNXT_ULP_HF1_VXLAN_RSVD1",
+ "BNXT_ULP_HF1_I_ETH_DMAC",
+ "BNXT_ULP_HF1_I_ETH_SMAC",
+ "BNXT_ULP_HF1_I_ETH_TYPE",
+ "BNXT_ULP_HF1_I_OVLAN_CFI_PRI",
+ "BNXT_ULP_HF1_I_OVLAN_VID",
+ "BNXT_ULP_HF1_I_OVLAN_TYPE",
+ "BNXT_ULP_HF1_I_IVLAN_CFI_PRI",
+ "BNXT_ULP_HF1_I_IVLAN_VID",
+ "BNXT_ULP_HF1_I_IVLAN_TYPE",
+ "BNXT_ULP_HF1_I_IPV4_VER",
+ "BNXT_ULP_HF1_I_IPV4_TOS",
+ "BNXT_ULP_HF1_I_IPV4_LEN",
+ "BNXT_ULP_HF1_I_IPV4_FRAG_ID",
+ "BNXT_ULP_HF1_I_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF1_I_IPV4_TTL",
+ "BNXT_ULP_HF1_I_IPV4_NEXT_PID",
+ "BNXT_ULP_HF1_I_IPV4_CSUM",
+ "BNXT_ULP_HF1_I_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF1_I_IPV4_DST_ADDR",
+ "BNXT_ULP_HF1_I_UDP_SRC_PORT",
+ "BNXT_ULP_HF1_I_UDP_DST_PORT",
+ "BNXT_ULP_HF1_I_UDP_UR",
+
+ /* Egress template 2 */
+ "BNXT_ULP_HF2_MPLS_TAG_NUM",
+ "BNXT_ULP_HF2_O_VTAG_NUM",
+ "BNXT_ULP_HF2_I_VTAG_NUM",
+ "BNXT_ULP_HF2_SVIF_INDEX",
+ "BNXT_ULP_HF2_O_ETH_DMAC",
+ "BNXT_ULP_HF2_O_ETH_SMAC",
+ "BNXT_ULP_HF2_O_ETH_TYPE",
+ "BNXT_ULP_HF2_O_OVLAN_CFI_PRI",
+ "BNXT_ULP_HF2_O_OVLAN_VID",
+ "BNXT_ULP_HF2_O_OVLAN_TYPE",
+ "BNXT_ULP_HF2_O_IVLAN_CFI_PRI",
+ "BNXT_ULP_HF2_O_IVLAN_VID",
+ "BNXT_ULP_HF2_O_IVLAN_TYPE",
+ "BNXT_ULP_HF2_O_IPV4_VER",
+ "BNXT_ULP_HF2_O_IPV4_TOS",
+ "BNXT_ULP_HF2_O_IPV4_LEN",
+ "BNXT_ULP_HF2_O_IPV4_FRAG_ID",
+ "BNXT_ULP_HF2_O_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF2_O_IPV4_TTL",
+ "BNXT_ULP_HF2_O_IPV4_NEXT_PID",
+ "BNXT_ULP_HF2_O_IPV4_CSUM",
+ "BNXT_ULP_HF2_O_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF2_O_IPV4_DST_ADDR",
+ "BNXT_ULP_HF2_O_UDP_SRC_PORT",
+ "BNXT_ULP_HF2_O_UDP_DST_PORT",
+ "BNXT_ULP_HF2_O_UDP_LENGTH",
+ "BNXT_ULP_HF2_O_UDP_CSUM",
+ "BNXT_ULP_HF2_VXLAN_FLAGS",
+ "BNXT_ULP_HF2_VXLAN_RSVD0",
+ "BNXT_ULP_HF2_VXLAN_VNI",
+ "BNXT_ULP_HF2_VXLAN_RSVD1",
+ "BNXT_ULP_HF2_I_ETH_DMAC",
+ "BNXT_ULP_HF2_I_ETH_SMAC",
+ "BNXT_ULP_HF2_I_ETH_TYPE",
+ "BNXT_ULP_HF2_I_OVLAN_CFI_PRI",
+ "BNXT_ULP_HF2_I_OVLAN_VID",
+ "BNXT_ULP_HF2_I_OVLAN_TYPE",
+ "BNXT_ULP_HF2_I_IVLAN_CFI_PRI",
+ "BNXT_ULP_HF2_I_IVLAN_VID",
+ "BNXT_ULP_HF2_I_IVLAN_TYPE",
+ "BNXT_ULP_HF2_I_IPV4_VER",
+ "BNXT_ULP_HF2_I_IPV4_TOS",
+ "BNXT_ULP_HF2_I_IPV4_LEN",
+ "BNXT_ULP_HF2_I_IPV4_FRAG_ID",
+ "BNXT_ULP_HF2_I_IPV4_FRAG_OFF",
+ "BNXT_ULP_HF2_I_IPV4_TTL",
+ "BNXT_ULP_HF2_I_IPV4_NEXT_PID",
+ "BNXT_ULP_HF2_I_IPV4_CSUM",
+ "BNXT_ULP_HF2_I_IPV4_SRC_ADDR",
+ "BNXT_ULP_HF2_I_IPV4_DST_ADDR",
+ "BNXT_ULP_HF2_I_UDP_SRC_PORT",
+ "BNXT_ULP_HF2_I_UDP_DST_PORT",
+ "BNXT_ULP_HF2_I_UDP_UR",
+};
+
+#endif /* RTE_LIBRTE_BNXT_TRUFLOW_DEBUG */
+#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_debug_proto.h b/drivers/net/bnxt/tf_ulp/ulp_template_debug_proto.h
new file mode 100644
index 0000000..6148f58
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_debug_proto.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2019 Broadcom
+ * All rights reserved.
+ **/
+
+#ifndef ULP_TEMPLATE_DEBUG_PROTO_H_
+#define ULP_TEMPLATE_DEBUG_PROTO_H_
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+
+/* Function to dump the rte flow pattern. */
+void
+ulp_parser_hdr_info_dump(struct ulp_rte_parser_params *params);
+
+/* Function to dump the rte flow actions. */
+void
+ulp_parser_act_info_dump(struct ulp_rte_parser_params *params);
+
+/* Function to dump the error field during matching. */
+void
+ulp_matcher_act_field_dump(uint32_t idx,
+ uint32_t jdx,
+ uint32_t mask_id);
+
+/* * Function to dump the blob during the mapper processing. */
+void
+ulp_mapper_result_field_dump(const char *name,
+ struct bnxt_ulp_mapper_result_field_info *fld,
+ struct ulp_blob *blob,
+ uint16_t write_idx,
+ uint8_t *val,
+ uint32_t field_size);
+/* Function to dump the blob during the mapper processing. */
+void
+ulp_mapper_key_fld_dump(const char *name,
+ struct bnxt_ulp_mapper_class_key_field_info *fld,
+ struct ulp_blob *blob,
+ uint8_t *val);
+/* Function to dump the identifiers during the mapper processing. */
+void
+ulp_mapper_ident_field_dump(const char *name,
+ struct bnxt_ulp_mapper_ident_info *ident,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ int32_t id);
+void
+ulp_mapper_tcam_entry_dump(const char *name,
+ uint32_t idx,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *key,
+ struct ulp_blob *mask,
+ struct ulp_blob *result);
+void
+ulp_mapper_result_dump(const char *name,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *result);
+
+void
+ulp_mapper_act_dump(const char *name,
+ struct bnxt_ulp_mapper_tbl_info *tbl,
+ struct ulp_blob *data);
+
+void
+ulp_mapper_em_dump(const char *name,
+ struct ulp_blob *key,
+ struct ulp_blob *data,
+ struct tf_insert_em_entry_parms *iparms);
+
+void
+ulp_mapper_blob_dump(struct ulp_blob *blob);
+
+#endif /* RTE_LIBRTE_BNXT_TRUFLOW_DEBUG */
+#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_tf_debug.c b/drivers/net/bnxt/tf_ulp/ulp_tf_debug.c
new file mode 100644
index 0000000..79a3611
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_tf_debug.c
@@ -0,0 +1,1161 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2019 Broadcom
+ * All rights reserved.
+ */
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+
+#include "bnxt.h"
+#include <rte_dev.h>
+#include <rte_ethdev_pci.h>
+#include "ulp_tf_debug.h"
+#include "bnxt_tf_common.h"
+
+/* #define TF_EEM_DEBUG */
+#include "tf_core.h"
+#include "tf_em.h"
+#include "tf_msg.h"
+#include "tfp.h"
+#include "tf_ext_flow_handle.h"
+
+#include "ulp_port_db.h"
+
+/* Enable EEM table dump. */
+#define TF_EEM_DUMP
+
+#if 0 // def TF_EEM_DEBUG
+static void dump_raw(uint8_t *data, uint32_t size, const char *msg)
+{
+ uint32_t i;
+ uint8_t lbuffer[1024];
+ uint8_t *lbuffer_ptr = lbuffer;
+ int32_t ret, amt;
+
+ amt = sizeof(lbuffer) - 1;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n%15s:\n", msg);
+ if (ret >= amt)
+ goto printit;
+ lbuffer_ptr += ret;
+ amt -= ret;
+
+ for (i = 0; i < (size / 4); i++) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "+-------");
+ if (ret >= amt)
+ goto printit;
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ lbuffer_ptr += ret;
+ amt -= ret;
+
+ for (i = 0; i < size; i++) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "%02x", *data);
+ if (ret >= amt)
+ goto printit;
+ lbuffer_ptr += ret;
+ amt -= ret;
+ data++;
+ }
+
+ snprintf((char *)lbuffer_ptr, amt, "\n");
+printit:
+ BNXT_TF_DBG(DEBUG, "%s", lbuffer);
+}
+#endif
+
+#if 0 //def TF_EEM_DUMP
+/************************ DEBBUG *******************************/
+enum {B_TE, B_RE, B_RXP, B_A0, B_A1, B_C0, B_C1, B_C2, B_ALL };
+
+enum {P_LOW, P_HIGH, P_OUT, P_IN, P_INTDIS,
+ P_INTEN, P_APE, P_CHIMP, P_NORMAL,
+ P_SHARE, P_PORT, P_PF, P_VF };
+
+#define STR_CMD_SIZE 32
+#define KEY_ENTRY_SIZE 64
+#define EAR_RECORD_SIZE 16
+#define MAX_BUF_SIZE 1024
+
+/*
+ * Keep a selection of action record pointers to display action records.
+ * The actual number of action records could be huge and detecting a
+ * valid action record in memory is not easy so we since this code is
+ * just a debug facility we keep just a small number.
+ */
+#define TF_MAX_ACT_REC_PTRS 256
+struct tf_act_rec_ref {
+ uint32_t ptr;
+ uint32_t size;
+};
+
+static struct tf_act_rec_ref act_rec_data[TF_DIR_MAX][TF_MAX_ACT_REC_PTRS];
+static uint32_t act_rec_counts[TF_DIR_MAX];
+
+static int cdbg_cfa_eem_host_key_decode(int dir,
+ uint32_t index,
+ uint8_t *eem_buf);
+static uint32_t getbits(uint32_t *data, int offset, int blen);
+
+static void eem_decode_hdr(uint32_t type)
+{
+ uint8_t lbuffer[1024];
+ uint8_t *lbuffer_ptr = lbuffer;
+ int32_t ret, amt;
+
+ amt = sizeof(lbuffer) - 1;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+
+ switch (type) {
+ case 0:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "\n\n=============== EEM KEY0 TABLE ============"
+ "==========================\n");
+ break;
+ case 1:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "\n\n=============== EEM KEY1 TABLE ============"
+ "==========================\n");
+ break;
+ case 2:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "\n\n=============== EEM RECORD TABLE =========="
+ "============================\n");
+ break;
+ case 3:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "\n\n=============== EEM EFC TABLE ============="
+ "=========================\n");
+ break;
+ }
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ switch (type) {
+ case 0:
+ case 1:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " | | | | | Act| ext|"
+ " Act| | |\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " | | | KEY | Rec | Rec| flw|"
+ " Rec| EM | EM | EM\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " id V| C| S| Size| Size| int| ctr|"
+ " Ptr| Prof| Msk| KEY\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "======== =|==|==|=====|=====|====|====|"
+ "=========|=====|====|=============\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 2:
+ case 3:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "Only showing first %d action records\n",
+ TF_MAX_ACT_REC_PTRS);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " | | | | |vnic | |"
+ " TTL |Meter| "
+ "NAT | Encap | TCP | Flow|"
+ " | | |Flow\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " Offset |Drop|Mrr|Mtr|VLAN|vport|Dcap|"
+ "TD D TR R| Ptr |SPort "
+ "SIP Dport DIP|int Ptr |Ma Mi Ke|e Fl|"
+ "Rt|Agg|Age| Id\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "======== |====|===|===|====|=====|===="
+ "|== = == =|=====|===== "
+ "=== ===== ===|=== =====|== == ==|== =="
+ "|==|===|===|====\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ break;
+ }
+printit:
+ BNXT_TF_DBG(DEBUG, "%s", lbuffer);
+}
+
+static uint32_t getbits(uint32_t *data, int offset, int blen)
+{
+ int start = offset >> 5;
+ int end = (offset + blen - 1) >> 5;
+ uint32_t val = data[start] >> (offset & 0x1f);
+
+ if (start != end)
+ val |= (data[start + 1] << (32 - (offset & 0x1f)));
+ return (blen == 32) ? val : (val & ((1 << blen) - 1));
+}
+
+static int cdbg_cfa_eem_host_key_decode(int dir,
+ uint32_t index,
+ uint8_t *eem_buf)
+{
+ static const char * const strength[] = { "Lo", "M1", "M2", "Hi" };
+ uint32_t valid, cache, internal_act_rec, external_fc;
+ uint32_t key_size_bits, record_size_bytes, profile_id;
+ uint32_t *eem_buf_ptr = (uint32_t *)eem_buf;
+ uint32_t key_id, em_mask;
+ uint64_t act_record_ptr;
+ char lbuffer[2048];
+ char *lbuffer_ptr = lbuffer;
+ int32_t amt;
+ int ret = 0;
+
+ amt = sizeof(lbuffer) - 1;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+#ifdef TF_EEM_DEBUG
+ int i;
+
+ for (i = 0; i < 64; i += 4) {
+ if (eem_buf[i] != 0 ||
+ eem_buf[i + 1] != 0 ||
+ eem_buf[i + 2] != 0 ||
+ eem_buf[i + 3] != 0)
+ break;
+ }
+
+ if (i >= 64)
+ return 0;
+
+ for (i = 0; i < 64; i++) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "%02x", eem_buf[i]);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ }
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ for (i = 63; i >= 0; i--) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "%02x", eem_buf[i]);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ }
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+#endif
+
+ valid = getbits(eem_buf_ptr, 511, 1);
+ if (!valid)
+ return 0;
+
+ cache = getbits(eem_buf_ptr, 510, 1);
+
+ key_size_bits = getbits(eem_buf_ptr, 488, 9);
+ record_size_bytes = (getbits(eem_buf_ptr, 483, 5) + 1) * 16;
+ internal_act_rec = getbits(eem_buf_ptr, 482, 1);
+ external_fc = getbits(eem_buf_ptr, 481, 1);
+ act_record_ptr = getbits(eem_buf_ptr, 448, 32) +
+ ((uint64_t)getbits(eem_buf_ptr, 480, 1) << 32);
+
+ if (!internal_act_rec) {
+ if (act_rec_counts[dir] < TF_MAX_ACT_REC_PTRS) {
+ act_rec_data[dir][act_rec_counts[dir]].ptr =
+ act_record_ptr << 4;
+ act_rec_data[dir][act_rec_counts[dir]].size =
+ record_size_bytes;
+ act_rec_counts[dir]++;
+ }
+ }
+ profile_id = getbits(eem_buf_ptr, 440, 8);
+
+ if (key_size_bits == 197)
+ key_id = 21; /* Matches example flow create in DPDK */
+ else if (key_size_bits == 173)
+ key_id = 3;
+ else if (key_size_bits == 109)
+ key_id = 2;
+ else
+ key_id = 21;
+
+ em_mask = 0;
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "%08x %x %x %s %4d %4d %x"
+ " %x %p %d %d",
+ index,
+ valid,
+ cache,
+ strength[getbits(eem_buf_ptr, 508, 2)],
+ key_size_bits,
+ record_size_bytes,
+ internal_act_rec,
+ external_fc,
+ (void *)((uintptr_t)act_record_ptr),
+ profile_id,
+ em_mask);
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ switch (key_id) {
+ case 0:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " parif-%x svif-%x dst-%02x:%02x:%02x:"
+ "%02x:%02x:%02x iv-%x etype-%x cos-%x\n\n",
+ getbits(eem_buf_ptr, 430, 4),
+ getbits(eem_buf_ptr, 426, 8),
+ getbits(eem_buf_ptr, 418, 8),
+ getbits(eem_buf_ptr, 410, 8),
+ getbits(eem_buf_ptr, 402, 8),
+ getbits(eem_buf_ptr, 394, 8),
+ getbits(eem_buf_ptr, 386, 8),
+ getbits(eem_buf_ptr, 374, 12),
+ getbits(eem_buf_ptr, 358, 16),
+ getbits(eem_buf_ptr, 355, 3),
+ 0);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 1:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " parif-%x svif-%2x dst-%02x%02x:%02x%02x:"
+ "%02x%02x src-%02x%02x:%02x%02x:%02x%02x\n",
+ getbits(eem_buf_ptr, 430, 4),
+ getbits(eem_buf_ptr, 426, 8),
+ getbits(eem_buf_ptr, 418, 8),
+ getbits(eem_buf_ptr, 410, 8), /* dst */
+ getbits(eem_buf_ptr, 402, 8),
+ getbits(eem_buf_ptr, 394, 8),
+ getbits(eem_buf_ptr, 386, 8), /* dst */
+ getbits(eem_buf_ptr, 378, 8),
+ getbits(eem_buf_ptr, 370, 8),
+ getbits(eem_buf_ptr, 362, 8), /* src */
+ getbits(eem_buf_ptr, 354, 8),
+ getbits(eem_buf_ptr, 346, 8),
+ getbits(eem_buf_ptr, 334, 8), /* src */
+ getbits(eem_buf_ptr, 326, 8)
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ov-%x iv-%x etype-%x"
+ " dip-%x.%x.%x.%x proto:%x cos:%x\n\n",
+ getbits(eem_buf_ptr, 322, 12),
+ getbits(eem_buf_ptr, 310, 12),
+ getbits(eem_buf_ptr, 294, 16), /* ov iv etype */
+ getbits(eem_buf_ptr, 286, 8),
+ getbits(eem_buf_ptr, 278, 8),
+ getbits(eem_buf_ptr, 270, 8),
+ getbits(eem_buf_ptr, 262, 8), /* l3_dst */
+ getbits(eem_buf_ptr, 254, 8),
+ getbits(eem_buf_ptr, 251, 3) /* l3_pro, l_cos */
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 2:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x sip-%02x.%02x.%02x.%02x",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 422, 8), /* SIP */
+ getbits(eem_buf_ptr, 414, 8),
+ getbits(eem_buf_ptr, 406, 8),
+ getbits(eem_buf_ptr, 398, 8)
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " dip-%02x.%02x.%02x.%02x prot-%x dport-%x"
+ " cos-%x\n\n",
+ getbits(eem_buf_ptr, 390, 8), /* DIP */
+ getbits(eem_buf_ptr, 382, 8),
+ getbits(eem_buf_ptr, 374, 8),
+ getbits(eem_buf_ptr, 366, 8),
+ getbits(eem_buf_ptr, 358, 8), /* L3 Proto */
+ getbits(eem_buf_ptr, 342, 16),/* L4 Dest */
+ getbits(eem_buf_ptr, 339, 3) /* COS */
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 3:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x smac-%02x:%02x:%02x:%02x:%02x:"
+ "%02x sip-%02x.%02x.%02x.%02x",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 422, 8), /* SMAC */
+ getbits(eem_buf_ptr, 414, 8),
+ getbits(eem_buf_ptr, 406, 8),
+ getbits(eem_buf_ptr, 398, 8),
+ getbits(eem_buf_ptr, 390, 8),
+ getbits(eem_buf_ptr, 382, 8),
+ getbits(eem_buf_ptr, 374, 8), /* SIP */
+ getbits(eem_buf_ptr, 366, 8),
+ getbits(eem_buf_ptr, 358, 8),
+ getbits(eem_buf_ptr, 350, 8)
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " dip-%02x.%02x.%02x.%02x prot-%x sport-%x"
+ " dport-%x cos-%x\n\n",
+ getbits(eem_buf_ptr, 342, 8), /* DIP */
+ getbits(eem_buf_ptr, 334, 8),
+ getbits(eem_buf_ptr, 326, 8),
+ getbits(eem_buf_ptr, 318, 8),
+ getbits(eem_buf_ptr, 310, 8), /* L3 Proto */
+ getbits(eem_buf_ptr, 294, 16),/* L4 Scr */
+ getbits(eem_buf_ptr, 278, 16),/* L4 Dest */
+ getbits(eem_buf_ptr, 275, 3) /* COS */
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 4:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x dmac-%02x:%02x:%02x:%02x:%02x:%02x"
+ " dip-%02x.%02x.%02x.%02x",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 422, 8),
+ getbits(eem_buf_ptr, 414, 8),
+ getbits(eem_buf_ptr, 406, 8), /* src */
+ getbits(eem_buf_ptr, 398, 8),
+ getbits(eem_buf_ptr, 390, 8),
+ getbits(eem_buf_ptr, 382, 8), /* src */
+ getbits(eem_buf_ptr, 374, 8),
+ getbits(eem_buf_ptr, 366, 8),
+ getbits(eem_buf_ptr, 358, 8),
+ getbits(eem_buf_ptr, 350, 8) /* l3_dst */
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " dip-%02x.%02x.%02x.%02x prot-%x sport-%x"
+ " dport-%x cos-%x\n\n",
+ getbits(eem_buf_ptr, 342, 8),
+ getbits(eem_buf_ptr, 334, 8),
+ getbits(eem_buf_ptr, 326, 8),
+ getbits(eem_buf_ptr, 318, 8), /* l3_dst */
+ getbits(eem_buf_ptr, 310, 8),
+ getbits(eem_buf_ptr, 294, 16),
+ getbits(eem_buf_ptr, 278, 16),
+ getbits(eem_buf_ptr, 275, 3) /*
+ * l3_pro,l4_src,
+ * l4_dst,l_cos
+ */
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 7:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x dst-%02x%02x:%02x%02x:%02x%02x "
+ "src-%02x%02x:%02x%02x:%02x%02x\n",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 420, 8),
+ getbits(eem_buf_ptr, 412, 8),
+ getbits(eem_buf_ptr, 404, 8), /* dst */
+ getbits(eem_buf_ptr, 396, 8),
+ getbits(eem_buf_ptr, 388, 8),
+ getbits(eem_buf_ptr, 380, 8), /* dst */
+ getbits(eem_buf_ptr, 372, 8),
+ getbits(eem_buf_ptr, 364, 8),
+ getbits(eem_buf_ptr, 356, 8), /* src */
+ getbits(eem_buf_ptr, 348, 8),
+ getbits(eem_buf_ptr, 340, 8),
+ getbits(eem_buf_ptr, 328, 8) /* src */
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " sip-%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x"
+ " dip-%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
+ getbits(eem_buf_ptr, 312, 16),
+ getbits(eem_buf_ptr, 296, 16),
+ getbits(eem_buf_ptr, 280, 16), /* l3_src_v6 */
+ getbits(eem_buf_ptr, 264, 16),
+ getbits(eem_buf_ptr, 248, 16),
+ getbits(eem_buf_ptr, 232, 16), /* l3_src_v6 */
+ getbits(eem_buf_ptr, 372, 16),
+ getbits(eem_buf_ptr, 364, 16),
+ getbits(eem_buf_ptr, 356, 16), /* l3_dst_v6 */
+ getbits(eem_buf_ptr, 348, 16),
+ getbits(eem_buf_ptr, 340, 16),
+ getbits(eem_buf_ptr, 328, 16), /* l3_dst_v6 */
+ getbits(eem_buf_ptr, 328, 16),
+ getbits(eem_buf_ptr, 328, 16),
+ getbits(eem_buf_ptr, 328, 16),
+ getbits(eem_buf_ptr, 328, 16)
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 12:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x dst-%02x:%02x:%02x:%02x:%02x:%02x"
+ " iv-%x etype-%x cos-%x\n\n",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 422, 8),
+ getbits(eem_buf_ptr, 414, 8),
+ getbits(eem_buf_ptr, 406, 8),
+ getbits(eem_buf_ptr, 398, 8),
+ getbits(eem_buf_ptr, 390, 8),
+ getbits(eem_buf_ptr, 382, 8),
+ getbits(eem_buf_ptr, 370, 12),
+ getbits(eem_buf_ptr, 354, 16),
+ getbits(eem_buf_ptr, 351, 3)
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ case 21:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " ctx-%x tid-%x smac-%02x:%02x:%02x:%02x:"
+ "%02x:%02x",
+ getbits(eem_buf_ptr, 430, 10),
+ getbits(eem_buf_ptr, 406, 24), /* ctx, tid */
+ getbits(eem_buf_ptr, 398, 8),
+ getbits(eem_buf_ptr, 390, 8),
+ getbits(eem_buf_ptr, 382, 8), /* src */
+ getbits(eem_buf_ptr, 374, 8),
+ getbits(eem_buf_ptr, 366, 8),
+ getbits(eem_buf_ptr, 358, 8) /* src */
+ );
+
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " sip-%02x.%02x.%02x.%02x dip-%02x.%02x."
+ "%02x.%02x prot-%x sport-%x dport-%x cos-%x\n\n",
+ getbits(eem_buf_ptr, 350, 8),
+ getbits(eem_buf_ptr, 342, 8),
+ getbits(eem_buf_ptr, 334, 8),
+ getbits(eem_buf_ptr, 326, 8), /* l3_src */
+ getbits(eem_buf_ptr, 318, 8),
+ getbits(eem_buf_ptr, 310, 8),
+ getbits(eem_buf_ptr, 302, 8),
+ getbits(eem_buf_ptr, 294, 8), /* l3_dst */
+ getbits(eem_buf_ptr, 286, 8),
+ getbits(eem_buf_ptr, 270, 16),
+ getbits(eem_buf_ptr, 254, 16),
+ getbits(eem_buf_ptr, 251, 3)
+ );
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+
+ default:
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ " doesn't support yet\n\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ break;
+ }
+
+printit:
+ PMD_DRV_LOG(DEBUG, "%s", lbuffer);
+
+ return 1;
+}
+
+
+static int cdbg_cfa_eem_host_record_decode(uint32_t index,
+ uint8_t *eem_buf)
+{
+ uint32_t *data = (uint32_t *)eem_buf;
+ uint8_t lbuffer[2048];
+ uint8_t *lbuffer_ptr = lbuffer;
+ uint8_t count_enable;
+ uint8_t count_type;
+ int32_t ret, amt;
+ int j;
+
+ amt = sizeof(lbuffer) - 1;
+
+ memset(lbuffer, 0, sizeof(lbuffer));
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ for (j = 0; j < 4; j++) {
+ if (data[j] != 0)
+ break;
+ }
+
+ if (j >= 4)
+ return 0;
+
+#ifdef TF_EEM_DEBUG
+ for (j = 0; j < 16; j += 4) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "%02x%02x%02x%02x",
+ eem_buf[j],
+ eem_buf[j + 1],
+ eem_buf[j + 2],
+ eem_buf[j + 3]);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ }
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ for (j = 0; j < 4; j++) {
+ ret = snprintf((char *)lbuffer_ptr, amt, "%08x", data[j]);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ }
+ ret = snprintf((char *)lbuffer_ptr, amt, "\n");
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+#endif
+
+ count_type = getbits(data, 17, 1);
+ count_enable = getbits(data, 18, 1);
+
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "%8x %d %d %d %d %3x %2x "
+ "%d %d %d %d %3x %4x %3x %4x %3x "
+ "%d %3x %d %d %2x %d %d %d %d %d %4x %p\n",
+ index,
+ getbits(data, 127, 1),
+ getbits(data, 125, 2),
+ getbits(data, 124, 1),
+ getbits(data, 123, 1),
+ getbits(data, 111, 12),
+ getbits(data, 107, 4),
+ getbits(data, 106, 1),
+ getbits(data, 105, 1),
+ getbits(data, 104, 1),
+ getbits(data, 103, 1),
+ getbits(data, 93, 10),
+ getbits(data, 77, 16),
+ getbits(data, 67, 10),
+ getbits(data, 51, 16),
+ getbits(data, 41, 10),
+ getbits(data, 40, 1),
+ getbits(data, 29, 11),
+ getbits(data, 28, 1),
+ getbits(data, 27, 1),
+ getbits(data, 19, 8),
+ getbits(data, 18, 1),
+ getbits(data, 17, 1),
+ getbits(data, 16, 1),
+ getbits(data, 15, 1),
+ getbits(data, 14, 1),
+ getbits(data, 0, 14),
+ data);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ if (count_type == 1 && count_enable == 1) {
+ uint32_t ch;
+ uint32_t cl;
+ uint32_t *ptr;
+
+ data += 4;
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "EFC: ByteCntPtr:0x%x PktCntPtr:0x%x ",
+ *((uint32_t *)data),
+ *((uint32_t *)(data + 1)));
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ptr = data + ((((*data & 0xffff) << 3)) / 4) - 4;
+ cl = *ptr;
+ ch = *(ptr + 1);
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "B:0x%08x%08x ", ch, cl);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+
+ ptr = data + ((((*(data + 1) & 0xffff) << 3)) / 4) - 4;
+ cl = *ptr;
+ ch = *(ptr + 1);
+ ret = snprintf((char *)lbuffer_ptr, amt,
+ "P:0x%08x%08x\n", ch, cl);
+ if (ret >= amt)
+ goto printit;
+ if (ret > 0) {
+ lbuffer_ptr += ret;
+ amt -= ret;
+ }
+ }
+
+printit:
+ PMD_DRV_LOG(DEBUG, "%s", lbuffer);
+
+ return 0;
+}
+
+static
+void tf_diag_dump_table(struct tf_tbl_scope_cb *tbl_scope_cb,
+ struct tf_em_ctx_mem_info *eem_ctx_info)
+{
+ uint32_t key0_count = 0;
+ uint32_t key1_count = 0;
+ uint32_t num_entries;
+ uint32_t entry_size;
+ uint8_t *eem_entry;
+ uint8_t *table;
+ uint32_t offset;
+ int dir = 0;
+ uint32_t i;
+
+ act_rec_counts[TF_DIR_TX] = 0;
+ act_rec_counts[TF_DIR_RX] = 0;
+
+ for (dir = 0; dir < 2; dir++) {
+ num_entries =
+ eem_ctx_info[dir].em_tables[KEY0_TABLE].num_entries;
+ PMD_DRV_LOG(DEBUG, "\n\n");
+ PMD_DRV_LOG(DEBUG, "\n>>>>>>>>>>>>>>> Dir:%s <<<<<<<<<<<<\n",
+ (dir == TF_DIR_TX ? "Tx" : "Rx"));
+
+ entry_size = 64;
+ table = tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ 0,
+ KEY0_TABLE);
+ if (table == NULL) {
+ PMD_DRV_LOG(DEBUG, "EEM Not configured\n");
+ continue;
+ }
+
+ eem_decode_hdr(KEY0_TABLE);
+
+ for (i = 0, offset = 0; i < num_entries; i++) {
+ if ((offset % TF_EM_PAGE_SIZE) == 0) {
+ table =
+ tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ offset,
+ KEY0_TABLE);
+#ifdef TF_EEM_DUMP_DEBUG
+ PMD_DRV_LOG(DEBUG,
+ "----- Page:%d %p -----\n",
+ (offset / TF_EM_PAGE_SIZE),
+ table);
+#endif
+ }
+
+ eem_entry = table + (offset % TF_EM_PAGE_SIZE);
+
+ if (cdbg_cfa_eem_host_key_decode(dir,
+ i,
+ eem_entry)) {
+#ifdef TF_EEM_DUMP_DEBUG
+ PMD_DRV_LOG(DEBUG, "Page:%p entry:%p"
+ " offset:0x%x"
+ " page-offset:0x%x\n",
+ table,
+ eem_entry,
+ offset,
+ (offset % TF_EM_PAGE_SIZE));
+#endif
+ key0_count++;
+ }
+
+ offset += entry_size;
+ }
+
+ eem_decode_hdr(KEY1_TABLE);
+ table = tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ 0,
+ KEY1_TABLE);
+
+ for (i = 0, offset = 0; i < num_entries; i++) {
+ if ((offset % TF_EM_PAGE_SIZE) == 0) {
+ table =
+ tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ offset,
+ KEY1_TABLE);
+#ifdef TF_EEM_DUMP_DEBUG
+ PMD_DRV_LOG(DEBUG,
+ "----- Page:%d %p -----\n",
+ (offset / TF_EM_PAGE_SIZE),
+ table);
+#endif
+ }
+
+ eem_entry = table + (offset % TF_EM_PAGE_SIZE);
+
+ if (cdbg_cfa_eem_host_key_decode(dir,
+ i,
+ eem_entry))
+ key1_count++;
+
+ offset += entry_size;
+ }
+
+ PMD_DRV_LOG(DEBUG, "Key0 table has %d entries and Key1"
+ " table has %d entries, total:%d\n\n",
+ key0_count,
+ key1_count,
+ (key0_count + key1_count));
+
+ entry_size = 16;
+ eem_decode_hdr(RECORD_TABLE);
+ table = tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ 0,
+ RECORD_TABLE);
+#if 0
+ for (i = 0, offset = 0; i < num_entries; i++) {
+ if ((offset % TF_EM_PAGE_SIZE) == 0) {
+ table =
+ tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ offset,
+ RECORD_TABLE);
+#ifdef TF_EEM_DUMP_DEBUG
+ printf("----- Page:%d %p -----\n",
+ (offset / TF_EM_PAGE_SIZE),
+ table);
+#endif
+ }
+
+ eem_entry = table + (offset % TF_EM_PAGE_SIZE);
+ cdbg_cfa_eem_host_record_decode(i, eem_entry);
+ offset += entry_size;
+ }
+#else
+ for (i = 0; i < act_rec_counts[dir]; i++) {
+ offset = act_rec_data[dir][i].ptr;
+ /* printf("Offset:0x%x\n", offset); */
+ if ((offset % TF_EM_PAGE_SIZE) == 0) {
+ table =
+ tf_em_get_table_page(tbl_scope_cb,
+ dir,
+ offset,
+ RECORD_TABLE);
+#ifdef TF_EEM_DUMP_DEBUG
+ PMD_DRV_LOG(DEBUG,
+ "----- Page:%d %p -----\n",
+ (offset / TF_EM_PAGE_SIZE),
+ table);
+#endif
+ }
+
+ eem_entry = table + (offset % TF_EM_PAGE_SIZE);
+ cdbg_cfa_eem_host_record_decode(offset,
+ eem_entry);
+ offset += entry_size;
+ }
+#endif
+ }
+}
+
+void tf_dump_tables(struct tf *tfp, uint32_t tbl_scope_id);
+struct tf_tbl_scope_cb *tbl_scope_cb_find(struct tf_session *session,
+ uint32_t tbl_scope_id);
+
+void tf_dump_tables(struct tf *tfp, uint32_t tbl_scope_id)
+{
+ struct tf_session *session;
+ struct tf_tbl_scope_cb *tbl_scope_cb;
+
+ BNXT_TF_DBG(DEBUG, "called %s\n", __func__);
+
+ /* find session struct */
+ session = (struct tf_session *)tfp->session->core_data;
+
+ /* find control block for table scope */
+ tbl_scope_cb = tbl_scope_cb_find(session,
+ tbl_scope_id);
+ if (tbl_scope_cb == NULL)
+ BNXT_TF_DBG(ERR, "No table scope\n");
+
+ tf_diag_dump_table(tbl_scope_cb,
+ tbl_scope_cb->em_ctx_info);
+}
+#endif
+
+/****************************** End of DEBUG *************************/
+
+static struct bnxt *bnxt_get_bp(uint16_t port)
+{
+ struct bnxt *bp;
+ struct rte_eth_dev *dev;
+
+ if (!rte_eth_dev_is_valid_port(port)) {
+ BNXT_TF_DBG(ERR,
+ "Invalid port %d\n", port);
+ return NULL;
+ }
+
+ dev = &rte_eth_devices[port];
+
+ if (!is_bnxt_supported(dev)) {
+ BNXT_TF_DBG(ERR,
+ "Device %d not supported\n",
+ port);
+ return NULL;
+ }
+
+ bp = (struct bnxt *)dev->data->dev_private;
+ return bp;
+}
+
+void bnxt_ulp_cli_tf_dump_tables(uint16_t port,
+ uint32_t tbl_scope_id __rte_unused)
+{
+ struct bnxt *bp;
+
+ bp = bnxt_get_bp(port);
+
+ if (!bp) {
+ BNXT_TF_DBG(ERR,
+ "Failed to get bp for port:%d\n", port);
+ return;
+ }
+
+ //tf_dump_tables(&bp->tfp, tbl_scope_id);
+}
+
+void
+ulp_port_db_dump(struct bnxt_ulp_port_db *port_db,
+ struct ulp_interface_info *intf,
+ uint32_t port_id)
+{
+ struct ulp_func_if_info *func;
+ struct ulp_phy_port_info *port_data;
+
+ BNXT_TF_DBG(INFO, "*****Dump for DPDK port_id %d ******\n", port_id);
+ BNXT_TF_DBG(INFO, "type=0x%0x, drv_func_id=0x%0x, vf_func_id=0x%0x\n",
+ intf->type, intf->drv_func_id, intf->vf_func_id);
+
+ func = &port_db->ulp_func_id_tbl[intf->drv_func_id];
+ BNXT_TF_DBG(INFO, "drv_func_svif=0x%0x, drv_func_spif=0x%0x,"
+ "drv_func_parif=0x%0x, drv_default_vnic=0x%0x\n",
+ func->func_svif, func->func_spif, func->func_parif,
+ func->func_vnic);
+
+ if (intf->type == BNXT_ULP_INTF_TYPE_VF_REP) {
+ func = &port_db->ulp_func_id_tbl[intf->vf_func_id];
+ BNXT_TF_DBG(INFO, " vf_func_svif=0x%0x, vf_func_spif=0x%0x,"
+ " vf_func_parif=0x%0x, vf_default_vnic=0x%0x\n",
+ func->func_svif, func->func_spif, func->func_parif,
+ func->func_vnic);
+ }
+ port_data = &port_db->phy_port_list[func->phy_port_id];
+ BNXT_TF_DBG(INFO, "phy_port_svif=0x%0x, phy_port_spif=0x%0x,"
+ "phy_port_parif=0x%0x, phy_port_vport=0x%0x\n",
+ port_data->port_svif, port_data->port_spif,
+ port_data->port_parif, port_data->port_vport);
+ BNXT_TF_DBG(INFO, "***** dump complete ******\n");
+}
+
+const char *
+tf_if_tbl_2_str(uint32_t type)
+{
+ enum tf_if_tbl_type id_type = type;
+
+ switch (id_type) {
+ case TF_IF_TBL_TYPE_PROF_SPIF_DFLT_L2_CTXT:
+ return "spif dflt l2 ctxt";
+ case TF_IF_TBL_TYPE_PROF_PARIF_DFLT_ACT_REC_PTR:
+ return "parif act rec ptr";
+ case TF_IF_TBL_TYPE_PROF_PARIF_ERR_ACT_REC_PTR:
+ return "parif err act rec ptr";
+ case TF_IF_TBL_TYPE_LKUP_PARIF_DFLT_ACT_REC_PTR:
+ return "lkup parif act rec ptr";
+ case TF_IF_TBL_TYPE_ILT:
+ return "ilt tbl";
+ case TF_IF_TBL_TYPE_VNIC_SVIF:
+ return "vnic svif tbl";
+ default:
+ return "Invalid identifier";
+ }
+}
+
+#endif /* RTE_LIBRTE_BNXT_TRUFLOW_DEBUG */
diff --git a/drivers/net/bnxt/tf_ulp/ulp_tf_debug.h b/drivers/net/bnxt/tf_ulp/ulp_tf_debug.h
new file mode 100644
index 0000000..cc6dace
--- /dev/null
+++ b/drivers/net/bnxt/tf_ulp/ulp_tf_debug.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2019 Broadcom
+ * All rights reserved.
+ */
+
+#ifndef _ULP_TF_DEBUG_H_
+#define _ULP_TF_DEBUG_H_
+
+#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
+struct tf;
+struct ulp_interface_info;
+struct bnxt_ulp_port_db;
+
+void bnxt_ulp_cli_tf_dump_tables(uint16_t port, uint32_t tbl_scope_id);
+void tf_dump_tables(struct tf *tfp, uint32_t tbl_scope_id);
+void
+ulp_port_db_dump(struct bnxt_ulp_port_db *port_db,
+ struct ulp_interface_info *intf,
+ uint32_t port_id);
+
+const char *
+tf_if_tbl_2_str(uint32_t id_type);
+
+#endif
+
+#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c
index a923da8..85eb42b 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_utils.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c
@@ -411,7 +411,7 @@ ulp_blob_pad_push(struct ulp_blob *blob,
{
if (datalen > (uint32_t)(blob->bitlen - blob->write_idx)) {
BNXT_TF_DBG(ERR, "Pad too large for blob\n");
- return 0;
+ return -1;
}
blob->write_idx += datalen;
--
2.7.4
next prev parent reply other threads:[~2020-07-17 9:56 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 9:49 [dpdk-dev] [PATCH 00/14] bnxt patches Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 04/14] net/bnxt: fix to avoid accumulation of flow counters Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 05/14] net/bnxt: add protocol header info based on proto field data Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 06/14] net/bnxt: fix em message size Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 07/14] net/bnxt: replace NAT IPv4 action SRC/DEST Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 08/14] net/bnxt: clean up em message definition Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 09/14] net/bnxt: change header to SPDX-License Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 10/14] net/bnxt: fix dereference of a null pointer Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 11/14] net/bnxt: default egress rule changes Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 12/14] net/bnxt: update cfa truflow resource allocation numbers Somnath Kotur
2020-07-17 9:49 ` [dpdk-dev] [PATCH 13/14] net/bnxt: enable support for exact match templates Somnath Kotur
2020-07-17 9:49 ` Somnath Kotur [this message]
2020-07-17 14:14 ` [dpdk-dev] [PATCH v2 00/14] bnxt patches Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 01/14] net/bnxt: changes to support new RM and multi-region Somnath Kotur
2020-07-17 14:34 ` Thomas Monjalon
2020-07-17 14:14 ` [dpdk-dev] [PATCH 02/14] net/bnxt: initialize table scope rm parameters Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 03/14] net/bnxt: enable default flows in truflow mode Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 04/14] net/bnxt: fix to avoid accumulation of flow counters Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 05/14] net/bnxt: add protocol header info based on proto field data Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 06/14] net/bnxt: fix em message size Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 07/14] net/bnxt: replace NAT IPv4 action SRC/DEST Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 08/14] net/bnxt: clean up em message definition Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 09/14] net/bnxt: change header to SPDX-License Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 10/14] net/bnxt: fix dereference of a null pointer Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 11/14] net/bnxt: default egress rule changes Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 12/14] net/bnxt: update cfa truflow resource allocation numbers Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 13/14] net/bnxt: enable support for exact match templates Somnath Kotur
2020-07-17 14:14 ` [dpdk-dev] [PATCH 14/14] net/bnxt: remove unnecessary debug log Somnath Kotur
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 00/14] bnxt patches Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 01/14] net/bnxt: modify resource management scheme Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 02/14] net/bnxt: initialize table scope parameter Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 03/14] net/bnxt: enable default flows in truflow mode Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 04/14] net/bnxt: fix to avoid accumulation of flow counters Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 05/14] net/bnxt: add protocol header info based on proto field data Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 06/14] net/bnxt: fix exact match message size Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 07/14] net/bnxt: use NAT IPv4 action Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 08/14] net/bnxt: remove unused macro Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 09/14] net/bnxt: change header to use SPDX license Ajit Khaparde
2020-07-23 4:35 ` Stephen Hemminger
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 10/14] net/bnxt: fix dereference of a null pointer Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 11/14] net/bnxt: modify default egress rule for VF representor Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 12/14] net/bnxt: update truflow resource allocation numbers Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 13/14] net/bnxt: enable support for exact match templates Ajit Khaparde
2020-07-18 7:25 ` [dpdk-dev] [PATCH v3 14/14] net/bnxt: remove unnecessary debug log Ajit Khaparde
2020-07-20 15:02 ` [dpdk-dev] [PATCH v3 00/14] bnxt patches Ajit Khaparde
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