From: Chen-Yu Tsai <wens@kernel.org>
To: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 7/8] arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
Date: Sat, 18 Jul 2020 00:00:52 +0800 [thread overview]
Message-ID: <20200717160053.31191-8-wens@kernel.org> (raw)
In-Reply-To: <20200717160053.31191-1-wens@kernel.org>
From: Chen-Yu Tsai <wens@csie.org>
The Libre Computer ALL-H3-CC H5 variant can work with the standard H5
OPPs. Tie them in to enable CPU frequency scaling.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
index 64d35daf2023..d811df332824 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-libretech-all-h3-cc.dtsi>
/ {
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens@kernel.org>
To: Maxime Ripard <mripard@kernel.org>
Cc: devicetree@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/8] arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
Date: Sat, 18 Jul 2020 00:00:52 +0800 [thread overview]
Message-ID: <20200717160053.31191-8-wens@kernel.org> (raw)
In-Reply-To: <20200717160053.31191-1-wens@kernel.org>
From: Chen-Yu Tsai <wens@csie.org>
The Libre Computer ALL-H3-CC H5 variant can work with the standard H5
OPPs. Tie them in to enable CPU frequency scaling.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
index 64d35daf2023..d811df332824 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-libretech-all-h3-cc.dtsi>
/ {
--
2.27.0
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next prev parent reply other threads:[~2020-07-17 16:01 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 16:00 [PATCH v2 0/8] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 1/8] ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 2/8] ARM: dts: sunxi: bananapi-m2-plus-v1.2: " Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 3/8] ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 4/8] arm64: dts: allwinner: h5: Add clock to CPU cores Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 5/8] arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 6/8] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai [this message]
2020-07-17 16:00 ` [PATCH v2 7/8] arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs Chen-Yu Tsai
2020-07-17 16:00 ` [PATCH v2 8/8] arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: " Chen-Yu Tsai
2020-07-17 16:00 ` Chen-Yu Tsai
2020-07-20 14:11 ` [PATCH v2 0/8] arm64: dts: allwinner: h5: Enable CPU DVFS (cpufreq) Maxime Ripard
2020-07-20 14:11 ` Maxime Ripard
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