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From: Xu Yilun <yilun.xu@intel.com>
To: Mark Brown <broonie@kernel.org>
Cc: lee.jones@linaro.org, linux-kernel@vger.kernel.org,
	trix@redhat.com, matthew.gerlach@linux.intel.com,
	russell.h.weight@intel.com, lgoncalv@redhat.com,
	hao.wu@intel.com, yilun.xu@intel.com
Subject: Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC
Date: Tue, 21 Jul 2020 11:47:13 +0800	[thread overview]
Message-ID: <20200721034713.GB17091@yilunxu-OptiPlex-7050> (raw)
In-Reply-To: <20200717181609.GB905@sirena.org.uk>

On Fri, Jul 17, 2020 at 07:16:09PM +0100, Mark Brown wrote:
> On Thu, Jul 16, 2020 at 06:42:54PM +0800, Xu Yilun wrote:
> 
> > +static const struct spi_device_id m10bmc_spi_id[] = {
> > +	{ "m10-n3000", M10_N3000 },
> > +	{ }
> > +};
> > +MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
> 
> > +static struct spi_driver intel_m10bmc_spi_driver = {
> > +	.driver = {
> > +		.name = "intel-m10-bmc",
> > +		.dev_groups = m10bmc_dev_groups,
> > +	},
> > +	.probe = intel_m10_bmc_spi_probe,
> > +	.id_table = m10bmc_spi_id,
> > +};
> 
> > +module_spi_driver(intel_m10bmc_spi_driver);
> 
> This device has no ACPI information - how will it be instantiated?

In our case, The m10-bmc is connected to the intel FPGA (PAC N3000),
which uses the Device Feature List (DFL) mechanism to enumerate features
(devices) on FPGA. Each feature in DFL has a feature_id. And for this
m10-n3000 feature (feature_id = 0xd), it contains a spi-altera & a
m10-n3000 chip. So the DFL subsystem would help enumerate the info.

Recently I added the platform data for slave information in spi-altera,
to support this use case.

Thanks,
Yilun

  reply	other threads:[~2020-07-21  3:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 10:42 [PATCH v2 0/3] add regmap-spi-avmm & Intel Max10 BMC chip support Xu Yilun
2020-07-16 10:42 ` [PATCH v2 1/3] regmap: add Intel SPI Slave to AVMM Bus Bridge support Xu Yilun
2020-07-17 18:15   ` Mark Brown
2020-07-20 17:11     ` Xu Yilun
2020-07-22 11:32       ` Mark Brown
2020-07-23  1:30         ` Xu Yilun
2020-07-16 10:42 ` [PATCH v2 2/3] regmap: spi-avmm: start with the last SOP on phy rx buffer parsing Xu Yilun
2020-07-17 12:11   ` Mark Brown
2020-07-16 10:42 ` [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC Xu Yilun
2020-07-17  9:45   ` Lee Jones
2020-07-21  3:26     ` Xu Yilun
2020-07-17 18:16   ` Mark Brown
2020-07-21  3:47     ` Xu Yilun [this message]
2020-07-21  3:50       ` Xu Yilun

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