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[165.204.84.11]) by smtp.gmail.com with ESMTPSA id d16sm2709212qkk.106.2020.07.21.09.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2020 09:52:52 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: amd-gfx@lists.freedesktop.org Subject: [PATCH 5/6] drm/amdgpu/navi1x: add SMU i2c support Date: Tue, 21 Jul 2020 12:52:39 -0400 Message-Id: <20200721165240.296265-5-alexander.deucher@amd.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200721165240.296265-1-alexander.deucher@amd.com> References: <20200721165240.296265-1-alexander.deucher@amd.com> MIME-Version: 1.0 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Deucher Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Enable SMU i2c bus access for navi1x asics. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index ead135f39c7e..56267e6c600e 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -23,6 +23,7 @@ #include #include +#include #include "amdgpu.h" #include "amdgpu_smu.h" #include "smu_internal.h" @@ -52,6 +53,8 @@ #undef pr_info #undef pr_debug +#define to_amdgpu_device(x) (container_of(x, struct amdgpu_device, pm.smu_i2c)) + #define FEATURE_MASK(feature) (1ULL << feature) #define SMC_DPM_FEATURE ( \ FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \ -- 2.25.4 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx