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Fri, 24 Jul 2020 01:59:24 -0700 (PDT) Date: Fri, 24 Jul 2020 16:59:11 +0800 From: Leo Yan To: Wei Li Cc: Mathieu Poirier , Suzuki K Poulose , Mike Leach , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Kim Phillips , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Ingo Molnar , guohanjun@huawei.com Subject: Re: [PATCH v2 1/2] perf tools: Fix record failure when mixed with ARM SPE event Message-ID: <20200724085911.GA8487@leoy-ThinkPad-X240s> References: <20200724071111.35593-1-liwei391@huawei.com> <20200724071111.35593-2-liwei391@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200724071111.35593-2-liwei391@huawei.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jul 24, 2020 at 03:11:10PM +0800, Wei Li wrote: > When recording with cache-misses and arm_spe_x event, i found that > it will just fail without showing any error info if i put cache-misses > after 'arm_spe_x' event. > > [root@localhost 0620]# perf record -e cache-misses -e \ > arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\ > jitter=1,store_filter=1,min_latency=0/ sleep 1 > [ perf record: Woken up 1 times to write data ] > [ perf record: Captured and wrote 0.067 MB perf.data ] > [root@localhost 0620]# perf record -e \ > arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\ > store_filter=1,min_latency=0/ -e cache-misses sleep 1 > [root@localhost 0620]# > > The current code can only work if the only event to be traced is an > 'arm_spe_x', or if it is the last event to be specified. Otherwise the > last event type will be checked against all the arm_spe_pmus[i]->types, > none will match and an out of bound 'i' index will be used in > arm_spe_recording_init(). > > We don't support concurrent multiple arm_spe_x events currently, that > is checked in arm_spe_recording_options(), and it will show the relevant > info. So add the check and record of the first found 'arm_spe_pmu' to > fix this issue here. > > Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support") > Signed-off-by: Wei Li Thanks for the patch, Wei. I have tested this series on Arm64 D06 platform: Tested-by: Leo Yan I'd like to wait for Mathieu's ACK. Thanks, Leo > --- > tools/perf/arch/arm/util/auxtrace.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c > index 0a6e75b8777a..28a5d0c18b1d 100644 > --- a/tools/perf/arch/arm/util/auxtrace.c > +++ b/tools/perf/arch/arm/util/auxtrace.c > @@ -56,7 +56,7 @@ struct auxtrace_record > struct perf_pmu *cs_etm_pmu; > struct evsel *evsel; > bool found_etm = false; > - bool found_spe = false; > + struct perf_pmu *found_spe = NULL; > static struct perf_pmu **arm_spe_pmus = NULL; > static int nr_spes = 0; > int i = 0; > @@ -74,12 +74,12 @@ struct auxtrace_record > evsel->core.attr.type == cs_etm_pmu->type) > found_etm = true; > > - if (!nr_spes) > + if (!nr_spes || found_spe) > continue; > > for (i = 0; i < nr_spes; i++) { > if (evsel->core.attr.type == arm_spe_pmus[i]->type) { > - found_spe = true; > + found_spe = arm_spe_pmus[i]; > break; > } > } > @@ -96,7 +96,7 @@ struct auxtrace_record > > #if defined(__aarch64__) > if (found_spe) > - return arm_spe_recording_init(err, arm_spe_pmus[i]); > + return arm_spe_recording_init(err, found_spe); > #endif > > /* > -- > 2.17.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33D4CC433EA for ; Fri, 24 Jul 2020 09:00:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F3E0D206EB for ; Fri, 24 Jul 2020 09:00:56 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Fri, 24 Jul 2020 01:59:24 -0700 (PDT) Received: from leoy-ThinkPad-X240s ([117.136.120.151]) by smtp.gmail.com with ESMTPSA id s30sm5729984pgn.34.2020.07.24.01.59.15 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 24 Jul 2020 01:59:24 -0700 (PDT) Date: Fri, 24 Jul 2020 16:59:11 +0800 From: Leo Yan To: Wei Li Subject: Re: [PATCH v2 1/2] perf tools: Fix record failure when mixed with ARM SPE event Message-ID: <20200724085911.GA8487@leoy-ThinkPad-X240s> References: <20200724071111.35593-1-liwei391@huawei.com> <20200724071111.35593-2-liwei391@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200724071111.35593-2-liwei391@huawei.com> User-Agent: Mutt/1.9.4 (2018-02-28) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200724_045926_983844_CBD248AC X-CRM114-Status: GOOD ( 24.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Kim Phillips , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , guohanjun@huawei.com, Namhyung Kim , Jiri Olsa , linux-arm-kernel@lists.infradead.org, Mike Leach Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Jul 24, 2020 at 03:11:10PM +0800, Wei Li wrote: > When recording with cache-misses and arm_spe_x event, i found that > it will just fail without showing any error info if i put cache-misses > after 'arm_spe_x' event. > > [root@localhost 0620]# perf record -e cache-misses -e \ > arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,\ > jitter=1,store_filter=1,min_latency=0/ sleep 1 > [ perf record: Woken up 1 times to write data ] > [ perf record: Captured and wrote 0.067 MB perf.data ] > [root@localhost 0620]# perf record -e \ > arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,\ > store_filter=1,min_latency=0/ -e cache-misses sleep 1 > [root@localhost 0620]# > > The current code can only work if the only event to be traced is an > 'arm_spe_x', or if it is the last event to be specified. Otherwise the > last event type will be checked against all the arm_spe_pmus[i]->types, > none will match and an out of bound 'i' index will be used in > arm_spe_recording_init(). > > We don't support concurrent multiple arm_spe_x events currently, that > is checked in arm_spe_recording_options(), and it will show the relevant > info. So add the check and record of the first found 'arm_spe_pmu' to > fix this issue here. > > Fixes: ffd3d18c20b8d ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support") > Signed-off-by: Wei Li Thanks for the patch, Wei. I have tested this series on Arm64 D06 platform: Tested-by: Leo Yan I'd like to wait for Mathieu's ACK. Thanks, Leo > --- > tools/perf/arch/arm/util/auxtrace.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c > index 0a6e75b8777a..28a5d0c18b1d 100644 > --- a/tools/perf/arch/arm/util/auxtrace.c > +++ b/tools/perf/arch/arm/util/auxtrace.c > @@ -56,7 +56,7 @@ struct auxtrace_record > struct perf_pmu *cs_etm_pmu; > struct evsel *evsel; > bool found_etm = false; > - bool found_spe = false; > + struct perf_pmu *found_spe = NULL; > static struct perf_pmu **arm_spe_pmus = NULL; > static int nr_spes = 0; > int i = 0; > @@ -74,12 +74,12 @@ struct auxtrace_record > evsel->core.attr.type == cs_etm_pmu->type) > found_etm = true; > > - if (!nr_spes) > + if (!nr_spes || found_spe) > continue; > > for (i = 0; i < nr_spes; i++) { > if (evsel->core.attr.type == arm_spe_pmus[i]->type) { > - found_spe = true; > + found_spe = arm_spe_pmus[i]; > break; > } > } > @@ -96,7 +96,7 @@ struct auxtrace_record > > #if defined(__aarch64__) > if (found_spe) > - return arm_spe_recording_init(err, arm_spe_pmus[i]); > + return arm_spe_recording_init(err, found_spe); > #endif > > /* > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel