From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0266BC433DF for ; Mon, 27 Jul 2020 06:26:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D29F6207BB for ; Mon, 27 Jul 2020 06:26:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ejdZFEQv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726139AbgG0G05 (ORCPT ); Mon, 27 Jul 2020 02:26:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726122AbgG0G04 (ORCPT ); Mon, 27 Jul 2020 02:26:56 -0400 Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3EC2C0619D4 for ; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) Received: by mail-pj1-x1042.google.com with SMTP id k1so8617434pjt.5 for ; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=ejdZFEQvh05oUlpaaf9ORS5njhfQig6+GWZ5iAPvih6BwIK+yozIcqu5gDr5y2tL56 ADgJc78zCBS2EW98C0yjIxuIsjhx09ehgqbbeHbAwoyMpOQVXTQH1nMrTOPbKRHgt8O9 sEQlDf+2CMo4G6gOuRpnv5VESD2+VrOWa7LgfpsijoI1HeDvVons3C2Y9+dsPMLZ1Oz3 Bdws0mCecBLhZm6sHQMYNW4/SJu9hk164lbUn1lN17jQ742Assa0ed2lVhx7uFglNVLw cZMgphZV/5Ax8e+K6npZ4GuvFErEUH7JIESgfsRAUz25GtLadeKzdGjt153zNVy4+pwE fIiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=DW4ZQUXRkV4eO5N76pnSJ1Ik5goiV8lR9C2qiXoZj0ytCDF6WvWcniCFSwAF5fp7Bq mmHySCW5crn1UbwrCdrKbpqC9WMwGNo2sFxqNgr7So6pWA1wTSeX9lTAFaG8k8A2mfvQ rU+bA1RFojMthzb0v4VCKCWPj5RvaAlumlkCEkfJA6m7bQn7dl8uDh7rSSUj8/JHvxqX zyq7YrbxkeGJXUa3XlPSMDhyg3zzBa3i7tTsUDsp9eqNriMISrQYpn8/7EdUW+LdoB8C g0wN8PRWPg0QztIo1ytgzM9C9Uz3euS1nreoTIPXx4bMVPLlbqECiLAp3dnoAi5Xp4Ij egOw== X-Gm-Message-State: AOAM530nIYnkYOWh8U3X2SK/wjlx8T4x7AU+VIKRUoEQ61eCCb/+Xq2D Q+aG2bwp8GoniNdPa+M90yqvDw== X-Google-Smtp-Source: ABdhPJxzOwp68yM0wuFfeb8opsYwXxFrJEEJC31OdMJvY+oua+KBvMHJty3QtAaz4JwNX0GSAm9idQ== X-Received: by 2002:a17:902:aa82:: with SMTP id d2mr17236160plr.336.1595831214315; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) Received: from ripper (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id g23sm3090336pfo.95.2020.07.26.23.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2020 23:26:53 -0700 (PDT) Date: Sun, 26 Jul 2020 23:27:03 -0700 From: Bjorn Andersson To: Jordan Crouse Cc: linux-arm-msm@vger.kernel.org, Robin Murphy , Will Deacon , freedreno@lists.freedesktop.org, iommu@lists.linux-foundation.org, Sai Prakash Ranjan , Joerg Roedel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v10 04/13] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU Message-ID: <20200727062703.GB3521288@ripper> References: <20200720154047.3611092-1-jcrouse@codeaurora.org> <20200720154047.3611092-5-jcrouse@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200720154047.3611092-5-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon 20 Jul 08:40 PDT 2020, Jordan Crouse wrote: > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c [..] > +static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, > + struct device *dev, int start, int count) > +{ > + struct arm_smmu_device *smmu = smmu_domain->smmu; > + > + /* > + * Assign context bank 0 to the GPU device so the GPU hardware can > + * switch pagetables > + */ > + if (qcom_adreno_smmu_is_gpu_device(dev)) { > + if (start > 0 || test_bit(0, smmu->context_map)) > + return -ENOSPC; > + > + set_bit(0, smmu->context_map); > + return 0; > + } > + > + return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); If we end up here before the GPU device shows up this is going to steal the first context bank, causing the subsequent allocation for the GPU to always fail. As such I think it would be appropriate for you to adjust "start" to never be 0 here. And I think it would be appropriate to write this function as: if (gpu) { start = 0; count = 1; } else { if (start == 0) start = 1; } return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); Regards, Bjorn From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EEBAC433E4 for ; Mon, 27 Jul 2020 06:26:59 +0000 (UTC) Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1607A2072E for ; Mon, 27 Jul 2020 06:26:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ejdZFEQv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1607A2072E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id C1EE52036D; Mon, 27 Jul 2020 06:26:58 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7E-P7G4fxY9d; Mon, 27 Jul 2020 06:26:57 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by silver.osuosl.org (Postfix) with ESMTP id 6C38120134; Mon, 27 Jul 2020 06:26:57 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 4CD7FC0050; Mon, 27 Jul 2020 06:26:57 +0000 (UTC) Received: from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133]) by lists.linuxfoundation.org (Postfix) with ESMTP id DB946C004D for ; Mon, 27 Jul 2020 06:26:55 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by hemlock.osuosl.org (Postfix) with ESMTP id C486A87134 for ; Mon, 27 Jul 2020 06:26:55 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from hemlock.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TMEJz1ATIxkb for ; Mon, 27 Jul 2020 06:26:55 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from mail-pj1-f68.google.com (mail-pj1-f68.google.com [209.85.216.68]) by hemlock.osuosl.org (Postfix) with ESMTPS id EF522870AD for ; Mon, 27 Jul 2020 06:26:54 +0000 (UTC) Received: by mail-pj1-f68.google.com with SMTP id c6so2022457pje.1 for ; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=ejdZFEQvh05oUlpaaf9ORS5njhfQig6+GWZ5iAPvih6BwIK+yozIcqu5gDr5y2tL56 ADgJc78zCBS2EW98C0yjIxuIsjhx09ehgqbbeHbAwoyMpOQVXTQH1nMrTOPbKRHgt8O9 sEQlDf+2CMo4G6gOuRpnv5VESD2+VrOWa7LgfpsijoI1HeDvVons3C2Y9+dsPMLZ1Oz3 Bdws0mCecBLhZm6sHQMYNW4/SJu9hk164lbUn1lN17jQ742Assa0ed2lVhx7uFglNVLw cZMgphZV/5Ax8e+K6npZ4GuvFErEUH7JIESgfsRAUz25GtLadeKzdGjt153zNVy4+pwE fIiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=IlEzjmRoY5JkT2S77oGZ00577YvqPF4wcfVSn3Ibvqswjd6btCHr28YmjXarmoZaky dAgz/T2SZhOr9k5T7jNxEwIKY9pCK/+YPE52GJzqbNwJceRQGorIIexrFe3tK3m0pBtC B0hAmhssx25LQTYrsEYfyfuoaG/CUBl5UzpFcgatC74l1PwWNWrIhhxbNjJpLCgDb5am mZes1uRBqde2OO9r/lLm1GkxwhvH3yTmbxUI17YaSDLBDmrIn59No/L+Pi61YCCfSRv4 8IpKWs/SIHx+7g3wmMA8ghf3g7vE0y4fRtxdzRkT+Fcnp7gdStFE40KQ4JKH5+42VVtJ OjOg== X-Gm-Message-State: AOAM533hJK/zcMQbB5gOaYaayjNgTh+WjJoSBrW8k3ojQi5OxJIlfV1G S692pz7dvW+NSLuYBgmb6+DOjA== X-Google-Smtp-Source: ABdhPJxzOwp68yM0wuFfeb8opsYwXxFrJEEJC31OdMJvY+oua+KBvMHJty3QtAaz4JwNX0GSAm9idQ== X-Received: by 2002:a17:902:aa82:: with SMTP id d2mr17236160plr.336.1595831214315; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) Received: from ripper (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id g23sm3090336pfo.95.2020.07.26.23.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2020 23:26:53 -0700 (PDT) Date: Sun, 26 Jul 2020 23:27:03 -0700 From: Bjorn Andersson To: Jordan Crouse Subject: Re: [PATCH v10 04/13] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU Message-ID: <20200727062703.GB3521288@ripper> References: <20200720154047.3611092-1-jcrouse@codeaurora.org> <20200720154047.3611092-5-jcrouse@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200720154047.3611092-5-jcrouse@codeaurora.org> Cc: Will Deacon , linux-arm-msm@vger.kernel.org, Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon 20 Jul 08:40 PDT 2020, Jordan Crouse wrote: > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c [..] > +static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, > + struct device *dev, int start, int count) > +{ > + struct arm_smmu_device *smmu = smmu_domain->smmu; > + > + /* > + * Assign context bank 0 to the GPU device so the GPU hardware can > + * switch pagetables > + */ > + if (qcom_adreno_smmu_is_gpu_device(dev)) { > + if (start > 0 || test_bit(0, smmu->context_map)) > + return -ENOSPC; > + > + set_bit(0, smmu->context_map); > + return 0; > + } > + > + return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); If we end up here before the GPU device shows up this is going to steal the first context bank, causing the subsequent allocation for the GPU to always fail. As such I think it would be appropriate for you to adjust "start" to never be 0 here. And I think it would be appropriate to write this function as: if (gpu) { start = 0; count = 1; } else { if (start == 0) start = 1; } return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); Regards, Bjorn _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4C0AC433E0 for ; Mon, 27 Jul 2020 06:28:24 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 90B4720714 for ; Mon, 27 Jul 2020 06:28:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="stv/ZmrO"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ejdZFEQv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 90B4720714 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=QO7qfbYJCg68+cLfvPXrs1xcLJwe2uFvpr3VNTzIOoE=; b=stv/ZmrOGMM4MGJLEZCRiOSnG 1uLq8x8Mh24dQElmWco7roKrb5B/WvDikJdxlHz+oIUcNQ8WZUG8Kw7B9lBQeSQ7epPo9mZw8HTPy a42B5WLR9KgjqTQS4cQATnBhTO/ZENWhyFg4J3P9tgksGUfyS3lPu9rA3FJaNmZEksNHtas5fyj+N tPYE0zJvame7EzJSRg9G3GquLLUYkdGaxMDvJrc/Mr3mCZya+E46vY/IzDpT00mj0iOEkY/b6MTsr FrFFbqtFeXxf67/ab5sB1AeSfJGBcK9Vh08CYhL5kwaWUnHn/GCl4Phx8aW/sawVKBy34mdi6uN/q elftTPBKw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jzwbF-0000sq-Su; Mon, 27 Jul 2020 06:27:01 +0000 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jzwbC-0000rh-3X for linux-arm-kernel@lists.infradead.org; Mon, 27 Jul 2020 06:26:59 +0000 Received: by mail-pj1-x1043.google.com with SMTP id f9so2537870pju.4 for ; Sun, 26 Jul 2020 23:26:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=ejdZFEQvh05oUlpaaf9ORS5njhfQig6+GWZ5iAPvih6BwIK+yozIcqu5gDr5y2tL56 ADgJc78zCBS2EW98C0yjIxuIsjhx09ehgqbbeHbAwoyMpOQVXTQH1nMrTOPbKRHgt8O9 sEQlDf+2CMo4G6gOuRpnv5VESD2+VrOWa7LgfpsijoI1HeDvVons3C2Y9+dsPMLZ1Oz3 Bdws0mCecBLhZm6sHQMYNW4/SJu9hk164lbUn1lN17jQ742Assa0ed2lVhx7uFglNVLw cZMgphZV/5Ax8e+K6npZ4GuvFErEUH7JIESgfsRAUz25GtLadeKzdGjt153zNVy4+pwE fIiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=SvwHT3zjyXrrBuntHjIVAEV0M2NnXn0+m3b0NtDYJoE=; b=bWz3r22cijLNK8qiqfJw0CsKpGfJXqp2I5z3o6Rgkrs00Q74DmkUdLAOw+8r5lONTo U0rbhJHa/DDq3rgVskf5Hn9tQKAz962cy7oMWjgQVDG0z7lY+wDS0tjMc3lQyutAF9KG iYpXvbMFQlFz9SDnLAiy8E+M0ASRy6g+IezdJOpRmmJG5St5XPITEjqLPQ5P6dwums7C uFWDxl2ldjImxvzGOH0GjsuWd6DhRFd3cuHU1iCZ95xRWGuTwZs+VMHxieOL6Fbv+xsd Jsop4QSW5A8owie189jRkC4Ta8yvNgfsXRsqcMeSdG8jg90VHUo1Q+HYWxECd10MZlOj /G1w== X-Gm-Message-State: AOAM533TkaNDTmmYEzGEkzpvHIqUEVLr0JtXVtMeDCK5lNmEiPS5umXK 8cxmQd1V6CkhsbNpIE8ycSnvAQ== X-Google-Smtp-Source: ABdhPJxzOwp68yM0wuFfeb8opsYwXxFrJEEJC31OdMJvY+oua+KBvMHJty3QtAaz4JwNX0GSAm9idQ== X-Received: by 2002:a17:902:aa82:: with SMTP id d2mr17236160plr.336.1595831214315; Sun, 26 Jul 2020 23:26:54 -0700 (PDT) Received: from ripper (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id g23sm3090336pfo.95.2020.07.26.23.26.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2020 23:26:53 -0700 (PDT) Date: Sun, 26 Jul 2020 23:27:03 -0700 From: Bjorn Andersson To: Jordan Crouse Subject: Re: [PATCH v10 04/13] iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU Message-ID: <20200727062703.GB3521288@ripper> References: <20200720154047.3611092-1-jcrouse@codeaurora.org> <20200720154047.3611092-5-jcrouse@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200720154047.3611092-5-jcrouse@codeaurora.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200727_022658_164786_D1BC92E0 X-CRM114-Status: GOOD ( 13.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Prakash Ranjan , Will Deacon , linux-arm-msm@vger.kernel.org, Joerg Roedel , Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon 20 Jul 08:40 PDT 2020, Jordan Crouse wrote: > diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c [..] > +static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, > + struct device *dev, int start, int count) > +{ > + struct arm_smmu_device *smmu = smmu_domain->smmu; > + > + /* > + * Assign context bank 0 to the GPU device so the GPU hardware can > + * switch pagetables > + */ > + if (qcom_adreno_smmu_is_gpu_device(dev)) { > + if (start > 0 || test_bit(0, smmu->context_map)) > + return -ENOSPC; > + > + set_bit(0, smmu->context_map); > + return 0; > + } > + > + return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); If we end up here before the GPU device shows up this is going to steal the first context bank, causing the subsequent allocation for the GPU to always fail. As such I think it would be appropriate for you to adjust "start" to never be 0 here. And I think it would be appropriate to write this function as: if (gpu) { start = 0; count = 1; } else { if (start == 0) start = 1; } return __arm_smmu_alloc_bitmap(smmu->context_map, start, count); Regards, Bjorn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel