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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Vinod Koul <vkoul@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Rob Herring <robh+dt@kernel.org>,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/5] dmaengine: dw: Ignore burst setting for memory peripherals
Date: Thu, 30 Jul 2020 19:31:22 +0300	[thread overview]
Message-ID: <20200730163122.GW3703480@smile.fi.intel.com> (raw)
In-Reply-To: <20200730154545.3965-5-Sergey.Semin@baikalelectronics.ru>

On Thu, Jul 30, 2020 at 06:45:44PM +0300, Serge Semin wrote:
> According to the DW DMA controller Databook (page 40 "3.5 Memory

Which version of it?

> Peripherals") memory peripherals don't have handshaking interface
> connected to the controller, therefore they can never be a flow
> controller. Since the CTLx.SRC_MSIZE and CTLx.DEST_MSIZE are
> properties valid only for peripherals with a handshaking
> interface, we can freely zero these fields out if the memory peripheral
> is selected to be the source or the destination of the DMA transfers.
> 
> Note according to the databook, length of burst transfers to memory is
> always equal to the number of data items available in a channel FIFO or
> data items required to complete the block transfer, whichever is smaller;
> length of burst transfers from memory is always equal to the space
> available in a channel FIFO or number of data items required to complete
> the block transfer, whichever is smaller.

But does it really matter if you program there something or not?

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2020-07-30 16:31 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-30 15:45 [PATCH 0/5] dmaengine: dw: Introduce non-mem peripherals optimizations Serge Semin
2020-07-30 15:45 ` [PATCH 1/5] dt-bindings: dma: dw: Add optional DMA-channels mask cell support Serge Semin
2020-07-31 22:42   ` Rob Herring
2020-07-30 15:45 ` [PATCH 2/5] dmaengine: dw: Activate FIFO-mode for memory peripherals only Serge Semin
2020-07-30 16:24   ` Andy Shevchenko
2020-07-30 16:31     ` Serge Semin
2020-07-30 16:47       ` Andy Shevchenko
2020-07-30 17:13         ` Serge Semin
2020-07-31 16:52           ` Vinod Koul
2020-07-31 16:57             ` Serge Semin
2020-07-30 15:45 ` [PATCH 3/5] dmaengine: dw: Discard dlen from the dev-to-mem xfer width calculation Serge Semin
2020-07-30 16:28   ` Andy Shevchenko
2020-07-30 15:45 ` [PATCH 4/5] dmaengine: dw: Ignore burst setting for memory peripherals Serge Semin
2020-07-30 16:31   ` Andy Shevchenko [this message]
2020-07-30 16:37     ` Serge Semin
2020-07-30 15:45 ` [PATCH 5/5] dmaengine: dw: Add DMA-channels mask cell support Serge Semin
2020-07-30 16:41   ` Andy Shevchenko
2020-07-30 17:11     ` Serge Semin

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