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From: Martin Doucha <mdoucha@suse.cz>
To: ltp@lists.linux.it
Subject: [LTP] [PATCH 1/2] Add some 32-bit instruction macros to BPF LAPI
Date: Thu,  6 Aug 2020 13:08:05 +0200	[thread overview]
Message-ID: <20200806110806.28793-1-mdoucha@suse.cz> (raw)

Signed-off-by: Martin Doucha <mdoucha@suse.cz>
---
 include/lapi/bpf.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/include/lapi/bpf.h b/include/lapi/bpf.h
index 22b13b47b..f27a92146 100644
--- a/include/lapi/bpf.h
+++ b/include/lapi/bpf.h
@@ -449,6 +449,14 @@ enum bpf_func_id {
 		.off   = 0,					\
 		.imm   = 0 })
 
+#define BPF_ALU32_REG(OP, DST, SRC)				\
+	((struct bpf_insn) {					\
+		.code  = BPF_ALU | BPF_OP(OP) | BPF_X,		\
+		.dst_reg = DST,					\
+		.src_reg = SRC,					\
+		.off   = 0,					\
+		.imm   = 0 })
+
 #define BPF_ALU64_IMM(OP, DST, IMM)				\
 	((struct bpf_insn) {					\
 		.code  = BPF_ALU64 | BPF_OP(OP) | BPF_K,	\
@@ -457,6 +465,14 @@ enum bpf_func_id {
 		.off   = 0,					\
 		.imm   = IMM })
 
+#define BPF_ALU32_IMM(OP, DST, IMM)				\
+	((struct bpf_insn) {					\
+		.code  = BPF_ALU | BPF_OP(OP) | BPF_K,		\
+		.dst_reg = DST,					\
+		.src_reg = 0,					\
+		.off   = 0,					\
+		.imm   = IMM })
+
 #define BPF_MOV64_REG(DST, SRC)					\
 	((struct bpf_insn) {					\
 		.code  = BPF_ALU64 | BPF_MOV | BPF_X,		\
@@ -465,6 +481,14 @@ enum bpf_func_id {
 		.off   = 0,					\
 		.imm   = 0 })
 
+#define BPF_MOV32_REG(DST, SRC)					\
+	((struct bpf_insn) {					\
+		.code  = BPF_ALU | BPF_MOV | BPF_X,		\
+		.dst_reg = DST,					\
+		.src_reg = SRC,					\
+		.off   = 0,					\
+		.imm   = 0 })
+
 #define BPF_LD_IMM64(DST, IMM)					\
 	BPF_LD_IMM64_RAW(DST, 0, IMM)
 
-- 
2.27.0


             reply	other threads:[~2020-08-06 11:08 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-06 11:08 Martin Doucha [this message]
2020-08-06 11:08 ` [LTP] [PATCH 2/2] Add test for CVE 2018-18445 Martin Doucha
2020-08-12 13:32   ` Cyril Hrubis

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