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Date:   Fri, 7 Aug 2020 15:39:27 -0300
From:   Jason Gunthorpe <jgg@nvidia.com>
To:     "Dey, Megha" <megha.dey@intel.com>
CC:     Thomas Gleixner <tglx@linutronix.de>,
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Subject: Re: [PATCH RFC v2 02/18] irq/dev-msi: Add support for a new DEV_MSI
 irq domain
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On Fri, Aug 07, 2020 at 10:54:51AM -0700, Dey, Megha wrote:

> So from the hierarchical domain standpoint, we will have:
> - For DSA device: vector->intel-IR->IDXD
> - For Jason's device: root domain-> domain A-> Jason's device's IRQ domai=
n
> - For any other intel IMS device in the future which
> =C2=A0=C2=A0=C2=A0 does not require interrupt remapping: vector->new devi=
ce IRQ domain
> =C2=A0=C2=A0=C2=A0 requires interrupt remapping: vector->intel-IR->new de=
vice IRQ domain

I think you need a better classification than Jason's device or
Intel's device :)

Shouldn't the two cases be either you take the parent domain from the
IOMMU or you take the parent domain from the pci device?

What other choices could a PCI driver make?

Jason