All of lore.kernel.org
 help / color / mirror / Atom feed
From: Alistair Francis <alistair.francis@wdc.com>
To: qemu-devel@nongnu.org
Cc: Hou Weiying <weiying_hou@outlook.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Myriad-Dreamin <camiyoru@gmail.com>,
	Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Subject: [PULL 09/20] riscv: Fix bug in setting pmpcfg CSR for RISCV64
Date: Wed, 12 Aug 2020 15:30:34 -0700	[thread overview]
Message-ID: <20200812223045.96803-10-alistair.francis@wdc.com> (raw)
In-Reply-To: <20200812223045.96803-1-alistair.francis@wdc.com>

From: Hou Weiying <weiying_hou@outlook.com>

First, sizeof(target_ulong) equals to 4 on riscv32, so this change
does not change the function on riscv32. Second, sizeof(target_ulong)
equals to 8 on riscv64, and 'reg_index * 8 + i' is not a legal
pmp_index (we will explain later), which should be 'reg_index * 4 + i'.

If the parameter reg_index equals to 2 (means that we will change the
value of pmpcfg2, or the second pmpcfg on riscv64), then
pmpcfg_csr_write(env, 2, val) will map write tasks to
pmp_write_cfg(env, 2 * 8 + [0...7], val). However, no cfg csr is indexed
by value 16 or 23 on riscv64, so we consider it as a bug.

We are looking for constant (e.g., define a new constant named
RISCV_WORD_SIZE) in QEMU to help others understand code better,
but none was found. A possible good explanation of this literal is it is
the minimum word length on riscv is 4 bytes (32 bit).

Signed-off-by: Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
Signed-off-by: Hou Weiying <weiying_hou@outlook.com>
Signed-off-by: Myriad-Dreamin <camiyoru@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <SG2PR02MB263420036254AC8841F66CE393460@SG2PR02MB2634.apcprd02.prod.outlook.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/pmp.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 2a2b9f5363..b14feeb7da 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -320,8 +320,7 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
 
     for (i = 0; i < sizeof(target_ulong); i++) {
         cfg_val = (val >> 8 * i)  & 0xff;
-        pmp_write_cfg(env, (reg_index * sizeof(target_ulong)) + i,
-            cfg_val);
+        pmp_write_cfg(env, (reg_index * 4) + i, cfg_val);
     }
 }
 
@@ -336,7 +335,7 @@ target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index)
     target_ulong val = 0;
 
     for (i = 0; i < sizeof(target_ulong); i++) {
-        val = pmp_read_cfg(env, (reg_index * sizeof(target_ulong)) + i);
+        val = pmp_read_cfg(env, (reg_index * 4) + i);
         cfg_val |= (val << (i * 8));
     }
     trace_pmpcfg_csr_read(env->mhartid, reg_index, cfg_val);
-- 
2.27.0



  parent reply	other threads:[~2020-08-12 22:48 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-12 22:30 [PULL 00/20] riscv-to-apply queue Alistair Francis
2020-08-12 22:30 ` [PULL 01/20] target/riscv: Generate nanboxed results from fp helpers Alistair Francis
2020-08-12 22:30 ` [PULL 02/20] target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s Alistair Francis
2020-08-12 22:30 ` [PULL 03/20] target/riscv: Generate nanboxed results from trans_rvf.inc.c Alistair Francis
2020-08-12 22:30 ` [PULL 04/20] target/riscv: Check nanboxed inputs to fp helpers Alistair Francis
2020-08-12 22:30 ` [PULL 05/20] target/riscv: Check nanboxed inputs in trans_rvf.inc.c Alistair Francis
2020-08-13  2:14   ` LIU Zhiwei
2020-08-13 14:46     ` Alistair Francis
2020-08-13 16:48       ` Richard Henderson
2020-08-13 21:19         ` Alistair Francis
2020-08-12 22:30 ` [PULL 06/20] target/riscv: Clean up fmv.w.x Alistair Francis
2020-08-12 22:30 ` [PULL 07/20] target/riscv: check before allocating TCG temps Alistair Francis
2020-08-12 22:30 ` [PULL 08/20] hw/riscv: sifive_u: Add a dummy L2 cache controller device Alistair Francis
2020-08-12 22:30 ` Alistair Francis [this message]
2020-08-12 22:30 ` [PULL 10/20] configure: Create symbolic links for pc-bios/*.elf files Alistair Francis
2020-08-12 22:30 ` [PULL 11/20] roms/opensbi: Upgrade from v0.7 to v0.8 Alistair Francis
2020-08-12 22:30 ` [PULL 12/20] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware Alistair Francis
2020-08-12 22:30 ` [PULL 13/20] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u Alistair Francis
2020-08-12 22:30 ` [PULL 14/20] hw/riscv: spike: Change the default bios to use generic platform image Alistair Francis
2020-08-12 22:30 ` [PULL 15/20] gitlab-ci/opensbi: Update GitLab CI to build generic platform Alistair Francis
2020-08-12 22:30 ` [PULL 16/20] target/riscv: Fix the translation of physical address Alistair Francis
2020-08-12 22:30 ` [PULL 17/20] target/riscv: Change the TLB page size depends on PMP entries Alistair Francis
2020-08-12 22:30 ` [PULL 18/20] hw/intc: ibex_plic: Update the pending irqs Alistair Francis
2020-08-12 22:30 ` [PULL 19/20] hw/intc: ibex_plic: Don't allow repeat interrupts on claimed lines Alistair Francis
2020-08-12 22:30 ` [PULL 20/20] hw/intc: ibex_plic: Honour source priorities Alistair Francis
2020-08-13  7:53 ` [PULL 00/20] riscv-to-apply queue Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200812223045.96803-10-alistair.francis@wdc.com \
    --to=alistair.francis@wdc.com \
    --cc=Ethan.Lee.QNL@gmail.com \
    --cc=camiyoru@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=weiying_hou@outlook.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.