From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E636FC433E1 for ; Mon, 17 Aug 2020 19:51:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9D89B20658 for ; Mon, 17 Aug 2020 19:51:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597693863; bh=CrbNmZ6FMVsPMZu0i7WiMTRVaTILOfMy4YBuKJ5xS6w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=h37S9mJwFDng5vuR75Nxv0Rx29U6jEJHN/fmK8VmmOzQDssLOPBspVfNBiHujjAgx oS11XibVFUoJVUQB164MeacDYJQPjmSm8zQY+Z4ExYzmW895gcDojZyZuJGPoE5XmW ngr0naO9RWyLYxqcv4EJkb97R3cupO2tgLBk9sRo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404455AbgHQTvA (ORCPT ); Mon, 17 Aug 2020 15:51:00 -0400 Received: from mail.kernel.org ([198.145.29.99]:40620 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729208AbgHQPTH (ORCPT ); Mon, 17 Aug 2020 11:19:07 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 871D0206FA; Mon, 17 Aug 2020 15:19:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597677544; bh=CrbNmZ6FMVsPMZu0i7WiMTRVaTILOfMy4YBuKJ5xS6w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rww05Wg1rtOKq75fSn3TjwCn/y8nSDucs6WGMx9nCCuyUFvOCuzB4B2s+EbRI3Gus TET64yysh0kh7JH33jmrIn4zJDIChNZKcYOyyRNyzdzN08C9ZS43zC9V1nBEU1FUII 0dwzk7hjv0OglzfyCT7pUihvXjO/Tb7OYL1J/8L8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Erwan Le Ray , Alexandre Torgue , Sasha Levin Subject: [PATCH 5.8 005/464] ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl Date: Mon, 17 Aug 2020 17:09:18 +0200 Message-Id: <20200817143834.002431232@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200817143833.737102804@linuxfoundation.org> References: <20200817143833.737102804@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Erwan Le Ray [ Upstream commit f6b43d89d3b5a31bf4251a26c61e92bf659e74c5 ] Fix usart and uart nodes ordering. Several usart nodes didn't respect expecting ordering. Fixes: 077e0638fc83 ("ARM: dts: stm32: Add alternate pinmux for USART2 pins on stm32mp15") Signed-off-by: Erwan Le Ray Signed-off-by: Alexandre Torgue Signed-off-by: Sasha Levin --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 102 +++++++++++------------ 1 file changed, 51 insertions(+), 51 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 7eb858732d6d0..b31923a9498b5 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1574,143 +1574,143 @@ pins2 { }; }; - usart2_pins_a: usart2-0 { + uart4_pins_a: uart4-0 { pins1 { - pinmux = , /* USART2_TX */ - ; /* USART2_RTS */ + pinmux = ; /* UART4_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* USART2_RX */ - ; /* USART2_CTS_NSS */ + pinmux = ; /* UART4_RX */ bias-disable; }; }; - usart2_sleep_pins_a: usart2-sleep-0 { - pins { - pinmux = , /* USART2_TX */ - , /* USART2_RTS */ - , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - }; - }; - - usart2_pins_b: usart2-1 { + uart4_pins_b: uart4-1 { pins1 { - pinmux = , /* USART2_TX */ - ; /* USART2_RTS */ + pinmux = ; /* UART4_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* USART2_RX */ - ; /* USART2_CTS_NSS */ + pinmux = ; /* UART4_RX */ bias-disable; }; }; - usart2_sleep_pins_b: usart2-sleep-1 { - pins { - pinmux = , /* USART2_TX */ - , /* USART2_RTS */ - , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - }; - }; - - usart3_pins_a: usart3-0 { + uart4_pins_c: uart4-2 { pins1 { - pinmux = ; /* USART3_TX */ + pinmux = ; /* UART4_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* USART3_RX */ + pinmux = ; /* UART4_RX */ bias-disable; }; }; - uart4_pins_a: uart4-0 { + uart7_pins_a: uart7-0 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = ; /* UART4_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* UART4_RX */ + pinmux = , /* UART4_RX */ + , /* UART4_CTS */ + ; /* UART4_RTS */ bias-disable; }; }; - uart4_pins_b: uart4-1 { + uart7_pins_b: uart7-1 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = ; /* UART7_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* UART4_RX */ + pinmux = ; /* UART7_RX */ bias-disable; }; }; - uart4_pins_c: uart4-2 { + uart8_pins_a: uart8-0 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = ; /* UART8_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* UART4_RX */ + pinmux = ; /* UART8_RX */ bias-disable; }; }; - uart7_pins_a: uart7-0 { + usart2_pins_a: usart2-0 { pins1 { - pinmux = ; /* UART4_TX */ + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = , /* UART4_RX */ - , /* UART4_CTS */ - ; /* UART4_RTS */ + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ bias-disable; }; }; - uart7_pins_b: uart7-1 { + usart2_sleep_pins_a: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + + usart2_pins_b: usart2-1 { pins1 { - pinmux = ; /* UART7_TX */ + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* UART7_RX */ + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ bias-disable; }; }; - uart8_pins_a: uart8-0 { + usart2_sleep_pins_b: usart2-sleep-1 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + + usart3_pins_a: usart3-0 { pins1 { - pinmux = ; /* UART8_TX */ + pinmux = ; /* USART3_TX */ bias-disable; drive-push-pull; slew-rate = <0>; }; pins2 { - pinmux = ; /* UART8_RX */ + pinmux = ; /* USART3_RX */ bias-disable; }; }; -- 2.25.1