From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: Wright Feng <Wright.Feng@cypress.com>, linux-tegra@vger.kernel.org
Subject: [PATCH v1 1/4] ARM: tegra: acer-a500: Correct PINCTRL configuration
Date: Sun, 23 Aug 2020 17:47:22 +0300 [thread overview]
Message-ID: <20200823144725.28299-2-digetx@gmail.com> (raw)
In-Reply-To: <20200823144725.28299-1-digetx@gmail.com>
The low-power-mode drive was set to DIV_4 for some of PINCTRL groups,
while these groups should use DIV_1. This patch fixes the wrong PINCTRL
configurations and adds a full drive-setup for the changed configs, just
for completeness since the added values match the default configuration.
Now WiFi SDIO communication works properly using legacy signaling mode if
SDIO BUS clocked at 50MHz, which is a maximum SDIO clock rate on Tegra20.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
index f92712e4bd34..8b4912db0d20 100644
--- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
+++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
@@ -314,16 +314,24 @@ drive_ddc {
nvidia,pins = "drive_ddc",
"drive_vi1",
"drive_sdio1";
+ nvidia,pull-up-strength = <31>;
+ nvidia,pull-down-strength = <31>;
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
- nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_4>;
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
};
drive_dbg {
nvidia,pins = "drive_dbg",
"drive_vi2",
"drive_at1",
"drive_ao1";
+ nvidia,pull-up-strength = <31>;
+ nvidia,pull-down-strength = <31>;
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
- nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_4>;
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
};
--
2.27.0
next prev parent reply other threads:[~2020-08-23 14:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-23 14:47 [PATCH v1 0/4] WiFi SDIO fixes and improvements for Acer A500 and Nexus 7 Dmitry Osipenko
2020-08-23 14:47 ` Dmitry Osipenko [this message]
2020-08-23 14:47 ` [PATCH v1 2/4] ARM: tegra: acer-a500: Set WiFi MMC clock rate to 50MHz Dmitry Osipenko
2020-08-23 14:47 ` [PATCH v1 3/4] ARM: tegra: acer-a500: Use PLLC for WiFi MMC clk parent Dmitry Osipenko
2020-08-23 14:47 ` [PATCH v1 4/4] ARM: tegra: nexus7: " Dmitry Osipenko
2020-09-17 10:21 ` [PATCH v1 0/4] WiFi SDIO fixes and improvements for Acer A500 and Nexus 7 Thierry Reding
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