From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96375C433E2 for ; Tue, 1 Sep 2020 15:48:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62432206EB for ; Tue, 1 Sep 2020 15:48:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598975281; bh=UJ42Mfh9bPHjl8/DqG67pNEC5IjIOdTO5F1IYqKYwS0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=SDA/mPDSCzwOolvaa78isnpHxXlMn+ELNeQTBPwhPbJTyo/XGxmhZuKbXCaVX4I2l n4frRbTutVcHmVS9R0J3cXzAy3xAh9lg8zYNfa77FM2g7H7rlti9cRufS9MB5aMXe8 Nde8AZzxG38M8p/WyMyZNGmcCsHdoVgP4lRiWpgY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731799AbgIAPr7 (ORCPT ); Tue, 1 Sep 2020 11:47:59 -0400 Received: from mail.kernel.org ([198.145.29.99]:59688 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731468AbgIAPoW (ORCPT ); Tue, 1 Sep 2020 11:44:22 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 733C4206FA; Tue, 1 Sep 2020 15:44:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598975061; bh=UJ42Mfh9bPHjl8/DqG67pNEC5IjIOdTO5F1IYqKYwS0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=0JGoPpgmbVNx/3zgzzIR+ISnD2ESIV05Bbfhlbln2fhW7yvuViei2TygW1n13i4s+ XG42WbsVsffFtd1gzb9W6pZ8jlscIdWGv3+Q5MA1yLNbKqrZ/DiUvVLLWiZXRM7d/k u3daXV2CgjVCrhDQIOTbJ5oPaEbpZsKpB+Y3XwAU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Kai-Heng Feng , Mathias Nyman Subject: [PATCH 5.8 195/255] xhci: Do warm-reset when both CAS and XDEV_RESUME are set Date: Tue, 1 Sep 2020 17:10:51 +0200 Message-Id: <20200901151010.030657212@linuxfoundation.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200901151000.800754757@linuxfoundation.org> References: <20200901151000.800754757@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kai-Heng Feng commit 904df64a5f4d5ebd670801d869ca0a6d6a6e8df6 upstream. Sometimes re-plugging a USB device during system sleep renders the device useless: [ 173.418345] xhci_hcd 0000:00:14.0: Get port status 2-4 read: 0x14203e2, return 0x10262 ... [ 176.496485] usb 2-4: Waited 2000ms for CONNECT [ 176.496781] usb usb2-port4: status 0000.0262 after resume, -19 [ 176.497103] usb 2-4: can't resume, status -19 [ 176.497438] usb usb2-port4: logical disconnect Because PLS equals to XDEV_RESUME, xHCI driver reports U3 to usbcore, despite of CAS bit is flagged. So proritize CAS over XDEV_RESUME to let usbcore handle warm-reset for the port. Cc: stable Signed-off-by: Kai-Heng Feng Signed-off-by: Mathias Nyman Link: https://lore.kernel.org/r/20200821091549.20556-3-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/usb/host/xhci-hub.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c @@ -740,15 +740,6 @@ static void xhci_hub_report_usb3_link_st { u32 pls = status_reg & PORT_PLS_MASK; - /* resume state is a xHCI internal state. - * Do not report it to usb core, instead, pretend to be U3, - * thus usb core knows it's not ready for transfer - */ - if (pls == XDEV_RESUME) { - *status |= USB_SS_PORT_LS_U3; - return; - } - /* When the CAS bit is set then warm reset * should be performed on port */ @@ -771,6 +762,16 @@ static void xhci_hub_report_usb3_link_st pls |= USB_PORT_STAT_CONNECTION; } else { /* + * Resume state is an xHCI internal state. Do not report it to + * usb core, instead, pretend to be U3, thus usb core knows + * it's not ready for transfer. + */ + if (pls == XDEV_RESUME) { + *status |= USB_SS_PORT_LS_U3; + return; + } + + /* * If CAS bit isn't set but the Port is already at * Compliance Mode, fake a connection so the USB core * notices the Compliance state and resets the port.