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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Stephen Long <steplong@quicinc.com>
Subject: [PULL 2/5] tcg: Fix tcg gen for vectorized absolute value
Date: Thu,  3 Sep 2020 14:40:58 -0700	[thread overview]
Message-ID: <20200903214101.1746878-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200903214101.1746878-1-richard.henderson@linaro.org>

From: Stephen Long <steplong@quicinc.com>

The fallback inline expansion for vectorized absolute value,
when the host doesn't support such an insn was flawed.

E.g. when a vector of bytes has all elements negative, mask
will be 0xffff_ffff_ffff_ffff.  Subtracting mask only adds 1
to the low element instead of all elements becase -mask is 1
and not 0x0101_0101_0101_0101.

Signed-off-by: Stephen Long <steplong@quicinc.com>
Message-Id: <20200813161818.190-1-steplong@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg-op-gvec.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
index 3707c0effb..793d4ba64c 100644
--- a/tcg/tcg-op-gvec.c
+++ b/tcg/tcg-op-gvec.c
@@ -2264,12 +2264,13 @@ static void gen_absv_mask(TCGv_i64 d, TCGv_i64 b, unsigned vece)
     tcg_gen_muli_i64(t, t, (1 << nbit) - 1);
 
     /*
-     * Invert (via xor -1) and add one (via sub -1).
+     * Invert (via xor -1) and add one.
      * Because of the ordering the msb is cleared,
      * so we never have carry into the next element.
      */
     tcg_gen_xor_i64(d, b, t);
-    tcg_gen_sub_i64(d, d, t);
+    tcg_gen_andi_i64(t, t, dup_const(vece, 1));
+    tcg_gen_add_i64(d, d, t);
 
     tcg_temp_free_i64(t);
 }
-- 
2.25.1



  parent reply	other threads:[~2020-09-03 21:42 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-03 21:40 [PULL 0/5] tcg patch queue Richard Henderson
2020-09-03 21:40 ` [PULL 1/5] cputlb: Make store_helper less fragile to compiler optimizations Richard Henderson
2020-09-03 21:40 ` Richard Henderson [this message]
2020-09-03 21:40 ` [PULL 3/5] softmmu/cpus: Only set parallel_cpus for SMP Richard Henderson
2020-09-07 10:05   ` Claudio Fontana
2020-09-07 10:20     ` Philippe Mathieu-Daudé
2020-09-07 16:30       ` Claudio Fontana
2020-09-07 16:49         ` Philippe Mathieu-Daudé
2020-09-08  7:09           ` Claudio Fontana
2020-09-08  7:56             ` Philippe Mathieu-Daudé
2020-09-10  8:28               ` Claudio Fontana
2020-09-10 10:32                 ` Philippe Mathieu-Daudé
2020-09-03 21:41 ` [PULL 4/5] tcg: Eliminate one store for in-place 128-bit dup_mem Richard Henderson
2020-09-03 21:41 ` [PULL 5/5] tcg: Implement 256-bit dup for tcg_gen_gvec_dup_mem Richard Henderson
2020-09-06 13:07 ` [PULL 0/5] tcg patch queue Peter Maydell

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