From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 367E1C43461 for ; Mon, 7 Sep 2020 12:21:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E291D2137B for ; Mon, 7 Sep 2020 12:21:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729279AbgIGMVS (ORCPT ); Mon, 7 Sep 2020 08:21:18 -0400 Received: from foss.arm.com ([217.140.110.172]:34368 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729308AbgIGMSo (ORCPT ); Mon, 7 Sep 2020 08:18:44 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DB2361424; Mon, 7 Sep 2020 05:18:43 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.195.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C20CB3F66E; Mon, 7 Sep 2020 05:18:42 -0700 (PDT) From: Andre Przywara List-Id: To: soc@kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Wei Xu , Chanho Min , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks Date: Mon, 7 Sep 2020 13:18:29 +0100 Message-Id: <20200907121831.242281-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com> References: <20200907121831.242281-1-andre.przywara@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++---- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 5 +++-- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index d25aac5e0bf8..994140fbc916 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1089,16 +1089,18 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xe8a06000 0x0 0x1000>; interrupts = ; - clocks = <&crg_ctrl HI3660_OSC32K>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>; + clock-names = "wdog_clk", "apb_pclk"; }; watchdog1: watchdog@e8a07000 { compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xe8a07000 0x0 0x1000>; interrupts = ; - clocks = <&crg_ctrl HI3660_OSC32K>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>; + clock-names = "wdog_clk", "apb_pclk"; }; tsensor: tsensor@fff30000 { diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3d189d9f0d24..6578f8191d71 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -843,8 +843,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xf8005000 0x0 0x1000>; interrupts = ; - clocks = <&ao_ctrl HI6220_WDT0_PCLK>; - clock-names = "apb_pclk"; + clocks = <&ao_ctrl HI6220_WDT0_PCLK>, + <&ao_ctrl HI6220_WDT0_PCLK>; + clock-names = "wdog_clk", "apb_pclk"; }; tsensor: tsensor@0,f7030700 { -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE239C433E2 for ; Mon, 7 Sep 2020 12:20:41 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 58B762075A for ; Mon, 7 Sep 2020 12:20:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="V9xc1jqi" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 58B762075A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HRvPxb/Yu72tKvSmpwSx55NMV2fcQa5IuouGWo4Wx1Y=; b=V9xc1jqiThSZfW4shmf2p6Nw1Y j6BJG09rQOwgsblY8OJYWuIf0RWyNhBsWYpVHYtcrBObqi5R7qKgyHuxcYc7WUzfWWIfMZLeUygCG D1BBoJcb4nqQDVvchquU/oVsdPOtTEAtLgT09R0Sf1rJZnMyjOuBVph8eDz/K6AZYjR3P6A8rOvhO amzP+osBbKBLc6kmxLP36z4xf14tk//F7pGlq1UETFEySzsxRn78p+lvJttfwwUakyRNFMXM8u2Ge KE3ItisOXLu8z/1UAcvuJsFdGWkS0ZGCnHr0SFuByPfSCpIaNUWef7jKELqzF/e4JZtnVHJpPd/Ge Kc1VqDIg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kFG75-0007xk-E0; Mon, 07 Sep 2020 12:19:11 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kFG6e-0007je-LR for linux-arm-kernel@lists.infradead.org; Mon, 07 Sep 2020 12:18:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DB2361424; Mon, 7 Sep 2020 05:18:43 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.195.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C20CB3F66E; Mon, 7 Sep 2020 05:18:42 -0700 (PDT) From: Andre Przywara List-Id: To: soc@kernel.org Subject: [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks Date: Mon, 7 Sep 2020 13:18:29 +0100 Message-Id: <20200907121831.242281-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com> References: <20200907121831.242281-1-andre.przywara@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200907_081844_781532_F6CC5DB7 X-CRM114-Status: GOOD ( 14.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , devicetree@vger.kernel.org, Chanho Min , linux-kernel@vger.kernel.org, Wei Xu , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SP805 DT binding requires two clocks to be specified, but Hisilicon platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux and U-Boot SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++---- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 5 +++-- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index d25aac5e0bf8..994140fbc916 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1089,16 +1089,18 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xe8a06000 0x0 0x1000>; interrupts = ; - clocks = <&crg_ctrl HI3660_OSC32K>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>; + clock-names = "wdog_clk", "apb_pclk"; }; watchdog1: watchdog@e8a07000 { compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xe8a07000 0x0 0x1000>; interrupts = ; - clocks = <&crg_ctrl HI3660_OSC32K>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_OSC32K>, + <&crg_ctrl HI3660_OSC32K>; + clock-names = "wdog_clk", "apb_pclk"; }; tsensor: tsensor@fff30000 { diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3d189d9f0d24..6578f8191d71 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -843,8 +843,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xf8005000 0x0 0x1000>; interrupts = ; - clocks = <&ao_ctrl HI6220_WDT0_PCLK>; - clock-names = "apb_pclk"; + clocks = <&ao_ctrl HI6220_WDT0_PCLK>, + <&ao_ctrl HI6220_WDT0_PCLK>; + clock-names = "wdog_clk", "apb_pclk"; }; tsensor: tsensor@0,f7030700 { -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel