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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Lars Povlsen <lars.povlsen@microchip.com>,
	"wuxu . wu" <wuxu.wu@huawei.com>, Feng Tang <feng.tang@intel.com>,
	<linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH 29/30] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers
Date: Sun, 20 Sep 2020 14:29:13 +0300	[thread overview]
Message-ID: <20200920112914.26501-30-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200920112914.26501-1-Sergey.Semin@baikalelectronics.ru>

These controllers are based on the DW APB SSI IP-core and embedded into
the SoC, so two of them are equipped with IRQ, DMA, 64 words FIFOs and 4
native CS, while another one as being utilized by the Baikal-T1 System
Boot Controller has got a very limited resources: no IRQ, no DMA, only a
single native chip-select and just 8 bytes Tx/Rx FIFOs available. That's
why we have to mark the IRQ to be optional for the later interface.

The SPI controller embedded into the Baikal-T1 System Boot Controller can
be also used to directly access an external SPI flash by means of a
dedicated FSM. The corresponding MMIO region availability is switchable by
the embedded multiplexor, which phandle can be specified in the dts node.

* We added a new example to test out the non-standard Baikal-T1 System
Boot SPI Controller DT binding.

Co-developed-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 .../bindings/spi/snps,dw-apb-ssi.yaml         | 33 +++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index c62cbe79f00d..d6ae35777dac 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -22,6 +22,21 @@ allOf:
       properties:
         reg:
           minItems: 2
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - baikal,bt1-sys-ssi
+    then:
+      properties:
+        mux-controls:
+          maxItems: 1
+      required:
+        - mux-controls
+    else:
+      required:
+        - interrupts
 
 properties:
   compatible:
@@ -44,12 +59,16 @@ properties:
           - const: snps,dw-apb-ssi
       - description: Intel Keem Bay SPI Controller
         const: intel,keembay-ssi
+      - description: Baikal-T1 SPI Controller
+        const: baikal,bt1-ssi
+      - description: Baikal-T1 System Boot SPI Controller
+        const: baikal,bt1-sys-ssi
 
   reg:
     minItems: 1
     items:
       - description: DW APB SSI controller memory mapped registers
-      - description: SPI MST region map
+      - description: SPI MST region map or directly mapped SPI ROM
 
   interrupts:
     maxItems: 1
@@ -114,7 +133,6 @@ required:
   - reg
   - "#address-cells"
   - "#size-cells"
-  - interrupts
   - clocks
 
 examples:
@@ -130,4 +148,15 @@ examples:
       cs-gpios = <&gpio0 13 0>,
                  <&gpio0 14 0>;
     };
+  - |
+    spi@1f040100 {
+      compatible = "baikal,bt1-sys-ssi";
+      reg = <0x1f040100 0x900>,
+            <0x1c000000 0x1000000>;
+      #address-cells = <1>;
+      #size-cells = <0>;
+      mux-controls = <&boot_mux>;
+      clocks = <&ccu_sys>;
+      clock-names = "ssi_clk";
+    };
 ...
-- 
2.27.0


  parent reply	other threads:[~2020-09-20 11:30 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-20 11:28 [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support Serge Semin
2020-09-20 11:28 ` [PATCH 01/30] spi: dw: Discard IRQ threshold macro Serge Semin
2020-09-20 11:28 ` [PATCH 02/30] spi: dw: Use ternary op to init set_cs callback Serge Semin
2020-09-29 13:11   ` Mark Brown
2020-09-29 21:55     ` Serge Semin
2020-09-30 14:57       ` Serge Semin
2020-09-30 15:01         ` Mark Brown
2020-09-30 15:07           ` Serge Semin
2020-09-20 11:28 ` [PATCH 03/30] spi: dw: Initialize n_bytes before the memory barrier Serge Semin
2020-09-29 13:12   ` Mark Brown
2020-09-29 22:05     ` Serge Semin
2020-09-20 11:28 ` [PATCH 04/30] Revert: spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent calls Serge Semin
2020-09-29 13:28   ` Mark Brown
2020-09-29 22:08     ` Serge Semin
2020-09-20 11:28 ` [PATCH 05/30] spi: dw: Clear IRQ status on DW SPI controller reset Serge Semin
2020-09-20 11:28 ` [PATCH 06/30] spi: dw: Disable all IRQs when controller is unused Serge Semin
2020-09-20 11:28 ` [PATCH 07/30] spi: dw: Use relaxed IO-methods to access FIFOs Serge Semin
2020-09-20 11:28 ` [PATCH 08/30] spi: dw: Discard DW SSI chip type storages Serge Semin
2020-09-20 11:28 ` [PATCH 09/30] spi: dw: Convert CS-override to DW SPI capabilities Serge Semin
2020-09-20 11:28 ` [PATCH 10/30] spi: dw: Add KeemBay Master capability Serge Semin
2020-09-20 11:28 ` [PATCH 11/30] spi: dw: Add DWC SSI capability Serge Semin
2020-09-29 13:52   ` Mark Brown
2020-09-29 22:17     ` Serge Semin
2020-09-30 15:03       ` Serge Semin
2020-09-30 15:41         ` Mark Brown
2020-09-30 15:53           ` Serge Semin
2020-09-20 11:28 ` [PATCH 12/30] spi: dw: Detach SPI device specific CR0 config method Serge Semin
2020-09-20 11:28 ` [PATCH 13/30] spi: dw: Update SPI bus speed in a config function Serge Semin
2020-09-20 11:28 ` [PATCH 14/30] spi: dw: Simplify the SPI bus speed config procedure Serge Semin
2020-09-20 11:28 ` [PATCH 15/30] spi: dw: Update Rx sample delay in the config function Serge Semin
2020-09-20 11:29 ` [PATCH 16/30] spi: dw: Add DW SPI controller config structure Serge Semin
2020-09-20 11:29 ` [PATCH 17/30] spi: dw: Refactor data IO procedure Serge Semin
2020-09-20 11:29 ` [PATCH 18/30] spi: dw: Refactor IRQ-based SPI transfer procedure Serge Semin
2020-09-20 11:29 ` [PATCH 19/30] spi: dw: Perform IRQ setup in a dedicated function Serge Semin
2020-09-20 11:29 ` [PATCH 20/30] spi: dw: Unmask IRQs after enabling the chip Serge Semin
2020-09-20 11:29 ` [PATCH 21/30] spi: dw: Discard chip enabling on DMA setup error Serge Semin
2020-09-20 11:29 ` [PATCH 22/30] spi: dw: De-assert chip-select on reset Serge Semin
2020-09-20 11:29 ` [PATCH 23/30] spi: dw: Explicitly de-assert CS on SPI transfer completion Serge Semin
2020-09-20 11:29 ` [PATCH 24/30] spi: dw: Move num-of retries parameter to the header file Serge Semin
2020-09-20 11:29 ` [PATCH 25/30] spi: dw: Add generic DW SSI status-check method Serge Semin
2020-09-20 11:29 ` [PATCH 26/30] spi: dw: Add memory operations support Serge Semin
2020-09-20 11:29 ` [PATCH 27/30] spi: dw: Introduce max mem-ops SPI bus frequency setting Serge Semin
2020-09-20 11:29 ` [PATCH 28/30] spi: dw: Add poll-based SPI transfers support Serge Semin
2020-09-20 11:29 ` Serge Semin [this message]
2020-09-29 16:58   ` [PATCH 29/30] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers Rob Herring
2020-09-20 11:41 ` [PATCH 30/30] spi: dw: Add Baikal-T1 SPI Controller glue driver Serge Semin
2020-09-29 14:43 ` [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support Mark Brown
2020-09-29 22:43   ` Serge Semin
2020-09-30 11:04     ` Mark Brown
2020-09-30 13:11       ` Serge Semin
2020-09-30 14:43         ` Mark Brown
2020-09-29 16:23 ` Mark Brown

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