From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F111C43465 for ; Mon, 21 Sep 2020 15:12:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF68D207BC for ; Mon, 21 Sep 2020 15:12:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727672AbgIUPMt (ORCPT ); Mon, 21 Sep 2020 11:12:49 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:47774 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726413AbgIUPMt (ORCPT ); Mon, 21 Sep 2020 11:12:49 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kKNUY-00Fbpb-9v; Mon, 21 Sep 2020 17:12:34 +0200 Date: Mon, 21 Sep 2020 17:12:34 +0200 From: Andrew Lunn To: =?utf-8?B?5YqJ5YGJ5qyK?= Cc: Serge Semin , Kyle Evans , "hkallweit1@gmail.com" , "linux@armlinux.org.uk" , "davem@davemloft.net" , "kuba@kernel.org" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Ryan Kao , Joe Hershberger , Peter Robinson Subject: Re: [PATCH] net: phy: realtek: fix rtl8211e rx/tx delay config Message-ID: <20200921151234.GC3717417@lunn.ch> References: <1600307253-3538-1-git-send-email-willy.liu@realtek.com> <20200917101035.uwajg4m524g4lz5o@mobilestation> <87c4ebf4b1fe48a7a10b27d0ba0b333c@realtek.com> <20200918135403.GC3631014@lunn.ch> <20200918153301.chwlvzh6a2bctbjw@mobilestation> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 21, 2020 at 07:00:00AM +0000, 劉偉權 wrote: > Hi Andrew, > I removed below register layout descriptions because these > descriptions did not match register definitions for rtl8211e > extension page 164 reg 0x1c at all. > 8:6 = PHY Address > 5:4 = Auto-Negotiation > 3 = Mode > 2 = RXD > 1 = TXD > 0 = SELRGV1 > I think it is a misunderstanding. These definitions are mapped from > datasheet rtl8211e table13" Configuration Register > Definition". However this table should be HW pin configurations not > register descriptions. So these are just how the device is strapped. So lets add that to the description, rather than remove it. > Users can config RXD/TXD via register setting(extension page 164 reg > 0x1c). But bit map for these two settings should be below: > 13 = Force Tx RX Delay controlled by bit12 bit11, > 12 = RX Delay, 11 = TX Delay > Hi Sergey, > I saw the summary from https://reviews.freebsd.org/D13591. This > patch is to reconfigure the RTL8211E used to force off TXD/RXD (RXD > is defaulting to on, in my checks) and turn on some bits in the > configuration register for this PHY that are undocumented. > The default value for "extension pg 0xa4 reg 0x1c" is 0x8148, and > bit1-2 should be 0. In my opinion, this patch should be worked based > on the magic number (0xb400). Magic numbers are always bad. Please document what these bits mean. Andrew