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From: Marc Kleine-Budde <mkl@pengutronix.de>
To: linux-can@vger.kernel.org
Cc: kernel@pengutronix.de, michael@walle.cc, qiangqing.zhang@nxp.com,
	Marc Kleine-Budde <mkl@pengutronix.de>
Subject: [PATCH 09/20] can: flexcan: add correctable errors correction when HW supports ECC
Date: Tue, 22 Sep 2020 16:44:18 +0200	[thread overview]
Message-ID: <20200922144429.2613631-10-mkl@pengutronix.de> (raw)
In-Reply-To: <20200922144429.2613631-1-mkl@pengutronix.de>

From: Joakim Zhang <qiangqing.zhang@nxp.com>

commit cdce844865be ("can: flexcan: add vf610 support for FlexCAN")
From above commit by Stefan Agner, the patch just disables
non-correctable errors interrupt and freeze mode. It still can correct
the correctable errors since ECC enabled by default after reset (MECR[ECCDIS]=0,
enable memory error correct) if HW supports ECC.

commit 5e269324db5a ("can: flexcan: disable completely the ECC mechanism")
From above commit by Joakim Zhang, the patch disables ECC completely (assert
MECR[ECCDIS]) according to the explanation of FLEXCAN_QUIRK_DISABLE_MECR that
disable memory error detection. This cause correctable errors cannot be
corrected even HW supports ECC.

The error correction mechanism ensures that in this 13-bit word, errors
in one bit can be corrected (correctable errors) and errors in two bits can
be detected but not corrected (non-correctable errors). Errors in more than
two bits may not be detected.

If HW supports ECC, we can use this to correct the correctable errors detected
from FlexCAN memory. Then disable non-correctable errors interrupt and freeze
mode to avoid that put FlexCAN in freeze mode.

This patch adds correctable errors correction when HW supports ECC, and
modify explanation for FLEXCAN_QUIRK_DISABLE_MECR.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Link: https://lore.kernel.org/r/20200416093126.15242-1-qiangqing.zhang@nxp.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
 drivers/net/can/flexcan.c | 31 +++++++++++++++++++++++--------
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 5c6903e23c01..52d73115c7fd 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -190,7 +190,7 @@
 #define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2)
 /* Enable EACEN and RRS bit in ctrl2 */
 #define FLEXCAN_QUIRK_ENABLE_EACEN_RRS  BIT(3)
-/* Disable Memory error detection */
+/* Disable non-correctable errors interrupt and freeze mode */
 #define FLEXCAN_QUIRK_DISABLE_MECR BIT(4)
 /* Use timestamp based offloading */
 #define FLEXCAN_QUIRK_USE_OFF_TIMESTAMP BIT(5)
@@ -1221,28 +1221,43 @@ static int flexcan_chip_start(struct net_device *dev)
 	for (i = 0; i < priv->mb_count; i++)
 		priv->write(0, &regs->rximr[i]);
 
-	/* On Vybrid, disable memory error detection interrupts
-	 * and freeze mode.
-	 * This also works around errata e5295 which generates
-	 * false positive memory errors and put the device in
-	 * freeze mode.
+	/* On Vybrid, disable non-correctable errors interrupt and
+	 * freeze mode. It still can correct the correctable errors
+	 * when HW supports ECC.
+	 *
+	 * This also works around errata e5295 which generates false
+	 * positive memory errors and put the device in freeze mode.
 	 */
 	if (priv->devtype_data->quirks & FLEXCAN_QUIRK_DISABLE_MECR) {
 		/* Follow the protocol as described in "Detection
 		 * and Correction of Memory Errors" to write to
-		 * MECR register
+		 * MECR register (step 1 - 5)
+		 *
+		 * 1. By default, CTRL2[ECRWRE] = 0, MECR[ECRWRDIS] = 1
+		 * 2. set CTRL2[ECRWRE]
 		 */
 		reg_ctrl2 = priv->read(&regs->ctrl2);
 		reg_ctrl2 |= FLEXCAN_CTRL2_ECRWRE;
 		priv->write(reg_ctrl2, &regs->ctrl2);
 
+		/* 3. clear MECR[ECRWRDIS] */
 		reg_mecr = priv->read(&regs->mecr);
 		reg_mecr &= ~FLEXCAN_MECR_ECRWRDIS;
 		priv->write(reg_mecr, &regs->mecr);
-		reg_mecr |= FLEXCAN_MECR_ECCDIS;
+
+		/* 4. all writes to MECR must keep MECR[ECRWRDIS] cleared */
 		reg_mecr &= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK |
 			      FLEXCAN_MECR_FANCEI_MSK);
 		priv->write(reg_mecr, &regs->mecr);
+
+		/* 5. after configuration done, lock MECR by either
+		 * setting MECR[ECRWRDIS] or clearing CTRL2[ECRWRE]
+		 */
+		reg_mecr |= FLEXCAN_MECR_ECRWRDIS;
+		priv->write(reg_mecr, &regs->mecr);
+
+		reg_ctrl2 &= ~FLEXCAN_CTRL2_ECRWRE;
+		priv->write(reg_ctrl2, &regs->ctrl2);
 	}
 
 	err = flexcan_transceiver_enable(priv);
-- 
2.28.0


  parent reply	other threads:[~2020-09-22 14:44 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-22 14:44 [RFC]: flexcan FD support - can-next 2020-09-22 Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 01/20] can: flexcan: sort include files alphabetically Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 02/20] can: flexcan: flexcan_exit_stop_mode(): remove stray empty line Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 03/20] can: flexcan: more register names Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 04/20] can: flexcan: struct flexcan_regs: document registers not affected by soft reset Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 05/20] can: flexcan: quirks: get rid of long lines Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 06/20] can: flexcan: Ack wakeup interrupt separately Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 07/20] can: flexcan: flexcan_probe(): make regulator xceiver optional Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 08/20] can: flexcan: Add check for transceiver maximum bitrate limitation Marc Kleine-Budde
2020-09-22 14:44 ` Marc Kleine-Budde [this message]
2020-09-22 14:44 ` [PATCH 10/20] can: flexcan: flexcan_chip_stop(): add error handling and propagate error value Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 11/20] can: flexcan: disable clocks during stop mode Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 12/20] can: flexcan: add LPSR mode support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 13/20] can: flexcan: flexcan_set_bittiming(): move setup of CAN-2.0 bitiming into separate function Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 14/20] can: flexcan: use struct canfd_frame for CAN classic frame Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 15/20] can: flexcan: add CAN-FD mode support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 16/20] can: flexcan: add ISO CAN FD feature support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 17/20] can: flexcan: add CAN FD BRS support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 18/20] can: flexcan: add Transceiver Delay Compensation support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 19/20] can: flexcan: add imx8qm support Marc Kleine-Budde
2020-09-22 14:44 ` [PATCH 20/20] can: flexcan: add lx2160ar1 support Marc Kleine-Budde
2020-09-23  7:45   ` Michael Walle
2020-09-23  7:54     ` Marc Kleine-Budde
2020-09-23  8:02       ` Michael Walle
2020-09-23  8:10         ` Marc Kleine-Budde
2020-09-23  8:31           ` Joakim Zhang
2020-09-23  8:58             ` Marc Kleine-Budde
2020-09-23  9:38               ` Michael Walle
2020-09-23  9:50               ` Joakim Zhang
2020-09-23  8:53 pull-request: can-next 2020-09-23 Marc Kleine-Budde
2020-09-23  8:54 ` [PATCH 09/20] can: flexcan: add correctable errors correction when HW supports ECC Marc Kleine-Budde

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