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MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: FFDBEC49ECEFA09E78A45829BB412B2B312E593CE04F1DBF7E08737226EA43C32000:8 X-MTK: N Content-Transfer-Encoding: base64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org QWRkICJjZmciIGFzIGEgcGFyYW1ldGVyIGZvciBzb21lIG1hY3Jvcy4gVGhpcyBpcyBhIHByZXBh cmluZyBwYXRjaCBmb3INCm1lZGlhdGVrIGV4dGVuZCB0aGUgbHZsMSBwZ3RhYmxlLiBObyBmdW5j dGlvbmFsIGNoYW5nZS4NCg0KU2lnbmVkLW9mZi1ieTogWW9uZyBXdSA8eW9uZy53dUBtZWRpYXRl ay5jb20+DQotLS0NCiBkcml2ZXJzL2lvbW11L2lvLXBndGFibGUtYXJtLXY3cy5jIHwgMzQgKysr KysrKysrKysrKysrLS0tLS0tLS0tLS0tLS0tDQogMSBmaWxlIGNoYW5nZWQsIDE3IGluc2VydGlv bnMoKyksIDE3IGRlbGV0aW9ucygtKQ0KDQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9pb21tdS9pby1w Z3RhYmxlLWFybS12N3MuYyBiL2RyaXZlcnMvaW9tbXUvaW8tcGd0YWJsZS1hcm0tdjdzLmMNCmlu ZGV4IGEzYjNlOTE0N2I4ZC4uODM2MmZkZjc2NjU3IDEwMDY0NA0KLS0tIGEvZHJpdmVycy9pb21t dS9pby1wZ3RhYmxlLWFybS12N3MuYw0KKysrIGIvZHJpdmVycy9pb21tdS9pby1wZ3RhYmxlLWFy bS12N3MuYw0KQEAgLTUzLDE3ICs1MywxNyBAQA0KICNkZWZpbmUgQVJNX1Y3U19MVkxfU0hJRlQo bHZsKQkJKEFSTV9WN1NfQUREUl9CSVRTIC0gKDQgKyA4ICogKGx2bCkpKQ0KICNkZWZpbmUgQVJN X1Y3U19UQUJMRV9TSElGVAkJMTANCiANCi0jZGVmaW5lIEFSTV9WN1NfUFRFU19QRVJfTFZMKGx2 bCkJKDEgPDwgX0FSTV9WN1NfTFZMX0JJVFMobHZsKSkNCi0jZGVmaW5lIEFSTV9WN1NfVEFCTEVf U0laRShsdmwpCQkJCQkJXA0KLQkoQVJNX1Y3U19QVEVTX1BFUl9MVkwobHZsKSAqIHNpemVvZihh cm1fdjdzX2lvcHRlKSkNCisjZGVmaW5lIEFSTV9WN1NfUFRFU19QRVJfTFZMKGx2bCwgY2ZnKQko MSA8PCBfQVJNX1Y3U19MVkxfQklUUyhsdmwpKQ0KKyNkZWZpbmUgQVJNX1Y3U19UQUJMRV9TSVpF KGx2bCwgY2ZnKQkJCQkJXA0KKwkoQVJNX1Y3U19QVEVTX1BFUl9MVkwobHZsLCBjZmcpICogc2l6 ZW9mKGFybV92N3NfaW9wdGUpKQ0KIA0KICNkZWZpbmUgQVJNX1Y3U19CTE9DS19TSVpFKGx2bCkJ CSgxVUwgPDwgQVJNX1Y3U19MVkxfU0hJRlQobHZsKSkNCiAjZGVmaW5lIEFSTV9WN1NfTFZMX01B U0sobHZsKQkJKCh1MzIpKH4wVSA8PCBBUk1fVjdTX0xWTF9TSElGVChsdmwpKSkNCiAjZGVmaW5l IEFSTV9WN1NfVEFCTEVfTUFTSwkJKCh1MzIpKH4wVSA8PCBBUk1fVjdTX1RBQkxFX1NISUZUKSkN Ci0jZGVmaW5lIF9BUk1fVjdTX0lEWF9NQVNLKGx2bCkJCShBUk1fVjdTX1BURVNfUEVSX0xWTChs dmwpIC0gMSkNCi0jZGVmaW5lIEFSTV9WN1NfTFZMX0lEWChhZGRyLCBsdmwpCSh7CQkJCVwNCisj ZGVmaW5lIF9BUk1fVjdTX0lEWF9NQVNLKGx2bCwgY2ZnKQkoQVJNX1Y3U19QVEVTX1BFUl9MVkwo bHZsLCBjZmcpIC0gMSkNCisjZGVmaW5lIEFSTV9WN1NfTFZMX0lEWChhZGRyLCBsdmwsIGNmZykJ KHsJCQlcDQogCWludCBfbCA9IGx2bDsJCQkJCQkJXA0KLQkoKHUzMikoYWRkcikgPj4gQVJNX1Y3 U19MVkxfU0hJRlQoX2wpKSAmIF9BUk1fVjdTX0lEWF9NQVNLKF9sKTsgXA0KKwkoKHUzMikoYWRk cikgPj4gQVJNX1Y3U19MVkxfU0hJRlQoX2wpKSAmIF9BUk1fVjdTX0lEWF9NQVNLKF9sLCBjZmcp OyBcDQogfSkNCiANCiAvKg0KQEAgLTIzOSw3ICsyMzksNyBAQCBzdGF0aWMgdm9pZCAqX19hcm1f djdzX2FsbG9jX3RhYmxlKGludCBsdmwsIGdmcF90IGdmcCwNCiAJc3RydWN0IGRldmljZSAqZGV2 ID0gY2ZnLT5pb21tdV9kZXY7DQogCXBoeXNfYWRkcl90IHBoeXM7DQogCWRtYV9hZGRyX3QgZG1h Ow0KLQlzaXplX3Qgc2l6ZSA9IEFSTV9WN1NfVEFCTEVfU0laRShsdmwpOw0KKwlzaXplX3Qgc2l6 ZSA9IEFSTV9WN1NfVEFCTEVfU0laRShsdmwsIGNmZyk7DQogCXZvaWQgKnRhYmxlID0gTlVMTDsN CiANCiAJaWYgKGx2bCA9PSAxKQ0KQEAgLTI4NSw3ICsyODUsNyBAQCBzdGF0aWMgdm9pZCBfX2Fy bV92N3NfZnJlZV90YWJsZSh2b2lkICp0YWJsZSwgaW50IGx2bCwNCiB7DQogCXN0cnVjdCBpb19w Z3RhYmxlX2NmZyAqY2ZnID0gJmRhdGEtPmlvcC5jZmc7DQogCXN0cnVjdCBkZXZpY2UgKmRldiA9 IGNmZy0+aW9tbXVfZGV2Ow0KLQlzaXplX3Qgc2l6ZSA9IEFSTV9WN1NfVEFCTEVfU0laRShsdmwp Ow0KKwlzaXplX3Qgc2l6ZSA9IEFSTV9WN1NfVEFCTEVfU0laRShsdmwsIGNmZyk7DQogDQogCWlm ICghY2ZnLT5jb2hlcmVudF93YWxrKQ0KIAkJZG1hX3VubWFwX3NpbmdsZShkZXYsIF9fYXJtX3Y3 c19kbWFfYWRkcih0YWJsZSksIHNpemUsDQpAQCAtNDI5LDcgKzQyOSw3IEBAIHN0YXRpYyBpbnQg YXJtX3Y3c19pbml0X3B0ZShzdHJ1Y3QgYXJtX3Y3c19pb19wZ3RhYmxlICpkYXRhLA0KIAkJCWFy bV92N3NfaW9wdGUgKnRibHA7DQogCQkJc2l6ZV90IHN6ID0gQVJNX1Y3U19CTE9DS19TSVpFKGx2 bCk7DQogDQotCQkJdGJscCA9IHB0ZXAgLSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgbHZsKTsNCisJ CQl0YmxwID0gcHRlcCAtIEFSTV9WN1NfTFZMX0lEWChpb3ZhLCBsdmwsIGNmZyk7DQogCQkJaWYg KFdBUk5fT04oX19hcm1fdjdzX3VubWFwKGRhdGEsIE5VTEwsIGlvdmEgKyBpICogc3osDQogCQkJ CQkJICAgIHN6LCBsdmwsIHRibHApICE9IHN6KSkNCiAJCQkJcmV0dXJuIC1FSU5WQUw7DQpAQCAt NDgyLDcgKzQ4Miw3IEBAIHN0YXRpYyBpbnQgX19hcm1fdjdzX21hcChzdHJ1Y3QgYXJtX3Y3c19p b19wZ3RhYmxlICpkYXRhLCB1bnNpZ25lZCBsb25nIGlvdmEsDQogCWludCBudW1fZW50cmllcyA9 IHNpemUgPj4gQVJNX1Y3U19MVkxfU0hJRlQobHZsKTsNCiANCiAJLyogRmluZCBvdXIgZW50cnkg YXQgdGhlIGN1cnJlbnQgbGV2ZWwgKi8NCi0JcHRlcCArPSBBUk1fVjdTX0xWTF9JRFgoaW92YSwg bHZsKTsNCisJcHRlcCArPSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgbHZsLCBjZmcpOw0KIA0KIAkv KiBJZiB3ZSBjYW4gaW5zdGFsbCBhIGxlYWYgZW50cnkgYXQgdGhpcyBsZXZlbCwgdGhlbiBkbyBz byAqLw0KIAlpZiAobnVtX2VudHJpZXMpDQpAQCAtNTU0LDcgKzU1NCw3IEBAIHN0YXRpYyB2b2lk IGFybV92N3NfZnJlZV9wZ3RhYmxlKHN0cnVjdCBpb19wZ3RhYmxlICppb3ApDQogCXN0cnVjdCBh cm1fdjdzX2lvX3BndGFibGUgKmRhdGEgPSBpb19wZ3RhYmxlX3RvX2RhdGEoaW9wKTsNCiAJaW50 IGk7DQogDQotCWZvciAoaSA9IDA7IGkgPCBBUk1fVjdTX1BURVNfUEVSX0xWTCgxKTsgaSsrKSB7 DQorCWZvciAoaSA9IDA7IGkgPCBBUk1fVjdTX1BURVNfUEVSX0xWTCgxLCAmZGF0YS0+aW9wLmNm Zyk7IGkrKykgew0KIAkJYXJtX3Y3c19pb3B0ZSBwdGUgPSBkYXRhLT5wZ2RbaV07DQogDQogCQlp ZiAoQVJNX1Y3U19QVEVfSVNfVEFCTEUocHRlLCAxKSkNCkBAIC02MDYsOSArNjA2LDkgQEAgc3Rh dGljIHNpemVfdCBhcm1fdjdzX3NwbGl0X2Jsa191bm1hcChzdHJ1Y3QgYXJtX3Y3c19pb19wZ3Rh YmxlICpkYXRhLA0KIAlpZiAoIXRhYmxlcCkNCiAJCXJldHVybiAwOyAvKiBCeXRlcyB1bm1hcHBl ZCAqLw0KIA0KLQludW1fcHRlcyA9IEFSTV9WN1NfUFRFU19QRVJfTFZMKDIpOw0KKwludW1fcHRl cyA9IEFSTV9WN1NfUFRFU19QRVJfTFZMKDIsIGNmZyk7DQogCW51bV9lbnRyaWVzID0gc2l6ZSA+ PiBBUk1fVjdTX0xWTF9TSElGVCgyKTsNCi0JdW5tYXBfaWR4ID0gQVJNX1Y3U19MVkxfSURYKGlv dmEsIDIpOw0KKwl1bm1hcF9pZHggPSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgMiwgY2ZnKTsNCiAN CiAJcHRlID0gYXJtX3Y3c19wcm90X3RvX3B0ZShhcm1fdjdzX3B0ZV90b19wcm90KGJsa19wdGUs IDEpLCAyLCBjZmcpOw0KIAlpZiAobnVtX2VudHJpZXMgPiAxKQ0KQEAgLTY1MCw3ICs2NTAsNyBA QCBzdGF0aWMgc2l6ZV90IF9fYXJtX3Y3c191bm1hcChzdHJ1Y3QgYXJtX3Y3c19pb19wZ3RhYmxl ICpkYXRhLA0KIAlpZiAoV0FSTl9PTihsdmwgPiAyKSkNCiAJCXJldHVybiAwOw0KIA0KLQlpZHgg PSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgbHZsKTsNCisJaWR4ID0gQVJNX1Y3U19MVkxfSURYKGlv dmEsIGx2bCwgJmlvcC0+Y2ZnKTsNCiAJcHRlcCArPSBpZHg7DQogCWRvIHsNCiAJCXB0ZVtpXSA9 IFJFQURfT05DRShwdGVwW2ldKTsNCkBAIC03MzYsNyArNzM2LDcgQEAgc3RhdGljIHBoeXNfYWRk cl90IGFybV92N3NfaW92YV90b19waHlzKHN0cnVjdCBpb19wZ3RhYmxlX29wcyAqb3BzLA0KIAl1 MzIgbWFzazsNCiANCiAJZG8gew0KLQkJcHRlcCArPSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgKyts dmwpOw0KKwkJcHRlcCArPSBBUk1fVjdTX0xWTF9JRFgoaW92YSwgKytsdmwsICZkYXRhLT5pb3Au Y2ZnKTsNCiAJCXB0ZSA9IFJFQURfT05DRSgqcHRlcCk7DQogCQlwdGVwID0gaW9wdGVfZGVyZWYo cHRlLCBsdmwsIGRhdGEpOw0KIAl9IHdoaWxlIChBUk1fVjdTX1BURV9JU19UQUJMRShwdGUsIGx2 bCkpOw0KQEAgLTc3OSw4ICs3NzksOCBAQCBzdGF0aWMgc3RydWN0IGlvX3BndGFibGUgKmFybV92 N3NfYWxsb2NfcGd0YWJsZShzdHJ1Y3QgaW9fcGd0YWJsZV9jZmcgKmNmZywNCiANCiAJc3Bpbl9s b2NrX2luaXQoJmRhdGEtPnNwbGl0X2xvY2spOw0KIAlkYXRhLT5sMl90YWJsZXMgPSBrbWVtX2Nh Y2hlX2NyZWF0ZSgiaW8tcGd0YWJsZV9hcm12N3NfbDIiLA0KLQkJCQkJICAgIEFSTV9WN1NfVEFC TEVfU0laRSgyKSwNCi0JCQkJCSAgICBBUk1fVjdTX1RBQkxFX1NJWkUoMiksDQorCQkJCQkgICAg QVJNX1Y3U19UQUJMRV9TSVpFKDIsIGNmZyksDQorCQkJCQkgICAgQVJNX1Y3U19UQUJMRV9TSVpF KDIsIGNmZyksDQogCQkJCQkgICAgQVJNX1Y3U19UQUJMRV9TTEFCX0ZMQUdTLCBOVUxMKTsNCiAJ aWYgKCFkYXRhLT5sMl90YWJsZXMpDQogCQlnb3RvIG91dF9mcmVlX2RhdGE7DQotLSANCjIuMTgu MA0K From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 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Deacon Subject: [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Date: Wed, 30 Sep 2020 15:06:33 +0800 Message-ID: <20200930070647.10188-11-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200930070647.10188-1-yong.wu@mediatek.com> References: <20200930070647.10188-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FFDBEC49ECEFA09E78A45829BB412B2B312E593CE04F1DBF7E08737226EA43C32000:8 X-MTK: N Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, kernel-team@android.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Add "cfg" as a parameter for some macros. This is a preparing patch for mediatek extend the lvl1 pgtable. No functional change. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 34 +++++++++++++++--------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index a3b3e9147b8d..8362fdf76657 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c @@ -53,17 +53,17 @@ #define ARM_V7S_LVL_SHIFT(lvl) (ARM_V7S_ADDR_BITS - (4 + 8 * (lvl))) #define ARM_V7S_TABLE_SHIFT 10 -#define ARM_V7S_PTES_PER_LVL(lvl) (1 << _ARM_V7S_LVL_BITS(lvl)) -#define ARM_V7S_TABLE_SIZE(lvl) \ - (ARM_V7S_PTES_PER_LVL(lvl) * sizeof(arm_v7s_iopte)) +#define ARM_V7S_PTES_PER_LVL(lvl, cfg) (1 << _ARM_V7S_LVL_BITS(lvl)) +#define ARM_V7S_TABLE_SIZE(lvl, cfg) \ + (ARM_V7S_PTES_PER_LVL(lvl, cfg) * sizeof(arm_v7s_iopte)) #define ARM_V7S_BLOCK_SIZE(lvl) (1UL << ARM_V7S_LVL_SHIFT(lvl)) #define ARM_V7S_LVL_MASK(lvl) ((u32)(~0U << ARM_V7S_LVL_SHIFT(lvl))) #define ARM_V7S_TABLE_MASK ((u32)(~0U << ARM_V7S_TABLE_SHIFT)) -#define _ARM_V7S_IDX_MASK(lvl) (ARM_V7S_PTES_PER_LVL(lvl) - 1) -#define ARM_V7S_LVL_IDX(addr, lvl) ({ \ +#define _ARM_V7S_IDX_MASK(lvl, cfg) (ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1) +#define ARM_V7S_LVL_IDX(addr, lvl, cfg) ({ \ int _l = lvl; \ - ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l); \ + ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \ }) /* @@ -239,7 +239,7 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, struct device *dev = cfg->iommu_dev; phys_addr_t phys; dma_addr_t dma; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); void *table = NULL; if (lvl == 1) @@ -285,7 +285,7 @@ static void __arm_v7s_free_table(void *table, int lvl, { struct io_pgtable_cfg *cfg = &data->iop.cfg; struct device *dev = cfg->iommu_dev; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); if (!cfg->coherent_walk) dma_unmap_single(dev, __arm_v7s_dma_addr(table), size, @@ -429,7 +429,7 @@ static int arm_v7s_init_pte(struct arm_v7s_io_pgtable *data, arm_v7s_iopte *tblp; size_t sz = ARM_V7S_BLOCK_SIZE(lvl); - tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl); + tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl, cfg); if (WARN_ON(__arm_v7s_unmap(data, NULL, iova + i * sz, sz, lvl, tblp) != sz)) return -EINVAL; @@ -482,7 +482,7 @@ static int __arm_v7s_map(struct arm_v7s_io_pgtable *data, unsigned long iova, int num_entries = size >> ARM_V7S_LVL_SHIFT(lvl); /* Find our entry at the current level */ - ptep += ARM_V7S_LVL_IDX(iova, lvl); + ptep += ARM_V7S_LVL_IDX(iova, lvl, cfg); /* If we can install a leaf entry at this level, then do so */ if (num_entries) @@ -554,7 +554,7 @@ static void arm_v7s_free_pgtable(struct io_pgtable *iop) struct arm_v7s_io_pgtable *data = io_pgtable_to_data(iop); int i; - for (i = 0; i < ARM_V7S_PTES_PER_LVL(1); i++) { + for (i = 0; i < ARM_V7S_PTES_PER_LVL(1, &data->iop.cfg); i++) { arm_v7s_iopte pte = data->pgd[i]; if (ARM_V7S_PTE_IS_TABLE(pte, 1)) @@ -606,9 +606,9 @@ static size_t arm_v7s_split_blk_unmap(struct arm_v7s_io_pgtable *data, if (!tablep) return 0; /* Bytes unmapped */ - num_ptes = ARM_V7S_PTES_PER_LVL(2); + num_ptes = ARM_V7S_PTES_PER_LVL(2, cfg); num_entries = size >> ARM_V7S_LVL_SHIFT(2); - unmap_idx = ARM_V7S_LVL_IDX(iova, 2); + unmap_idx = ARM_V7S_LVL_IDX(iova, 2, cfg); pte = arm_v7s_prot_to_pte(arm_v7s_pte_to_prot(blk_pte, 1), 2, cfg); if (num_entries > 1) @@ -650,7 +650,7 @@ static size_t __arm_v7s_unmap(struct arm_v7s_io_pgtable *data, if (WARN_ON(lvl > 2)) return 0; - idx = ARM_V7S_LVL_IDX(iova, lvl); + idx = ARM_V7S_LVL_IDX(iova, lvl, &iop->cfg); ptep += idx; do { pte[i] = READ_ONCE(ptep[i]); @@ -736,7 +736,7 @@ static phys_addr_t arm_v7s_iova_to_phys(struct io_pgtable_ops *ops, u32 mask; do { - ptep += ARM_V7S_LVL_IDX(iova, ++lvl); + ptep += ARM_V7S_LVL_IDX(iova, ++lvl, &data->iop.cfg); pte = READ_ONCE(*ptep); ptep = iopte_deref(pte, lvl, data); } while (ARM_V7S_PTE_IS_TABLE(pte, lvl)); @@ -779,8 +779,8 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, spin_lock_init(&data->split_lock); data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", - ARM_V7S_TABLE_SIZE(2), - ARM_V7S_TABLE_SIZE(2), + ARM_V7S_TABLE_SIZE(2, cfg), + ARM_V7S_TABLE_SIZE(2, cfg), ARM_V7S_TABLE_SLAB_FLAGS, NULL); if (!data->l2_tables) goto out_free_data; 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Wed, 30 Sep 2020 15:09:04 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy , Krzysztof Kozlowski , Will Deacon Subject: [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Date: Wed, 30 Sep 2020 15:06:33 +0800 Message-ID: <20200930070647.10188-11-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200930070647.10188-1-yong.wu@mediatek.com> References: <20200930070647.10188-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FFDBEC49ECEFA09E78A45829BB412B2B312E593CE04F1DBF7E08737226EA43C32000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200930_031842_290204_6E763D8F X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, kernel-team@android.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, yong.wu@mediatek.com, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add "cfg" as a parameter for some macros. This is a preparing patch for mediatek extend the lvl1 pgtable. No functional change. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 34 +++++++++++++++--------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index a3b3e9147b8d..8362fdf76657 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c @@ -53,17 +53,17 @@ #define ARM_V7S_LVL_SHIFT(lvl) (ARM_V7S_ADDR_BITS - (4 + 8 * (lvl))) #define ARM_V7S_TABLE_SHIFT 10 -#define ARM_V7S_PTES_PER_LVL(lvl) (1 << _ARM_V7S_LVL_BITS(lvl)) -#define ARM_V7S_TABLE_SIZE(lvl) \ - (ARM_V7S_PTES_PER_LVL(lvl) * sizeof(arm_v7s_iopte)) +#define ARM_V7S_PTES_PER_LVL(lvl, cfg) (1 << _ARM_V7S_LVL_BITS(lvl)) +#define ARM_V7S_TABLE_SIZE(lvl, cfg) \ + (ARM_V7S_PTES_PER_LVL(lvl, cfg) * sizeof(arm_v7s_iopte)) #define ARM_V7S_BLOCK_SIZE(lvl) (1UL << ARM_V7S_LVL_SHIFT(lvl)) #define ARM_V7S_LVL_MASK(lvl) ((u32)(~0U << ARM_V7S_LVL_SHIFT(lvl))) #define ARM_V7S_TABLE_MASK ((u32)(~0U << ARM_V7S_TABLE_SHIFT)) -#define _ARM_V7S_IDX_MASK(lvl) (ARM_V7S_PTES_PER_LVL(lvl) - 1) -#define ARM_V7S_LVL_IDX(addr, lvl) ({ \ +#define _ARM_V7S_IDX_MASK(lvl, cfg) (ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1) +#define ARM_V7S_LVL_IDX(addr, lvl, cfg) ({ \ int _l = lvl; \ - ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l); \ + ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \ }) /* @@ -239,7 +239,7 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, struct device *dev = cfg->iommu_dev; phys_addr_t phys; dma_addr_t dma; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); void *table = NULL; if (lvl == 1) @@ -285,7 +285,7 @@ static void __arm_v7s_free_table(void *table, int lvl, { struct io_pgtable_cfg *cfg = &data->iop.cfg; struct device *dev = cfg->iommu_dev; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); if (!cfg->coherent_walk) dma_unmap_single(dev, __arm_v7s_dma_addr(table), size, @@ -429,7 +429,7 @@ static int arm_v7s_init_pte(struct arm_v7s_io_pgtable *data, arm_v7s_iopte *tblp; size_t sz = ARM_V7S_BLOCK_SIZE(lvl); - tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl); + tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl, cfg); if (WARN_ON(__arm_v7s_unmap(data, NULL, iova + i * sz, sz, lvl, tblp) != sz)) return -EINVAL; @@ -482,7 +482,7 @@ static int __arm_v7s_map(struct arm_v7s_io_pgtable *data, unsigned long iova, int num_entries = size >> ARM_V7S_LVL_SHIFT(lvl); /* Find our entry at the current level */ - ptep += ARM_V7S_LVL_IDX(iova, lvl); + ptep += ARM_V7S_LVL_IDX(iova, lvl, cfg); /* If we can install a leaf entry at this level, then do so */ if (num_entries) @@ -554,7 +554,7 @@ static void arm_v7s_free_pgtable(struct io_pgtable *iop) struct arm_v7s_io_pgtable *data = io_pgtable_to_data(iop); int i; - for (i = 0; i < ARM_V7S_PTES_PER_LVL(1); i++) { + for (i = 0; i < ARM_V7S_PTES_PER_LVL(1, &data->iop.cfg); i++) { arm_v7s_iopte pte = data->pgd[i]; if (ARM_V7S_PTE_IS_TABLE(pte, 1)) @@ -606,9 +606,9 @@ static size_t arm_v7s_split_blk_unmap(struct arm_v7s_io_pgtable *data, if (!tablep) return 0; /* Bytes unmapped */ - num_ptes = ARM_V7S_PTES_PER_LVL(2); + num_ptes = ARM_V7S_PTES_PER_LVL(2, cfg); num_entries = size >> ARM_V7S_LVL_SHIFT(2); - unmap_idx = ARM_V7S_LVL_IDX(iova, 2); + unmap_idx = ARM_V7S_LVL_IDX(iova, 2, cfg); pte = arm_v7s_prot_to_pte(arm_v7s_pte_to_prot(blk_pte, 1), 2, cfg); if (num_entries > 1) @@ -650,7 +650,7 @@ static size_t __arm_v7s_unmap(struct arm_v7s_io_pgtable *data, if (WARN_ON(lvl > 2)) return 0; - idx = ARM_V7S_LVL_IDX(iova, lvl); + idx = ARM_V7S_LVL_IDX(iova, lvl, &iop->cfg); ptep += idx; do { pte[i] = READ_ONCE(ptep[i]); @@ -736,7 +736,7 @@ static phys_addr_t arm_v7s_iova_to_phys(struct io_pgtable_ops *ops, u32 mask; do { - ptep += ARM_V7S_LVL_IDX(iova, ++lvl); + ptep += ARM_V7S_LVL_IDX(iova, ++lvl, &data->iop.cfg); pte = READ_ONCE(*ptep); ptep = iopte_deref(pte, lvl, data); } while (ARM_V7S_PTE_IS_TABLE(pte, lvl)); @@ -779,8 +779,8 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, spin_lock_init(&data->split_lock); data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", - ARM_V7S_TABLE_SIZE(2), - ARM_V7S_TABLE_SIZE(2), + ARM_V7S_TABLE_SIZE(2, cfg), + ARM_V7S_TABLE_SIZE(2, cfg), ARM_V7S_TABLE_SLAB_FLAGS, NULL); if (!data->l2_tables) goto out_free_data; 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Wed, 30 Sep 2020 15:09:04 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Rob Herring , Robin Murphy , Krzysztof Kozlowski , Will Deacon Subject: [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Date: Wed, 30 Sep 2020 15:06:33 +0800 Message-ID: <20200930070647.10188-11-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200930070647.10188-1-yong.wu@mediatek.com> References: <20200930070647.10188-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FFDBEC49ECEFA09E78A45829BB412B2B312E593CE04F1DBF7E08737226EA43C32000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200930_031842_290204_6E763D8F X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org, Nicolas Boichat , srv_heupstream@mediatek.com, chao.hao@mediatek.com, kernel-team@android.com, linux-kernel@vger.kernel.org, Evan Green , Tomasz Figa , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, yong.wu@mediatek.com, ming-fan.chen@mediatek.com, anan.sun@mediatek.com, Greg Kroah-Hartman , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add "cfg" as a parameter for some macros. This is a preparing patch for mediatek extend the lvl1 pgtable. No functional change. Signed-off-by: Yong Wu --- drivers/iommu/io-pgtable-arm-v7s.c | 34 +++++++++++++++--------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index a3b3e9147b8d..8362fdf76657 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c @@ -53,17 +53,17 @@ #define ARM_V7S_LVL_SHIFT(lvl) (ARM_V7S_ADDR_BITS - (4 + 8 * (lvl))) #define ARM_V7S_TABLE_SHIFT 10 -#define ARM_V7S_PTES_PER_LVL(lvl) (1 << _ARM_V7S_LVL_BITS(lvl)) -#define ARM_V7S_TABLE_SIZE(lvl) \ - (ARM_V7S_PTES_PER_LVL(lvl) * sizeof(arm_v7s_iopte)) +#define ARM_V7S_PTES_PER_LVL(lvl, cfg) (1 << _ARM_V7S_LVL_BITS(lvl)) +#define ARM_V7S_TABLE_SIZE(lvl, cfg) \ + (ARM_V7S_PTES_PER_LVL(lvl, cfg) * sizeof(arm_v7s_iopte)) #define ARM_V7S_BLOCK_SIZE(lvl) (1UL << ARM_V7S_LVL_SHIFT(lvl)) #define ARM_V7S_LVL_MASK(lvl) ((u32)(~0U << ARM_V7S_LVL_SHIFT(lvl))) #define ARM_V7S_TABLE_MASK ((u32)(~0U << ARM_V7S_TABLE_SHIFT)) -#define _ARM_V7S_IDX_MASK(lvl) (ARM_V7S_PTES_PER_LVL(lvl) - 1) -#define ARM_V7S_LVL_IDX(addr, lvl) ({ \ +#define _ARM_V7S_IDX_MASK(lvl, cfg) (ARM_V7S_PTES_PER_LVL(lvl, cfg) - 1) +#define ARM_V7S_LVL_IDX(addr, lvl, cfg) ({ \ int _l = lvl; \ - ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l); \ + ((u32)(addr) >> ARM_V7S_LVL_SHIFT(_l)) & _ARM_V7S_IDX_MASK(_l, cfg); \ }) /* @@ -239,7 +239,7 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, struct device *dev = cfg->iommu_dev; phys_addr_t phys; dma_addr_t dma; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); void *table = NULL; if (lvl == 1) @@ -285,7 +285,7 @@ static void __arm_v7s_free_table(void *table, int lvl, { struct io_pgtable_cfg *cfg = &data->iop.cfg; struct device *dev = cfg->iommu_dev; - size_t size = ARM_V7S_TABLE_SIZE(lvl); + size_t size = ARM_V7S_TABLE_SIZE(lvl, cfg); if (!cfg->coherent_walk) dma_unmap_single(dev, __arm_v7s_dma_addr(table), size, @@ -429,7 +429,7 @@ static int arm_v7s_init_pte(struct arm_v7s_io_pgtable *data, arm_v7s_iopte *tblp; size_t sz = ARM_V7S_BLOCK_SIZE(lvl); - tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl); + tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl, cfg); if (WARN_ON(__arm_v7s_unmap(data, NULL, iova + i * sz, sz, lvl, tblp) != sz)) return -EINVAL; @@ -482,7 +482,7 @@ static int __arm_v7s_map(struct arm_v7s_io_pgtable *data, unsigned long iova, int num_entries = size >> ARM_V7S_LVL_SHIFT(lvl); /* Find our entry at the current level */ - ptep += ARM_V7S_LVL_IDX(iova, lvl); + ptep += ARM_V7S_LVL_IDX(iova, lvl, cfg); /* If we can install a leaf entry at this level, then do so */ if (num_entries) @@ -554,7 +554,7 @@ static void arm_v7s_free_pgtable(struct io_pgtable *iop) struct arm_v7s_io_pgtable *data = io_pgtable_to_data(iop); int i; - for (i = 0; i < ARM_V7S_PTES_PER_LVL(1); i++) { + for (i = 0; i < ARM_V7S_PTES_PER_LVL(1, &data->iop.cfg); i++) { arm_v7s_iopte pte = data->pgd[i]; if (ARM_V7S_PTE_IS_TABLE(pte, 1)) @@ -606,9 +606,9 @@ static size_t arm_v7s_split_blk_unmap(struct arm_v7s_io_pgtable *data, if (!tablep) return 0; /* Bytes unmapped */ - num_ptes = ARM_V7S_PTES_PER_LVL(2); + num_ptes = ARM_V7S_PTES_PER_LVL(2, cfg); num_entries = size >> ARM_V7S_LVL_SHIFT(2); - unmap_idx = ARM_V7S_LVL_IDX(iova, 2); + unmap_idx = ARM_V7S_LVL_IDX(iova, 2, cfg); pte = arm_v7s_prot_to_pte(arm_v7s_pte_to_prot(blk_pte, 1), 2, cfg); if (num_entries > 1) @@ -650,7 +650,7 @@ static size_t __arm_v7s_unmap(struct arm_v7s_io_pgtable *data, if (WARN_ON(lvl > 2)) return 0; - idx = ARM_V7S_LVL_IDX(iova, lvl); + idx = ARM_V7S_LVL_IDX(iova, lvl, &iop->cfg); ptep += idx; do { pte[i] = READ_ONCE(ptep[i]); @@ -736,7 +736,7 @@ static phys_addr_t arm_v7s_iova_to_phys(struct io_pgtable_ops *ops, u32 mask; do { - ptep += ARM_V7S_LVL_IDX(iova, ++lvl); + ptep += ARM_V7S_LVL_IDX(iova, ++lvl, &data->iop.cfg); pte = READ_ONCE(*ptep); ptep = iopte_deref(pte, lvl, data); } while (ARM_V7S_PTE_IS_TABLE(pte, lvl)); @@ -779,8 +779,8 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, spin_lock_init(&data->split_lock); data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", - ARM_V7S_TABLE_SIZE(2), - ARM_V7S_TABLE_SIZE(2), + ARM_V7S_TABLE_SIZE(2, cfg), + ARM_V7S_TABLE_SIZE(2, cfg), ARM_V7S_TABLE_SLAB_FLAGS, NULL); if (!data->l2_tables) goto out_free_data; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel