From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 924E3C4727E for ; Thu, 1 Oct 2020 18:11:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5A39D20678 for ; Thu, 1 Oct 2020 18:11:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733038AbgJASLa (ORCPT ); Thu, 1 Oct 2020 14:11:30 -0400 Received: from foss.arm.com ([217.140.110.172]:42122 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730070AbgJASLa (ORCPT ); Thu, 1 Oct 2020 14:11:30 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A6BD1042; Thu, 1 Oct 2020 11:11:29 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.51.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 218163F6CF; Thu, 1 Oct 2020 11:11:21 -0700 (PDT) Date: Thu, 1 Oct 2020 19:11:19 +0100 From: Mark Rutland To: Alexander Potapenko Cc: Marco Elver , Andrew Morton , "H. Peter Anvin" , "Paul E. McKenney" , Andrey Konovalov , Andrey Ryabinin , Andy Lutomirski , Borislav Petkov , Catalin Marinas , Christoph Lameter , Dave Hansen , David Rientjes , Dmitriy Vyukov , Eric Dumazet , Greg Kroah-Hartman , Hillf Danton , Ingo Molnar , Jann Horn , Jonathan.Cameron@huawei.com, Jonathan Corbet , Joonsoo Kim , Kees Cook , Pekka Enberg , Peter Zijlstra , sjpark@amazon.com, Thomas Gleixner , Vlastimil Babka , Will Deacon , the arch/x86 maintainers , "open list:DOCUMENTATION" , LKML , kasan-dev , Linux ARM , Linux Memory Management List Subject: Re: [PATCH v3 01/10] mm: add Kernel Electric-Fence infrastructure Message-ID: <20201001181119.GB89689@C02TD0UTHF1T.local> References: <20200921132611.1700350-1-elver@google.com> <20200921132611.1700350-2-elver@google.com> <20200929142411.GC53442@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 29, 2020 at 05:51:58PM +0200, Alexander Potapenko wrote: > On Tue, Sep 29, 2020 at 4:24 PM Mark Rutland wrote: > > > > On Mon, Sep 21, 2020 at 03:26:02PM +0200, Marco Elver wrote: > > > From: Alexander Potapenko > > > > > > This adds the Kernel Electric-Fence (KFENCE) infrastructure. KFENCE is a > > > low-overhead sampling-based memory safety error detector of heap > > > use-after-free, invalid-free, and out-of-bounds access errors. > > > > > > KFENCE is designed to be enabled in production kernels, and has near > > > zero performance overhead. Compared to KASAN, KFENCE trades performance > > > for precision. The main motivation behind KFENCE's design, is that with > > > enough total uptime KFENCE will detect bugs in code paths not typically > > > exercised by non-production test workloads. One way to quickly achieve a > > > large enough total uptime is when the tool is deployed across a large > > > fleet of machines. > > > > > > KFENCE objects each reside on a dedicated page, at either the left or > > > right page boundaries. The pages to the left and right of the object > > > page are "guard pages", whose attributes are changed to a protected > > > state, and cause page faults on any attempted access to them. Such page > > > faults are then intercepted by KFENCE, which handles the fault > > > gracefully by reporting a memory access error. To detect out-of-bounds > > > writes to memory within the object's page itself, KFENCE also uses > > > pattern-based redzones. The following figure illustrates the page > > > layout: > > > > > > ---+-----------+-----------+-----------+-----------+-----------+--- > > > | xxxxxxxxx | O : | xxxxxxxxx | : O | xxxxxxxxx | > > > | xxxxxxxxx | B : | xxxxxxxxx | : B | xxxxxxxxx | > > > | x GUARD x | J : RED- | x GUARD x | RED- : J | x GUARD x | > > > | xxxxxxxxx | E : ZONE | xxxxxxxxx | ZONE : E | xxxxxxxxx | > > > | xxxxxxxxx | C : | xxxxxxxxx | : C | xxxxxxxxx | > > > | xxxxxxxxx | T : | xxxxxxxxx | : T | xxxxxxxxx | > > > ---+-----------+-----------+-----------+-----------+-----------+--- > > > > > > Guarded allocations are set up based on a sample interval (can be set > > > via kfence.sample_interval). After expiration of the sample interval, a > > > guarded allocation from the KFENCE object pool is returned to the main > > > allocator (SLAB or SLUB). At this point, the timer is reset, and the > > > next allocation is set up after the expiration of the interval. > > > > From other sub-threads it sounds like these addresses are not part of > > the linear/direct map. > For x86 these addresses belong to .bss, i.e. "kernel text mapping" > section, isn't that the linear map? No; the "linear map" is the "direct mapping" on x86, and the "image" or "kernel text mapping" is a distinct VA region. The image mapping aliases (i.e. uses the same physical pages as) a portion of the linear map, and every page in the linear map has a struct page. Fon the x86_64 ivirtual memory layout, see: https://www.kernel.org/doc/html/latest/x86/x86_64/mm.html Originally, the kernel image lived in the linear map, but it was split out into a distinct VA range (among other things) to permit KASLR. When that split was made, the x86 virt_to_*() helpers were updated to detect when they were passed a kernel image address, and automatically fix that up as-if they'd been handed the linear map alias of that address. For going one-way from virt->{phys,page} that works ok, but it doesn't survive the round-trip, and introduces redundant work into each virt_to_*() call. As it was largely arch code that was using image addresses, we didn't bother with the fixup on arm64, as we preferred the stronger warning. At the time I was also under the impression that on x86 they wanted to get rid of the automatic fixup, but that doesn't seem to have happened. Thanks, Mark. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95FB8C4727E for ; Thu, 1 Oct 2020 18:12:54 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2C9DA206C9 for ; Thu, 1 Oct 2020 18:12:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lbJEFccr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2C9DA206C9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pwSkOX4uohSbFhFQnkxPf1qh3SNIcypDXUso5zba1m8=; b=lbJEFccr16JtiVrytTzKcHDvD f+L/Nz/rTRKYX3kgGd158sLgN4/oXZEEOZU6D47iP1UkWpc1JgQ6AwseO9Ftns8ThJGnzj4GaGsnU WZwxAK/TH+zwnRUTHhXQ4rnRW/KMjNh+PMcvuZ40u0U5YKclRJZkAicDZ6sFGK1U7+D4D9hQGvAxn 64a/FbrJlLi0bwyN+g64d4IFaU5YamgD9K51CvGg/pFHDv/eXjOYRTzg7TqISjbmB74f7omBdqeHy YAzKVO3v+28KbjHwFrXd0TPhKDD1utMciksCWZaPuF5Pj+5GhJjS5QiJD9iEfWrhyyzAfB6D8nIHw 6UTNxhh1w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kO33G-0002fl-PL; Thu, 01 Oct 2020 18:11:34 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kO33D-0002do-16 for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2020 18:11:32 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2A6BD1042; Thu, 1 Oct 2020 11:11:29 -0700 (PDT) Received: from C02TD0UTHF1T.local (unknown [10.57.51.119]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 218163F6CF; Thu, 1 Oct 2020 11:11:21 -0700 (PDT) Date: Thu, 1 Oct 2020 19:11:19 +0100 From: Mark Rutland To: Alexander Potapenko Subject: Re: [PATCH v3 01/10] mm: add Kernel Electric-Fence infrastructure Message-ID: <20201001181119.GB89689@C02TD0UTHF1T.local> References: <20200921132611.1700350-1-elver@google.com> <20200921132611.1700350-2-elver@google.com> <20200929142411.GC53442@C02TD0UTHF1T.local> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201001_141131_277471_8A7B1A2E X-CRM114-Status: GOOD ( 31.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hillf Danton , "open list:DOCUMENTATION" , Peter Zijlstra , Catalin Marinas , Dave Hansen , Linux Memory Management List , Eric Dumazet , "H. Peter Anvin" , Christoph Lameter , Will Deacon , sjpark@amazon.com, Jonathan Corbet , the arch/x86 maintainers , kasan-dev , Ingo Molnar , Vlastimil Babka , David Rientjes , Andrey Ryabinin , Marco Elver , Kees Cook , "Paul E. McKenney" , Jann Horn , Andrey Konovalov , Borislav Petkov , Andy Lutomirski , Jonathan.Cameron@huawei.com, Thomas Gleixner , Joonsoo Kim , Dmitriy Vyukov , Linux ARM , Greg Kroah-Hartman , LKML , Pekka Enberg , Andrew Morton Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Sep 29, 2020 at 05:51:58PM +0200, Alexander Potapenko wrote: > On Tue, Sep 29, 2020 at 4:24 PM Mark Rutland wrote: > > > > On Mon, Sep 21, 2020 at 03:26:02PM +0200, Marco Elver wrote: > > > From: Alexander Potapenko > > > > > > This adds the Kernel Electric-Fence (KFENCE) infrastructure. KFENCE is a > > > low-overhead sampling-based memory safety error detector of heap > > > use-after-free, invalid-free, and out-of-bounds access errors. > > > > > > KFENCE is designed to be enabled in production kernels, and has near > > > zero performance overhead. Compared to KASAN, KFENCE trades performance > > > for precision. The main motivation behind KFENCE's design, is that with > > > enough total uptime KFENCE will detect bugs in code paths not typically > > > exercised by non-production test workloads. One way to quickly achieve a > > > large enough total uptime is when the tool is deployed across a large > > > fleet of machines. > > > > > > KFENCE objects each reside on a dedicated page, at either the left or > > > right page boundaries. The pages to the left and right of the object > > > page are "guard pages", whose attributes are changed to a protected > > > state, and cause page faults on any attempted access to them. Such page > > > faults are then intercepted by KFENCE, which handles the fault > > > gracefully by reporting a memory access error. To detect out-of-bounds > > > writes to memory within the object's page itself, KFENCE also uses > > > pattern-based redzones. The following figure illustrates the page > > > layout: > > > > > > ---+-----------+-----------+-----------+-----------+-----------+--- > > > | xxxxxxxxx | O : | xxxxxxxxx | : O | xxxxxxxxx | > > > | xxxxxxxxx | B : | xxxxxxxxx | : B | xxxxxxxxx | > > > | x GUARD x | J : RED- | x GUARD x | RED- : J | x GUARD x | > > > | xxxxxxxxx | E : ZONE | xxxxxxxxx | ZONE : E | xxxxxxxxx | > > > | xxxxxxxxx | C : | xxxxxxxxx | : C | xxxxxxxxx | > > > | xxxxxxxxx | T : | xxxxxxxxx | : T | xxxxxxxxx | > > > ---+-----------+-----------+-----------+-----------+-----------+--- > > > > > > Guarded allocations are set up based on a sample interval (can be set > > > via kfence.sample_interval). After expiration of the sample interval, a > > > guarded allocation from the KFENCE object pool is returned to the main > > > allocator (SLAB or SLUB). At this point, the timer is reset, and the > > > next allocation is set up after the expiration of the interval. > > > > From other sub-threads it sounds like these addresses are not part of > > the linear/direct map. > For x86 these addresses belong to .bss, i.e. "kernel text mapping" > section, isn't that the linear map? No; the "linear map" is the "direct mapping" on x86, and the "image" or "kernel text mapping" is a distinct VA region. The image mapping aliases (i.e. uses the same physical pages as) a portion of the linear map, and every page in the linear map has a struct page. Fon the x86_64 ivirtual memory layout, see: https://www.kernel.org/doc/html/latest/x86/x86_64/mm.html Originally, the kernel image lived in the linear map, but it was split out into a distinct VA range (among other things) to permit KASLR. When that split was made, the x86 virt_to_*() helpers were updated to detect when they were passed a kernel image address, and automatically fix that up as-if they'd been handed the linear map alias of that address. For going one-way from virt->{phys,page} that works ok, but it doesn't survive the round-trip, and introduces redundant work into each virt_to_*() call. As it was largely arch code that was using image addresses, we didn't bother with the fixup on arm64, as we preferred the stronger warning. At the time I was also under the impression that on x86 they wanted to get rid of the automatic fixup, but that doesn't seem to have happened. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel