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From: Mike Travis <mike.travis@hpe.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org, Steve Wahl <steve.wahl@hpe.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mike Travis <mike.travis@hpe.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Russ Anderson <russ.anderson@hpe.com>,
	Darren Hart <dvhart@infradead.org>,
	Andy Shevchenko <andy@infradead.org>,
	Alexandre Chartre <alexandre.chartre@oracle.com>,
	Jian Cai <caij2003@gmail.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	linux-kernel@vger.kernel.org,
	platform-driver-x86@vger.kernel.org
Subject: [PATCH v3 09/13] x86/platform/uv: Update UV5 MMR references in UV GRU
Date: Thu,  1 Oct 2020 19:05:34 -0500	[thread overview]
Message-ID: <20201002000538.94424-10-mike.travis@hpe.com> (raw)
In-Reply-To: <20201002000538.94424-1-mike.travis@hpe.com>

Make modifications to the GRU mappings to accommodate changes for UV5.

Signed-off-by: Mike Travis <mike.travis@hpe.com>
Reviewed-by: Dimitri Sivanich <dimitri.sivanich@hpe.com>
Reviewed-by: Steve Wahl <steve.wahl@hpe.com>
---
 arch/x86/kernel/apic/x2apic_uv_x.c | 30 ++++++++++++++++++++++++------
 1 file changed, 24 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 9f89c1e82df0..678001ff789d 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -82,6 +82,9 @@ static unsigned long __init uv_early_read_mmr(unsigned long addr)
 
 static inline bool is_GRU_range(u64 start, u64 end)
 {
+	if (!gru_start_paddr)
+		return false;
+
 	return start >= gru_start_paddr && end <= gru_end_paddr;
 }
 
@@ -913,13 +916,24 @@ static __init void map_high(char *id, unsigned long base, int pshift, int bshift
 static __init void map_gru_high(int max_pnode)
 {
 	union uvh_rh_gam_gru_overlay_config_u gru;
-	int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
-	unsigned long mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
-	unsigned long base;
+	unsigned long mask, base;
+	int shift;
+
+	if (UVH_RH_GAM_GRU_OVERLAY_CONFIG) {
+		gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
+		shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+		mask = UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+	} else if (UVH_RH10_GAM_GRU_OVERLAY_CONFIG) {
+		gru.v = uv_read_local_mmr(UVH_RH10_GAM_GRU_OVERLAY_CONFIG);
+		shift = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT;
+		mask = UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK;
+	} else {
+		pr_err("UV: GRU unavailable (no MMR)\n");
+		return;
+	}
 
-	gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG);
 	if (!gru.s.enable) {
-		pr_info("UV: GRU disabled\n");
+		pr_info("UV: GRU disabled (by BIOS)\n");
 		return;
 	}
 
@@ -1293,7 +1307,11 @@ static void __init uv_init_hub_info(struct uv_hub_info_s *hi)
 	/* Show system specific info: */
 	pr_info("UV: N:%d M:%d m_shift:%d n_lshift:%d\n", hi->n_val, hi->m_val, hi->m_shift, hi->n_lshift);
 	pr_info("UV: gpa_mask/shift:0x%lx/%d pnode_mask:0x%x apic_pns:%d\n", hi->gpa_mask, hi->gpa_shift, hi->pnode_mask, hi->apic_pnode_shift);
-	pr_info("UV: mmr_base/shift:0x%lx/%ld gru_base/shift:0x%lx/%ld\n", hi->global_mmr_base, hi->global_mmr_shift, hi->global_gru_base, hi->global_gru_shift);
+	pr_info("UV: mmr_base/shift:0x%lx/%ld\n", hi->global_mmr_base, hi->global_mmr_shift);
+	if (hi->global_gru_base)
+		pr_info("UV: gru_base/shift:0x%lx/%ld\n",
+			hi->global_gru_base, hi->global_gru_shift);
+
 	pr_info("UV: gnode_upper:0x%lx gnode_extra:0x%x\n", hi->gnode_upper, hi->gnode_extra);
 }
 
-- 
2.21.0


  parent reply	other threads:[~2020-10-02  0:27 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-02  0:05 [PATCH v3 00/13] x86/platform/uv: Updates for UV5 Architecture Mike Travis
2020-10-02  0:05 ` [PATCH v3 01/13] x86/platform/uv: Remove UV BAU TLB Shootdown Handler Mike Travis
2020-10-02  0:05 ` [PATCH v3 02/13] x86/platform/uv: Remove SCIR MMR references for UVY systems Mike Travis
2020-10-02  0:05 ` [PATCH v3 03/13] x86/platform/uv: Adjust references in UV kernel modules Mike Travis
2020-10-02  0:05 ` [PATCH v3 04/13] x86/platform/uv: Update UV MMRs for UV5 Mike Travis
2020-10-02 10:09   ` kernel test robot
2020-10-02 14:18     ` Mike Travis
2020-10-02  0:05 ` [PATCH v3 05/13] x86/platform/uv: Add UV5 direct references Mike Travis
2020-10-02  0:05 ` [PATCH v3 06/13] x86/platform/uv: Add and Decode Arch Type in UVsystab Mike Travis
2020-10-02 11:16   ` kernel test robot
2020-10-05  0:28     ` Mike Travis
2020-10-02  0:05 ` [PATCH v3 07/13] x86/platform/uv: Update MMIOH references based on new UV5 MMRs Mike Travis
2020-10-02 11:13   ` kernel test robot
2020-10-02  0:05 ` [PATCH v3 08/13] x86/platform/uv: Adjust GAM MMR references affected by UV5 updates Mike Travis
2020-10-02  0:05 ` Mike Travis [this message]
2020-10-02  0:05 ` [PATCH v3 10/13] x86/platform/uv: Update Node Present Counting Mike Travis
2020-10-02  0:05 ` [PATCH v3 11/13] x86/platform/uv: Update UV5 TSC Checking Mike Travis
2020-10-02  0:05 ` [PATCH v3 12/13] x86/platform/uv: Update for UV5 NMI MMR changes Mike Travis
2020-10-02  0:05 ` [PATCH v3 13/13] x86/platform/uv: Update Copyrights to conform to HPE standards Mike Travis

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