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[118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:36 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 1/5] ARM: mstar: Select MStar intc Date: Fri, 2 Oct 2020 22:34:14 +0900 Message-Id: <20201002133418.2250277-2-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org MediaTek recently introduced support for the MStar interrupt controller that is also present in some of their chips as well as the MStar/Sigmastar chips. Almost all of the peripheral interrupts go through an instance of this controller in MStar/SigmaStar Arm v7 chips so we want to select it if CONFIG_ARCH_MSTARV7 is selected. Signed-off-by: Daniel Palmer --- arch/arm/mach-mstar/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 52744fe32368..576d1ab293c8 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -3,6 +3,7 @@ menuconfig ARCH_MSTARV7 depends on ARCH_MULTI_V7 select ARM_GIC select ARM_HEAVY_MB + select MST_IRQ help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same -- 2.27.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBC39C47425 for ; Fri, 2 Oct 2020 13:36:25 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 80651205ED for ; Fri, 2 Oct 2020 13:36:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="wTQvV4Hu"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="oCMWc6Jj" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 80651205ED Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pbzyXzGrfViCY/ZudJtaYtq9OXIeNoL9NPZdubRh0+w=; b=wTQvV4Hupv4eRBxoUtotLEm3V gKaCTISW/f/i98r8EVutYF4RSr8aN/Ndx3ErT0v5qK1sNjpRXsXcvZ2LUrLyfxP6umuK0H/0rLeT3 9RO5KGlBp4RU1vDumLBFl7Nx31p3yE8Kdj1RrbkKItCipQdCLXrKpuNpibLcVLcnLpEl5IL5i45xr SIK8SfS5vPrmwRhx91jleFQ/3zt/NB31Pa0jgSs/1okY4lDODcQsclv3g93Ns5MWmhMcFBEwI2MMs 5YXxgcY9vE6EJb204AEf88u6+1h/6zHEN4jQviuLxOMDUwjk3OUEFmDA+ilPfPNMysu279diPTQbn vUk6zduCg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kOLCu-0001lL-KG; Fri, 02 Oct 2020 13:34:44 +0000 Received: from mail-pj1-x1041.google.com ([2607:f8b0:4864:20::1041]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kOLCq-0001jy-Pg for linux-arm-kernel@lists.infradead.org; Fri, 02 Oct 2020 13:34:41 +0000 Received: by mail-pj1-x1041.google.com with SMTP id j19so824245pjl.4 for ; Fri, 02 Oct 2020 06:34:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6W9k3ndaa9cRCwcQ1M/asEuo1OK8FOTIyDJ+tvTfSmU=; b=oCMWc6Jj4ktZjU2Abv3j8Jo7vqF5s3w07Ee2so2ulyh/HCR9TQnPRmZsGt75tpet1z znJdIuBUpgrqVS4Obqt7rsJhrsQhorjU6izHw4x3tQI1D79kvecwXfPOtQSf9Yv/6WPt yz+zJu/NROjZFu+JUO9rJ145yw15SArOMUKek= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6W9k3ndaa9cRCwcQ1M/asEuo1OK8FOTIyDJ+tvTfSmU=; b=I6dn1V+DrmfxmpWAZ9bv4Wax6s9xXQf47/gTo8dwNb2OFpR56ucYaOMoJRdcrcRd8c sYETNTwm9zItqZx2k+TbW7ES2pQ7YxVsUebXOHKr1iQ0QLNBoxMy/g/jMVLu41MpvsJG +obhzFyMp/9mHKL5SaFGfHyxiE2sAvxpT/F7SFkzVqyr5z/LmxsIBDBAb9YIkxXH5cwP 1C3piSF7J2qwXvbOPZ5sP7ajBW4c0VmfzxILNhiUmvgRql7faC0dii7SMSTLg7WYlMKS +xTAg3c98n3Vcc46HIne5KTz4hudvYIWJ4RTtG5I+BGGuz7Hu8fD0phzFkBUJr46c5yp 3U7w== X-Gm-Message-State: AOAM533QW2uk/dmTpDgYQRY1BvZDsS5KSjvZZHLuMtgkhIKYWXelCvXC RdT1PlPh2Jpjy/UZZliGwMufJg== X-Google-Smtp-Source: ABdhPJwSI1/I/1oq6fVw/wrmjpIzo5Uq4okkncEKBWITlbuxGxkjLW+1YPYtbxPqs3I2cpdnlbwklw== X-Received: by 2002:a17:90a:8d05:: with SMTP id c5mr2757642pjo.222.1601645676968; Fri, 02 Oct 2020 06:34:36 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:36 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Subject: [PATCH v2 1/5] ARM: mstar: Select MStar intc Date: Fri, 2 Oct 2020 22:34:14 +0900 Message-Id: <20201002133418.2250277-2-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201002_093440_852982_25B1712D X-CRM114-Status: GOOD ( 13.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, maz@kernel.org, Daniel Palmer , linux-arm-kernel@lists.infradead.org, mark-pk.tsai@mediatek.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MediaTek recently introduced support for the MStar interrupt controller that is also present in some of their chips as well as the MStar/Sigmastar chips. Almost all of the peripheral interrupts go through an instance of this controller in MStar/SigmaStar Arm v7 chips so we want to select it if CONFIG_ARCH_MSTARV7 is selected. Signed-off-by: Daniel Palmer --- arch/arm/mach-mstar/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 52744fe32368..576d1ab293c8 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -3,6 +3,7 @@ menuconfig ARCH_MSTARV7 depends on ARCH_MULTI_V7 select ARM_GIC select ARM_HEAVY_MB + select MST_IRQ help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel