* [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-04 21:32 ` Bert Vermeulen
0 siblings, 0 replies; 8+ messages in thread
From: Bert Vermeulen @ 2020-10-04 21:32 UTC (permalink / raw)
To: tudor.ambarus, miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel
Cc: Bert Vermeulen
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.
Signed-off-by: Bert Vermeulen <bert@biot.com>
---
drivers/mtd/spi-nor/core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
/* already configured from SFDP */
} else if (nor->info->addr_width) {
nor->addr_width = nor->info->addr_width;
- } else if (nor->mtd.size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}
+ if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+ /* enable 4-byte addressing if the device exceeds 16MiB */
+ nor->addr_width = 4;
+ }
+
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
dev_dbg(nor->dev, "address width is too large: %u\n",
nor->addr_width);
--
2.17.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-04 21:32 ` Bert Vermeulen
0 siblings, 0 replies; 8+ messages in thread
From: Bert Vermeulen @ 2020-10-04 21:32 UTC (permalink / raw)
To: tudor.ambarus, miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel
Cc: Bert Vermeulen
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_set_addr_width() doesn't catch it because addr_width
did get set. This fixes that check.
Signed-off-by: Bert Vermeulen <bert@biot.com>
---
drivers/mtd/spi-nor/core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 0369d98b2d12..a2c35ad9645c 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
/* already configured from SFDP */
} else if (nor->info->addr_width) {
nor->addr_width = nor->info->addr_width;
- } else if (nor->mtd.size > 0x1000000) {
- /* enable 4-byte addressing if the device exceeds 16MiB */
- nor->addr_width = 4;
} else {
nor->addr_width = 3;
}
+ if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
+ /* enable 4-byte addressing if the device exceeds 16MiB */
+ nor->addr_width = 4;
+ }
+
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
dev_dbg(nor->dev, "address width is too large: %u\n",
nor->addr_width);
--
2.17.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-04 21:32 ` Bert Vermeulen
@ 2020-10-06 11:44 ` Tudor.Ambarus
-1 siblings, 0 replies; 8+ messages in thread
From: Tudor.Ambarus @ 2020-10-06 11:44 UTC (permalink / raw)
To: bert, miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel
On 10/5/20 12:32 AM, Bert Vermeulen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
the problem was uncovered with commit f9acd7fa80be, so maybe a Fixes tag
will help.
Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
We can have this automatically in the stable tree by adding the tag:
Cc: stable@vger.kernel.org
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-06 11:44 ` Tudor.Ambarus
0 siblings, 0 replies; 8+ messages in thread
From: Tudor.Ambarus @ 2020-10-06 11:44 UTC (permalink / raw)
To: bert, miquel.raynal, richard, vigneshr, linux-mtd, linux-kernel
On 10/5/20 12:32 AM, Bert Vermeulen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
the problem was uncovered with commit f9acd7fa80be, so maybe a Fixes tag
will help.
Fixes: f9acd7fa80be ("mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widths")
> Signed-off-by: Bert Vermeulen <bert@biot.com>
We can have this automatically in the stable tree by adding the tag:
Cc: stable@vger.kernel.org
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-04 21:32 ` Bert Vermeulen
@ 2020-10-07 1:51 ` Joel Stanley
-1 siblings, 0 replies; 8+ messages in thread
From: Joel Stanley @ 2020-10-07 1:51 UTC (permalink / raw)
To: Bert Vermeulen
Cc: Tudor Ambarus, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-mtd, Linux Kernel Mailing List
On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Signed-off-by: Bert Vermeulen <bert@biot.com>
After replying to the other thread, I just saw this one.
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Thanks Bert!
Cheers,
Joel
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-07 1:51 ` Joel Stanley
0 siblings, 0 replies; 8+ messages in thread
From: Joel Stanley @ 2020-10-07 1:51 UTC (permalink / raw)
To: Bert Vermeulen
Cc: Vignesh Raghavendra, Tudor Ambarus, Richard Weinberger,
Linux Kernel Mailing List, linux-mtd, Miquel Raynal
On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>
> If a flash chip has more than 16MB capacity but its BFPT reports
> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>
> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
> did get set. This fixes that check.
>
> Signed-off-by: Bert Vermeulen <bert@biot.com>
After replying to the other thread, I just saw this one.
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Joel Stanley <joel@jms.id.au>
Thanks Bert!
Cheers,
Joel
> ---
> drivers/mtd/spi-nor/core.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 0369d98b2d12..a2c35ad9645c 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
> /* already configured from SFDP */
> } else if (nor->info->addr_width) {
> nor->addr_width = nor->info->addr_width;
> - } else if (nor->mtd.size > 0x1000000) {
> - /* enable 4-byte addressing if the device exceeds 16MiB */
> - nor->addr_width = 4;
> } else {
> nor->addr_width = 3;
> }
>
> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
> + /* enable 4-byte addressing if the device exceeds 16MiB */
> + nor->addr_width = 4;
> + }
> +
> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
> dev_dbg(nor->dev, "address width is too large: %u\n",
> nor->addr_width);
> --
> 2.17.1
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
2020-10-07 1:51 ` Joel Stanley
@ 2020-10-07 5:44 ` Cédric Le Goater
-1 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2020-10-07 5:44 UTC (permalink / raw)
To: Joel Stanley, Bert Vermeulen
Cc: Tudor Ambarus, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, linux-mtd, Linux Kernel Mailing List
On 10/7/20 3:51 AM, Joel Stanley wrote:
> On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>>
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Signed-off-by: Bert Vermeulen <bert@biot.com>
>
> After replying to the other thread, I just saw this one.
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> Tested-by: Joel Stanley <joel@jms.id.au>
>
> Thanks Bert!
Yes. I was starting to add bfpt-fixups for all chips we use on Aspeed
based system.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> Cheers,
>
> Joel
>
>> ---
>> drivers/mtd/spi-nor/core.c | 8 +++++---
>> 1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>> /* already configured from SFDP */
>> } else if (nor->info->addr_width) {
>> nor->addr_width = nor->info->addr_width;
>> - } else if (nor->mtd.size > 0x1000000) {
>> - /* enable 4-byte addressing if the device exceeds 16MiB */
>> - nor->addr_width = 4;
>> } else {
>> nor->addr_width = 3;
>> }
>>
>> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
>> + /* enable 4-byte addressing if the device exceeds 16MiB */
>> + nor->addr_width = 4;
>> + }
>> +
>> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>> dev_dbg(nor->dev, "address width is too large: %u\n",
>> nor->addr_width);
>> --
>> 2.17.1
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB
@ 2020-10-07 5:44 ` Cédric Le Goater
0 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2020-10-07 5:44 UTC (permalink / raw)
To: Joel Stanley, Bert Vermeulen
Cc: Vignesh Raghavendra, Tudor Ambarus, Richard Weinberger,
Linux Kernel Mailing List, linux-mtd, Miquel Raynal
On 10/7/20 3:51 AM, Joel Stanley wrote:
> On Sun, 4 Oct 2020 at 21:33, Bert Vermeulen <bert@biot.com> wrote:
>>
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it because addr_width
>> did get set. This fixes that check.
>>
>> Signed-off-by: Bert Vermeulen <bert@biot.com>
>
> After replying to the other thread, I just saw this one.
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> Tested-by: Joel Stanley <joel@jms.id.au>
>
> Thanks Bert!
Yes. I was starting to add bfpt-fixups for all chips we use on Aspeed
based system.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
> Cheers,
>
> Joel
>
>> ---
>> drivers/mtd/spi-nor/core.c | 8 +++++---
>> 1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 0369d98b2d12..a2c35ad9645c 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -3009,13 +3009,15 @@ static int spi_nor_set_addr_width(struct spi_nor *nor)
>> /* already configured from SFDP */
>> } else if (nor->info->addr_width) {
>> nor->addr_width = nor->info->addr_width;
>> - } else if (nor->mtd.size > 0x1000000) {
>> - /* enable 4-byte addressing if the device exceeds 16MiB */
>> - nor->addr_width = 4;
>> } else {
>> nor->addr_width = 3;
>> }
>>
>> + if (nor->addr_width == 3 && nor->mtd.size > 0x1000000) {
>> + /* enable 4-byte addressing if the device exceeds 16MiB */
>> + nor->addr_width = 4;
>> + }
>> +
>> if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
>> dev_dbg(nor->dev, "address width is too large: %u\n",
>> nor->addr_width);
>> --
>> 2.17.1
>>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-10-07 5:46 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-10-04 21:32 [PATCH v2] mtd: spi-nor: Fix address width on flash chips > 16MB Bert Vermeulen
2020-10-04 21:32 ` Bert Vermeulen
2020-10-06 11:44 ` Tudor.Ambarus
2020-10-06 11:44 ` Tudor.Ambarus
2020-10-07 1:51 ` Joel Stanley
2020-10-07 1:51 ` Joel Stanley
2020-10-07 5:44 ` Cédric Le Goater
2020-10-07 5:44 ` Cédric Le Goater
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